1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
4 * Copyright (c) 2022 Radxa Limited
5 */
6
7 / {
8 cluster0_opp: opp-table-0 {
9 compatible = "operating-points-v2";
10 opp-shared;
11
12 opp00 {
13 opp-hz = /bits/ 64 <408000000>;
14 opp-microvolt = <875000 875000 1250000>;
15 clock-latency-ns = <40000>;
16 };
17 opp01 {
18 opp-hz = /bits/ 64 <600000000>;
19 opp-microvolt = <875000 875000 1250000>;
20 };
21 opp02 {
22 opp-hz = /bits/ 64 <816000000>;
23 opp-microvolt = <900000 900000 1250000>;
24 };
25 opp03 {
26 opp-hz = /bits/ 64 <1008000000>;
27 opp-microvolt = <975000 975000 1250000>;
28 };
29 };
30
31 cluster1_opp: opp-table-1 {
32 compatible = "operating-points-v2";
33 opp-shared;
34
35 opp00 {
36 opp-hz = /bits/ 64 <408000000>;
37 opp-microvolt = <875000 875000 1250000>;
38 clock-latency-ns = <40000>;
39 };
40 opp01 {
41 opp-hz = /bits/ 64 <600000000>;
42 opp-microvolt = <875000 875000 1250000>;
43 };
44 opp02 {
45 opp-hz = /bits/ 64 <816000000>;
46 opp-microvolt = <875000 875000 1250000>;
47 };
48 opp03 {
49 opp-hz = /bits/ 64 <1008000000>;
50 opp-microvolt = <925000 925000 1250000>;
51 };
52 opp04 {
53 opp-hz = /bits/ 64 <1200000000>;
54 opp-microvolt = <1000000 1000000 1250000>;
55 };
56 opp05 {
57 opp-hz = /bits/ 64 <1416000000>;
58 opp-microvolt = <1075000 1075000 1250000>;
59 };
60 opp06 {
61 opp-hz = /bits/ 64 <1512000000>;
62 opp-microvolt = <1150000 1150000 1250000>;
63 };
64 };
65
66 gpu_opp_table: opp-table-2 {
67 compatible = "operating-points-v2";
68
69 opp00 {
70 opp-hz = /bits/ 64 <200000000>;
71 opp-microvolt = <875000 875000 1150000>;
72 };
73 opp01 {
74 opp-hz = /bits/ 64 <300000000>;
75 opp-microvolt = <875000 875000 1150000>;
76 };
77 opp02 {
78 opp-hz = /bits/ 64 <400000000>;
79 opp-microvolt = <875000 875000 1150000>;
80 };
81 opp03 {
82 opp-hz = /bits/ 64 <600000000>;
83 opp-microvolt = <975000 975000 1150000>;
84 };
85 };
86 };
87
88 &cpu_l0 {
89 operating-points-v2 = <&cluster0_opp>;
90 };
91
92 &cpu_l1 {
93 operating-points-v2 = <&cluster0_opp>;
94 };
95
96 &cpu_l2 {
97 operating-points-v2 = <&cluster0_opp>;
98 };
99
100 &cpu_l3 {
101 operating-points-v2 = <&cluster0_opp>;
102 };
103
104 &cpu_b0 {
105 operating-points-v2 = <&cluster1_opp>;
106 };
107
108 &cpu_b1 {
109 operating-points-v2 = <&cluster1_opp>;
110 };
111
112 &gpu {
113 operating-points-v2 = <&gpu_opp_table>;
114 };
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