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Linux/arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dts

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  1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
  2 //
  3 // Device Tree Source for Akebi96 Development Board
  4 //
  5 // Derived from uniphier-ld20-global.dts.
  6 //
  7 // Copyright (C) 2015-2017 Socionext Inc.
  8 // Copyright (C) 2019-2020 Linaro Ltd.
  9 
 10 /dts-v1/;
 11 #include <dt-bindings/gpio/uniphier-gpio.h>
 12 #include "uniphier-ld20.dtsi"
 13 
 14 / {
 15         model = "Akebi96";
 16         compatible = "socionext,uniphier-ld20-akebi96",
 17                      "socionext,uniphier-ld20";
 18 
 19         chosen {
 20                 stdout-path = "serial0:115200n8";
 21         };
 22 
 23         aliases {
 24                 serial0 = &serial0;
 25                 serial1 = &serial1;
 26                 serial2 = &serial2;
 27                 serial3 = &serial3;
 28                 i2c0 = &i2c0;
 29                 i2c1 = &i2c1;
 30                 i2c2 = &i2c2;
 31                 i2c3 = &i2c3;
 32                 i2c4 = &i2c4;
 33                 i2c5 = &i2c5;
 34                 spi0 = &spi0;
 35                 spi1 = &spi1;
 36                 spi2 = &spi2;
 37                 spi3 = &spi3;
 38                 ethernet0 = &eth;
 39         };
 40 
 41         memory@80000000 {
 42                 device_type = "memory";
 43                 reg = <0 0x80000000 0 0xc0000000>;
 44         };
 45 
 46         framebuffer@c0000000 {
 47                 compatible = "simple-framebuffer";
 48                 reg = <0 0xc0000000 0 0x02000000>;
 49                 width = <1920>;
 50                 height = <1080>;
 51                 stride = <7680>;
 52                 format = "a8r8g8b8";
 53         };
 54 
 55         reserved-memory {
 56                 #address-cells = <2>;
 57                 #size-cells = <2>;
 58                 ranges;
 59 
 60                 memory@c0000000 {
 61                         reg = <0 0xc0000000 0 0x02000000>;
 62                         no-map;
 63                 };
 64         };
 65 
 66         sound {
 67                 compatible = "audio-graph-card";
 68                 label = "UniPhier LD20";
 69                 dais = <&spdif_port0
 70                         &comp_spdif_port0>;
 71         };
 72 
 73         spdif-out {
 74                 compatible = "linux,spdif-dit";
 75                 #sound-dai-cells = <0>;
 76 
 77                 port@0 {
 78                         spdif_tx: endpoint {
 79                                 remote-endpoint = <&spdif_hiecout1>;
 80                         };
 81                 };
 82         };
 83 
 84         comp-spdif-out {
 85                 compatible = "linux,spdif-dit";
 86                 #sound-dai-cells = <0>;
 87 
 88                 port@0 {
 89                         comp_spdif_tx: endpoint {
 90                                 remote-endpoint = <&comp_spdif_hiecout1>;
 91                         };
 92                 };
 93         };
 94 
 95         firmware {
 96                 optee {
 97                         compatible = "linaro,optee-tz";
 98                         method = "smc";
 99                 };
100         };
101 };
102 
103 &spi3 {
104         status = "okay";
105         #address-cells = <1>;
106         #size-cells = <0>;
107         usb-over-spi@0 {
108                 compatible = "maxim,max3421-udc";
109                 reg = <0>;
110                 spi-max-frequency = <12500000>;
111                 interrupt-parent = <&gpio>;
112                 interrupt-names = "udc";
113                 interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
114         };
115 };
116 
117 &serial0 {
118         /* Onboard USB-UART */
119         status = "okay";
120 };
121 
122 &serial2 {
123         /* LS connector UART1 */
124         status = "okay";
125 };
126 
127 &serial3 {
128         /* LS connector UART0 */
129         status = "okay";
130 };
131 
132 &spdif_hiecout1 {
133         remote-endpoint = <&spdif_tx>;
134 };
135 
136 &comp_spdif_hiecout1 {
137         remote-endpoint = <&comp_spdif_tx>;
138 };
139 
140 &i2c0 {
141         /* LS connector I2C0 */
142         status = "okay";
143 };
144 
145 &i2c1 {
146         /* LS connector I2C1 */
147         status = "okay";
148 };
149 
150 &eth {
151         status = "okay";
152         phy-handle = <&ethphy>;
153 };
154 
155 &mdio {
156         ethphy: ethernet-phy@0 {
157                 reg = <0>;
158         };
159 };
160 
161 &usb {
162         status = "okay";
163 };
164 
165 &pcie {
166         status = "okay";
167 };
168 
169 &gpio {
170         /* IRQs for Max3421 */
171         xirq0-hog {
172                 gpio-hog;
173                 gpios = <UNIPHIER_GPIO_IRQ(0) 1>;
174                 input;
175         };
176         xirq10-hog {
177                 gpio-hog;
178                 gpios = <UNIPHIER_GPIO_IRQ(10) 1>;
179                 input;
180         };
181 };
182 
183 &pinctrl_aout1 {
184         groups = "aout1b";
185 };
186 
187 &pinctrl_uart3 {
188         groups = "uart3", "uart3_ctsrts";
189 };

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