1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
2 /*
3 * Device Tree Source for AM625 SoC Family MCU Domain peripherals
4 *
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
6 */
7
8 &cbass_mcu {
9 mcu_pmx0: pinctrl@4084000 {
10 bootph-all;
11 compatible = "pinctrl-single";
12 reg = <0x00 0x04084000 0x00 0x88>;
13 #pinctrl-cells = <1>;
14 pinctrl-single,register-width = <32>;
15 pinctrl-single,function-mask = <0xffffffff>;
16 };
17
18 mcu_esm: esm@4100000 {
19 bootph-pre-ram;
20 compatible = "ti,j721e-esm";
21 reg = <0x00 0x4100000 0x00 0x1000>;
22 ti,esm-pins = <0>, <1>, <2>, <85>;
23 };
24
25 /*
26 * The MCU domain timer interrupts are routed only to the ESM module,
27 * and not currently available for Linux. The MCU domain timers are
28 * of limited use without interrupts, and likely reserved by the ESM.
29 */
30 mcu_timer0: timer@4800000 {
31 compatible = "ti,am654-timer";
32 reg = <0x00 0x4800000 0x00 0x400>;
33 clocks = <&k3_clks 35 2>;
34 clock-names = "fck";
35 power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
36 ti,timer-pwm;
37 status = "reserved";
38 };
39
40 mcu_timer1: timer@4810000 {
41 compatible = "ti,am654-timer";
42 reg = <0x00 0x4810000 0x00 0x400>;
43 clocks = <&k3_clks 48 2>;
44 clock-names = "fck";
45 power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
46 ti,timer-pwm;
47 status = "reserved";
48 };
49
50 mcu_timer2: timer@4820000 {
51 compatible = "ti,am654-timer";
52 reg = <0x00 0x4820000 0x00 0x400>;
53 clocks = <&k3_clks 49 2>;
54 clock-names = "fck";
55 power-domains = <&k3_pds 49 TI_SCI_PD_EXCLUSIVE>;
56 ti,timer-pwm;
57 status = "reserved";
58 };
59
60 mcu_timer3: timer@4830000 {
61 compatible = "ti,am654-timer";
62 reg = <0x00 0x4830000 0x00 0x400>;
63 clocks = <&k3_clks 50 2>;
64 clock-names = "fck";
65 power-domains = <&k3_pds 50 TI_SCI_PD_EXCLUSIVE>;
66 ti,timer-pwm;
67 status = "reserved";
68 };
69
70 mcu_uart0: serial@4a00000 {
71 compatible = "ti,am64-uart", "ti,am654-uart";
72 reg = <0x00 0x04a00000 0x00 0x100>;
73 interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
74 power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
75 clocks = <&k3_clks 149 0>;
76 clock-names = "fclk";
77 status = "disabled";
78 };
79
80 mcu_i2c0: i2c@4900000 {
81 compatible = "ti,am64-i2c", "ti,omap4-i2c";
82 reg = <0x00 0x04900000 0x00 0x100>;
83 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
84 #address-cells = <1>;
85 #size-cells = <0>;
86 power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
87 clocks = <&k3_clks 106 2>;
88 clock-names = "fck";
89 status = "disabled";
90 };
91
92 mcu_spi0: spi@4b00000 {
93 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
94 reg = <0x00 0x04b00000 0x00 0x400>;
95 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
96 #address-cells = <1>;
97 #size-cells = <0>;
98 power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
99 clocks = <&k3_clks 147 0>;
100 status = "disabled";
101 };
102
103 mcu_spi1: spi@4b10000 {
104 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
105 reg = <0x00 0x04b10000 0x00 0x400>;
106 interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
107 #address-cells = <1>;
108 #size-cells = <0>;
109 power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
110 clocks = <&k3_clks 148 0>;
111 status = "disabled";
112 };
113
114 mcu_gpio_intr: interrupt-controller@4210000 {
115 compatible = "ti,sci-intr";
116 reg = <0x00 0x04210000 0x00 0x200>;
117 ti,intr-trigger-type = <1>;
118 interrupt-controller;
119 interrupt-parent = <&gic500>;
120 #interrupt-cells = <1>;
121 ti,sci = <&dmsc>;
122 ti,sci-dev-id = <5>;
123 ti,interrupt-ranges = <0 104 4>;
124 };
125
126 mcu_gpio0: gpio@4201000 {
127 compatible = "ti,am64-gpio", "ti,keystone-gpio";
128 reg = <0x00 0x4201000 0x00 0x100>;
129 gpio-controller;
130 #gpio-cells = <2>;
131 interrupt-parent = <&mcu_gpio_intr>;
132 interrupts = <30>, <31>;
133 interrupt-controller;
134 #interrupt-cells = <2>;
135 ti,ngpio = <24>;
136 ti,davinci-gpio-unbanked = <0>;
137 power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>;
138 clocks = <&k3_clks 79 0>;
139 clock-names = "gpio";
140 };
141
142 mcu_rti0: watchdog@4880000 {
143 compatible = "ti,j7-rti-wdt";
144 reg = <0x00 0x04880000 0x00 0x100>;
145 clocks = <&k3_clks 131 0>;
146 power-domains = <&k3_pds 131 TI_SCI_PD_EXCLUSIVE>;
147 assigned-clocks = <&k3_clks 131 0>;
148 assigned-clock-parents = <&k3_clks 131 2>;
149 /* Tightly coupled to M4F */
150 status = "reserved";
151 };
152
153 mcu_mcan0: can@4e08000 {
154 compatible = "bosch,m_can";
155 reg = <0x00 0x4e08000 0x00 0x200>,
156 <0x00 0x4e00000 0x00 0x8000>;
157 reg-names = "m_can", "message_ram";
158 power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;
159 clocks = <&k3_clks 188 6>, <&k3_clks 188 1>;
160 clock-names = "hclk", "cclk";
161 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
162 status = "disabled";
163 };
164
165 mcu_mcan1: can@4e18000 {
166 compatible = "bosch,m_can";
167 reg = <0x00 0x4e18000 0x00 0x200>,
168 <0x00 0x4e10000 0x00 0x8000>;
169 reg-names = "m_can", "message_ram";
170 power-domains = <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>;
171 clocks = <&k3_clks 189 6>, <&k3_clks 189 1>;
172 clock-names = "hclk", "cclk";
173 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
174 status = "disabled";
175 };
176 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.