1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2023 Josua Mayer <josua@solid-run.com>
4 *
5 * DTS for SolidRun AM642 HummingBoard-T,
6 * running on Cortex A53.
7 *
8 */
9
10 /dts-v1/;
11
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/phy/phy.h>
14
15 #include "k3-am642.dtsi"
16 #include "k3-am642-sr-som.dtsi"
17
18 / {
19 model = "SolidRun AM642 HummingBoard-T";
20 compatible = "solidrun,am642-hummingboard-t", "solidrun,am642-sr-som", "ti,am642";
21
22 aliases {
23 serial5 = &main_uart3;
24 };
25
26 leds {
27 compatible = "gpio-leds";
28 pinctrl-names = "default";
29 pinctrl-0 = <&leds_default_pins>;
30
31 /* D24 */
32 led1: led-1 {
33 label = "led1";
34 gpios = <&main_gpio0 29 GPIO_ACTIVE_HIGH>;
35 color = <LED_COLOR_ID_GREEN>;
36 };
37
38 /* D25 */
39 led2: led-2 {
40 label = "led2";
41 gpios = <&main_gpio0 30 GPIO_ACTIVE_HIGH>;
42 color = <LED_COLOR_ID_GREEN>;
43 };
44
45 /* D26 */
46 led3: led-3 {
47 label = "led3";
48 gpios = <&main_gpio0 33 GPIO_ACTIVE_HIGH>;
49 color = <LED_COLOR_ID_GREEN>;
50 };
51 };
52
53 regulator-m2-3v3 {
54 compatible = "regulator-fixed";
55 pinctrl-names = "default";
56 pinctrl-0 = <®ulator_pcie_3v3_default_pins>;
57 regulator-name = "m2-3v3";
58 regulator-min-microvolt = <3300000>;
59 regulator-max-microvolt = <3300000>;
60 gpio = <&main_gpio1 17 GPIO_ACTIVE_HIGH>;
61 enable-active-high;
62 regulator-always-on;
63 };
64
65 regulator-vpp-1v8 {
66 compatible = "regulator-fixed";
67 pinctrl-names = "default";
68 pinctrl-0 = <®ulator_vpp_1v8_default_pins>;
69 regulator-name = "vpp-1v8";
70 regulator-min-microvolt = <1800000>;
71 regulator-max-microvolt = <1800000>;
72 gpio = <&main_gpio1 78 GPIO_ACTIVE_HIGH>;
73 enable-active-high;
74 };
75
76 serdes_mux: mux-controller {
77 compatible = "gpio-mux";
78 pinctrl-names = "default";
79 pinctrl-0 = <&serdes_mux_default_pins>;
80 #mux-control-cells = <0>;
81 /*
82 * Mux has 2 IOs:
83 * - select: 0 = USB-3 (M2); 1 = PCIE (M1)
84 * - shutdown: 0 = active; 1 = disabled (high impedance)
85 */
86 mux-gpios = <&main_gpio1 40 GPIO_ACTIVE_HIGH>, <&main_gpio1 41 GPIO_ACTIVE_HIGH>;
87 /* default disabled */
88 idle-state = <2>;
89 };
90 };
91
92 &main_gpio0 {
93 m2-reset-hog {
94 gpio-hog;
95 gpios = <12 GPIO_ACTIVE_LOW>;
96 output-low; /* deasserted */
97 line-name = "m2-reset";
98 };
99
100 m1-m2-w-disable1-hog {
101 gpio-hog;
102 gpios = <32 GPIO_ACTIVE_LOW>;
103 output-low; /* deasserted */
104 line-name = "m1-m2-pcie-w-disable1";
105 };
106
107 m1-m2-w-disable2-hog {
108 gpio-hog;
109 gpios = <34 GPIO_ACTIVE_LOW>;
110 output-low; /* deasserted */
111 line-name = "m1-m2-pcie-w-disable2";
112 };
113 };
114
115 &main_gpio1 {
116 m1-pcie-clkreq0-hog {
117 gpio-hog;
118 gpios = <11 GPIO_ACTIVE_LOW>;
119 input;
120 line-name = "m1-pcie-clkreq0";
121 };
122
123 m2-pcie-clkreq-hog {
124 gpio-hog;
125 gpios = <35 GPIO_ACTIVE_LOW>;
126 input;
127 line-name = "m2-pcie-clkreq";
128 };
129 };
130
131 &main_i2c0 {
132 pinctrl-0 = <&main_i2c0_default_pins>, <&main_i2c0_int_default_pins>;
133
134 humidity-sensor@41 {
135 compatible = "ti,hdc2010";
136 reg = <0x41>;
137 interrupt-parent = <&main_gpio0>;
138 interrupts = <37 IRQ_TYPE_EDGE_FALLING>;
139 };
140
141 light-sensor@44 {
142 compatible = "ti,opt3001";
143 reg = <0x44>;
144 interrupt-parent = <&main_gpio0>;
145 interrupts = <37 IRQ_TYPE_EDGE_FALLING>;
146 };
147
148 /* charger@6a */
149 };
150
151 &main_i2c1 {
152 pinctrl-names = "default";
153 pinctrl-0 = <&main_i2c1_default_pins>;
154 status = "okay";
155
156 rtc@69 {
157 compatible = "abracon,abx80x";
158 reg = <0x69>;
159 pinctrl-names = "default";
160 pinctrl-0 = <&rtc_int_default_pins>;
161 abracon,tc-diode = "schottky";
162 abracon,tc-resistor = <3>;
163 interrupt-parent = <&main_gpio0>;
164 interrupts = <44 IRQ_TYPE_EDGE_FALLING>;
165 };
166 };
167
168 &main_mcan0 {
169 pinctrl-names = "default";
170 pinctrl-0 = <&main_mcan0_default_pins>;
171 status = "okay";
172
173 can-transceiver {
174 max-bitrate = <8000000>;
175 };
176 };
177
178 &main_mcan1 {
179 pinctrl-names = "default";
180 pinctrl-0 = <&main_mcan1_default_pins>;
181 status = "okay";
182
183 can-transceiver {
184 max-bitrate = <8000000>;
185 };
186 };
187
188 &main_pmx0 {
189 leds_default_pins: leds-default-pins {
190 pinctrl-single,pins = <
191 AM64X_IOPAD(0x0074, PIN_OUTPUT, 7) /* GPMC0_AD14.GPIO0_29 */
192 AM64X_IOPAD(0x0078, PIN_OUTPUT, 7) /* GPMC0_AD15.GPIO0_30 */
193 AM64X_IOPAD(0x0088, PIN_OUTPUT, 7) /* GPMC0_OEn_REn.GPIO0_33 */
194 >;
195 };
196
197 main_i2c0_int_default_pins: main-i2c0-int-default-pins {
198 pinctrl-single,pins = <
199 /* external pull-up on Carrier */
200 AM64X_IOPAD(0x0098, PIN_INPUT, 7) /* GPMC0_WAIT0.GPIO0_37 */
201 >;
202 };
203
204 main_i2c1_default_pins: main-i2c1-default-pins {
205 pinctrl-single,pins = <
206 /* external pull-up on SoM */
207 AM64X_IOPAD(0x0268, PIN_INPUT, 0) /* I2C1_SCL.I2C1_SCL */
208 AM64X_IOPAD(0x026c, PIN_INPUT, 0) /* I2C1_SDA.I2C1_SDA */
209 >;
210 };
211
212 main_mcan0_default_pins: main-mcan0-default-pins {
213 pinctrl-single,pins = <
214 AM64X_IOPAD(0x0254, PIN_INPUT, 0) /* MCAN0_RX.MCAN0_RX */
215 AM64X_IOPAD(0x0250, PIN_OUTPUT, 0) /* MCAN0_TX.MCAN0_TX */
216 >;
217 };
218
219 main_mcan1_default_pins: main-mcan1-default-pins {
220 pinctrl-single,pins = <
221 AM64X_IOPAD(0x025c, PIN_INPUT, 0) /* MCAN1_RX.MCAN1_RX */
222 AM64X_IOPAD(0x0258, PIN_OUTPUT, 0) /* MCAN1_TX.MCAN1_TX */
223 >;
224 };
225
226 main_uart3_default_pins: main-uart3-default-pins {
227 pinctrl-single,pins = <
228 AM64X_IOPAD(0x016c, PIN_INPUT, 10) /* PRG0_PRU0_GPO3.UART3_CTSn */
229 AM64X_IOPAD(0x0170, PIN_OUTPUT, 10) /* PRG0_PRU0_GPO4.UART3_TXD */
230 AM64X_IOPAD(0x0174, PIN_OUTPUT, 10) /* PRG0_PRU0_GPO5.UART3_RTSn */
231 AM64X_IOPAD(0x01ac, PIN_INPUT, 10) /* PRG0_PRU0_GPO19.UART3_RXD */
232 >;
233 };
234
235 pcie0_default_pins: pcie0-default-pins {
236 pinctrl-single,pins = <
237 /* connector M2 RESET */
238 AM64X_IOPAD(0x0030, PIN_OUTPUT, 7) /* OSPI0_CSn1.GPIO0_12 */
239 /* connectors M1 & M2 W_DISABLE1 */
240 AM64X_IOPAD(0x0084, PIN_OUTPUT, 7) /* GPMC0_ADVN_ALE.GPIO0_32 */
241 /* connectors M1 & M2 W_DISABLE2 */
242 AM64X_IOPAD(0x008c, PIN_OUTPUT, 7) /* GPMC0_WEN.GPIO0_34 */
243 /* connectors M1 & M2 PERST0 (PCI Reset) */
244 AM64X_IOPAD(0x019c, PIN_OUTPUT, 7) /* PRG0_PRU0_GPO15.GPIO1_15 */
245 /* connector M1 CLKREQ0 */
246 AM64X_IOPAD(0x018c, PIN_INPUT, 7) /* PRG0_PRU0_GPO11.GPIO1_11 */
247 /* connector M2 CLKREQ0 */
248 AM64X_IOPAD(0x01ec, PIN_INPUT, 7) /* PRG0_PRU1_GPO15.GPIO1_35 */
249 >;
250 };
251
252 regulator_pcie_3v3_default_pins: regulator-pcie-3v3-default-pins {
253 pinctrl-single,pins = <
254 AM64X_IOPAD(0x01a4, PIN_OUTPUT, 7) /* PRG0_PRU0_GPO17.GPIO1_17 */
255 >;
256 };
257
258 regulator_vpp_1v8_default_pins: regulator-vpp-1v8-default-pins {
259 pinctrl-single,pins = <
260 AM64X_IOPAD(0x029c, PIN_OUTPUT, 7) /* MMC1_SDWP.GPIO1_78 */
261 >;
262 };
263
264 rtc_int_default_pins: rtc-int-default-pins {
265 pinctrl-single,pins = <
266 /* external pull-up on Carrier */
267 AM64X_IOPAD(0x00b4, PIN_INPUT, 7) /* GPMC0_CSn3.GPIO0_44 */
268 >;
269 };
270
271 serdes_mux_default_pins: serdes-mux-default-pins {
272 pinctrl-single,pins = <
273 /* SEL, 10k pull-down on carrier, 2.2k pullup on SoM */
274 AM64X_IOPAD(0x0200, PIN_OUTPUT, 7) /* PRG0_MDIO0_MDIO.GPIO1_40 */
275 /* EN */
276 AM64X_IOPAD(0x0204, PIN_OUTPUT, 7) /* PRG0_MDIO0_MDC.GPIO1_41 */
277 >;
278 };
279 };
280
281 &main_uart3 {
282 pinctrl-names = "default";
283 pinctrl-0 = <&main_uart3_default_pins>;
284 uart-has-rtscts;
285 linux,rs485-enabled-at-boot-time;
286 status = "okay";
287 };
288
289 &usb0 {
290 dr_mode = "host";
291 };
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