1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
2 /*
3 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
4 */
5
6 /dts-v1/;
7
8 #include "k3-am654.dtsi"
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/net/ti-dp83867.h>
11
12 / {
13 compatible = "ti,am654-evm", "ti,am654";
14 model = "Texas Instruments AM654 Base Board";
15
16 aliases {
17 serial0 = &wkup_uart0;
18 serial1 = &mcu_uart0;
19 serial2 = &main_uart0;
20 i2c0 = &wkup_i2c0;
21 i2c1 = &mcu_i2c0;
22 i2c2 = &main_i2c0;
23 i2c3 = &main_i2c1;
24 i2c4 = &main_i2c2;
25 ethernet0 = &cpsw_port1;
26 mmc0 = &sdhci0;
27 mmc1 = &sdhci1;
28 };
29
30 chosen {
31 stdout-path = "serial2:115200n8";
32 };
33
34 memory@80000000 {
35 device_type = "memory";
36 bootph-all;
37 /* 4G RAM */
38 reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
39 <0x00000008 0x80000000 0x00000000 0x80000000>;
40 };
41
42 reserved-memory {
43 #address-cells = <2>;
44 #size-cells = <2>;
45 ranges;
46
47 secure_ddr: secure-ddr@9e800000 {
48 reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
49 alignment = <0x1000>;
50 no-map;
51 };
52
53 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
54 compatible = "shared-dma-pool";
55 reg = <0 0xa0000000 0 0x100000>;
56 no-map;
57 };
58
59 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
60 compatible = "shared-dma-pool";
61 reg = <0 0xa0100000 0 0xf00000>;
62 no-map;
63 };
64
65 mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
66 compatible = "shared-dma-pool";
67 reg = <0 0xa1000000 0 0x100000>;
68 no-map;
69 };
70
71 mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
72 compatible = "shared-dma-pool";
73 reg = <0 0xa1100000 0 0xf00000>;
74 no-map;
75 };
76
77 rtos_ipc_memory_region: ipc-memories@a2000000 {
78 reg = <0x00 0xa2000000 0x00 0x00100000>;
79 alignment = <0x1000>;
80 no-map;
81 };
82 };
83
84 gpio-keys {
85 compatible = "gpio-keys";
86 autorepeat;
87 pinctrl-names = "default";
88 pinctrl-0 = <&push_button_pins_default>;
89
90 switch-5 {
91 label = "GPIO Key USER1";
92 linux,code = <BTN_0>;
93 gpios = <&wkup_gpio0 24 GPIO_ACTIVE_LOW>;
94 };
95
96 switch-6 {
97 label = "GPIO Key USER2";
98 linux,code = <BTN_1>;
99 gpios = <&wkup_gpio0 27 GPIO_ACTIVE_LOW>;
100 };
101 };
102
103 evm_12v0: regulator-0 {
104 /* main supply */
105 compatible = "regulator-fixed";
106 regulator-name = "evm_12v0";
107 regulator-min-microvolt = <12000000>;
108 regulator-max-microvolt = <12000000>;
109 regulator-always-on;
110 regulator-boot-on;
111 };
112
113 vcc3v3_io: regulator-1 {
114 /* Output of TPS54334 */
115 compatible = "regulator-fixed";
116 regulator-name = "vcc3v3_io";
117 regulator-min-microvolt = <3300000>;
118 regulator-max-microvolt = <3300000>;
119 regulator-always-on;
120 regulator-boot-on;
121 vin-supply = <&evm_12v0>;
122 };
123
124 vdd_mmc1_sd: regulator-2 {
125 compatible = "regulator-fixed";
126 regulator-name = "vdd_mmc1_sd";
127 regulator-min-microvolt = <3300000>;
128 regulator-max-microvolt = <3300000>;
129 regulator-boot-on;
130 enable-active-high;
131 vin-supply = <&vcc3v3_io>;
132 gpio = <&pca9554 4 GPIO_ACTIVE_HIGH>;
133 };
134
135 vtt_supply: regulator-3 {
136 compatible = "regulator-fixed";
137 regulator-name = "vtt";
138 pinctrl-names = "default";
139 pinctrl-0 = <&ddr_vtt_pins_default>;
140 regulator-min-microvolt = <3300000>;
141 regulator-max-microvolt = <3300000>;
142 enable-active-high;
143 regulator-always-on;
144 regulator-boot-on;
145 vin-supply = <&vcc3v3_io>;
146 gpio = <&wkup_gpio0 28 GPIO_ACTIVE_HIGH>;
147 };
148 };
149
150 &wkup_pmx0 {
151 wkup_uart0_pins_default: wkup-uart0-default-pins {
152 pinctrl-single,pins = <
153 AM65X_WKUP_IOPAD(0x00a0, PIN_INPUT, 0) /* (AB1) WKUP_UART0_RXD */
154 AM65X_WKUP_IOPAD(0x00a4, PIN_OUTPUT, 0) /* (AB5) WKUP_UART0_TXD */
155 AM65X_WKUP_IOPAD(0x00c8, PIN_INPUT, 1) /* (AC2) WKUP_GPIO0_6.WKUP_UART0_CTSn */
156 AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 1) /* (AC1) WKUP_GPIO0_7.WKUP_UART0_RTSn */
157 >;
158 };
159
160 ddr_vtt_pins_default: ddr-vtt-default-pins {
161 pinctrl-single,pins = <
162 AM65X_WKUP_IOPAD(0x0040, PIN_OUTPUT_PULLUP, 7) /* WKUP_GPIO0_28 */
163 >;
164 };
165
166 wkup_i2c0_pins_default: wkup-i2c0-default-pins {
167 pinctrl-single,pins = <
168 AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
169 AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
170 >;
171 };
172
173 push_button_pins_default: push-button-default-pins {
174 pinctrl-single,pins = <
175 AM65X_WKUP_IOPAD(0x0030, PIN_INPUT, 7) /* (R5) WKUP_GPIO0_24 */
176 AM65X_WKUP_IOPAD(0x003c, PIN_INPUT, 7) /* (P2) WKUP_GPIO0_27 */
177 >;
178 };
179
180 mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
181 pinctrl-single,pins = <
182 AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */
183 AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */
184 AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* (U4) MCU_OSPI0_D0 */
185 AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5) MCU_OSPI0_D1 */
186 AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* (T2) MCU_OSPI0_D2 */
187 AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* (T3) MCU_OSPI0_D3 */
188 AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* (T4) MCU_OSPI0_D4 */
189 AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* (T5) MCU_OSPI0_D5 */
190 AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* (R2) MCU_OSPI0_D6 */
191 AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* (R3) MCU_OSPI0_D7 */
192 AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */
193 >;
194 };
195
196 wkup_pca554_default: wkup-pca554-default-pins {
197 pinctrl-single,pins = <
198 AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */
199 >;
200 };
201
202 mcu_uart0_pins_default: mcu-uart0-default-pins {
203 pinctrl-single,pins = <
204 AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4) /* (P4) MCU_OSPI1_D1.MCU_UART0_RXD */
205 AM65X_WKUP_IOPAD(0x0048, PIN_OUTPUT, 4) /* (P5) MCU_OSPI1_D2.MCU_UART0_TXD */
206 AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4) /* (P1) MCU_OSPI1_D3.MCU_UART0_CTSn */
207 AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4) /* (N3) MCU_OSPI1_CSn1.MCU_UART0_RTSn */
208 >;
209 };
210
211 mcu_cpsw_pins_default: mcu-cpsw-default-pins {
212 pinctrl-single,pins = <
213 AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* (N4) MCU_RGMII1_TX_CTL */
214 AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* (N5) MCU_RGMII1_RX_CTL */
215 AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* (M2) MCU_RGMII1_TD3 */
216 AM65X_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* (M3) MCU_RGMII1_TD2 */
217 AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* (M4) MCU_RGMII1_TD1 */
218 AM65X_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* (M5) MCU_RGMII1_TD0 */
219 AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* (L2) MCU_RGMII1_RD3 */
220 AM65X_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* (L5) MCU_RGMII1_RD2 */
221 AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* (M6) MCU_RGMII1_RD1 */
222 AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* (L6) MCU_RGMII1_RD0 */
223 AM65X_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* (N1) MCU_RGMII1_TXC */
224 AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* (M1) MCU_RGMII1_RXC */
225 >;
226 };
227
228 mcu_mdio_pins_default: mcu-mdio1-default-pins {
229 pinctrl-single,pins = <
230 AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
231 AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
232 >;
233 };
234
235 mcu_i2c0_pins_default: mcu-i2c0-default-pins {
236 pinctrl-single,pins = <
237 AM65X_WKUP_IOPAD(0x00e8, PIN_INPUT, 0) /* (AD8) MCU_I2C0_SCL */
238 AM65X_WKUP_IOPAD(0x00ec, PIN_INPUT, 0) /* (AD7) MCU_I2C0_SDA */
239 >;
240 };
241 };
242
243 &main_pmx0 {
244 main_uart0_pins_default: main-uart0-default-pins {
245 pinctrl-single,pins = <
246 AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */
247 AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */
248 AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */
249 AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */
250 >;
251 };
252
253 main_i2c2_pins_default: main-i2c2-default-pins {
254 pinctrl-single,pins = <
255 AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */
256 AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */
257 >;
258 };
259
260 main_spi0_pins_default: main-spi0-default-pins {
261 pinctrl-single,pins = <
262 AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */
263 AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */
264 AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */
265 AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */
266 >;
267 };
268
269 main_mmc0_pins_default: main-mmc0-default-pins {
270 pinctrl-single,pins = <
271 AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
272 AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
273 AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
274 AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
275 AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
276 AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
277 AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
278 AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
279 AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
280 AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
281 AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */
282 AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
283 >;
284 };
285
286 main_mmc1_pins_default: main-mmc1-default-pins {
287 pinctrl-single,pins = <
288 AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
289 AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
290 AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */
291 AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */
292 AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */
293 AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
294 AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
295 AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */
296 >;
297 };
298
299 usb1_pins_default: usb1-default-pins {
300 pinctrl-single,pins = <
301 AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */
302 >;
303 };
304 };
305
306 &main_pmx1 {
307 main_i2c0_pins_default: main-i2c0-default-pins {
308 pinctrl-single,pins = <
309 AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
310 AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
311 >;
312 };
313
314 main_i2c1_pins_default: main-i2c1-default-pins {
315 pinctrl-single,pins = <
316 AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
317 AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
318 >;
319 };
320
321 ecap0_pins_default: ecap0-default-pins {
322 pinctrl-single,pins = <
323 AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */
324 >;
325 };
326 };
327
328 &wkup_uart0 {
329 /* Wakeup UART is used by System firmware */
330 status = "reserved";
331 pinctrl-names = "default";
332 pinctrl-0 = <&wkup_uart0_pins_default>;
333 };
334
335 &mcu_uart0 {
336 status = "okay";
337 pinctrl-names = "default";
338 pinctrl-0 = <&mcu_uart0_pins_default>;
339 };
340
341 &main_uart0 {
342 status = "okay";
343 pinctrl-names = "default";
344 pinctrl-0 = <&main_uart0_pins_default>;
345 power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
346 };
347
348 &wkup_i2c0 {
349 status = "okay";
350 pinctrl-names = "default";
351 pinctrl-0 = <&wkup_i2c0_pins_default>;
352 clock-frequency = <400000>;
353
354 eeprom@50 {
355 /* AT24CM01 */
356 compatible = "atmel,24c1024";
357 reg = <0x50>;
358 };
359
360 vdd_mpu: regulator@60 {
361 compatible = "ti,tps62363";
362 reg = <0x60>;
363 regulator-name = "VDD_MPU";
364 regulator-min-microvolt = <500000>;
365 regulator-max-microvolt = <1770000>;
366 regulator-always-on;
367 regulator-boot-on;
368 ti,vsel0-state-high;
369 ti,vsel1-state-high;
370 ti,enable-vout-discharge;
371 };
372
373 gpio@38 {
374 compatible = "nxp,pca9554";
375 reg = <0x38>;
376 gpio-controller;
377 #gpio-cells = <2>;
378 };
379
380 pca9554: gpio@39 {
381 compatible = "nxp,pca9554";
382 reg = <0x39>;
383 gpio-controller;
384 #gpio-cells = <2>;
385 pinctrl-names = "default";
386 pinctrl-0 = <&wkup_pca554_default>;
387 interrupt-parent = <&wkup_gpio0>;
388 interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
389 interrupt-controller;
390 #interrupt-cells = <2>;
391 };
392 };
393
394 &mcu_i2c0 {
395 status = "okay";
396 pinctrl-names = "default";
397 pinctrl-0 = <&mcu_i2c0_pins_default>;
398 clock-frequency = <400000>;
399 };
400
401 &main_i2c0 {
402 status = "okay";
403 pinctrl-names = "default";
404 pinctrl-0 = <&main_i2c0_pins_default>;
405 clock-frequency = <400000>;
406
407 pca9555: gpio@21 {
408 compatible = "nxp,pca9555";
409 reg = <0x21>;
410 gpio-controller;
411 #gpio-cells = <2>;
412 };
413 };
414
415 &main_i2c1 {
416 status = "okay";
417 pinctrl-names = "default";
418 pinctrl-0 = <&main_i2c1_pins_default>;
419 clock-frequency = <400000>;
420 };
421
422 &main_i2c2 {
423 status = "okay";
424 pinctrl-names = "default";
425 pinctrl-0 = <&main_i2c2_pins_default>;
426 clock-frequency = <400000>;
427 };
428
429 &ecap0 {
430 status = "okay";
431 pinctrl-names = "default";
432 pinctrl-0 = <&ecap0_pins_default>;
433 };
434
435 &main_spi0 {
436 status = "okay";
437 pinctrl-names = "default";
438 pinctrl-0 = <&main_spi0_pins_default>;
439 #address-cells = <1>;
440 #size-cells = <0>;
441 ti,pindir-d0-out-d1-in;
442
443 flash@0 {
444 compatible = "jedec,spi-nor";
445 reg = <0x0>;
446 spi-tx-bus-width = <1>;
447 spi-rx-bus-width = <1>;
448 spi-max-frequency = <48000000>;
449 };
450 };
451
452 &sdhci0 {
453 status = "okay";
454 pinctrl-names = "default";
455 pinctrl-0 = <&main_mmc0_pins_default>;
456 bus-width = <8>;
457 non-removable;
458 ti,driver-strength-ohm = <50>;
459 disable-wp;
460 };
461
462 /*
463 * Because of erratas i2025 and i2026 for silicon revision 1.0, the
464 * SD card interface might fail. Boards with sr1.0 are recommended to
465 * disable sdhci1
466 */
467 &sdhci1 {
468 status = "okay";
469 vmmc-supply = <&vdd_mmc1_sd>;
470 pinctrl-names = "default";
471 pinctrl-0 = <&main_mmc1_pins_default>;
472 ti,driver-strength-ohm = <50>;
473 disable-wp;
474 };
475
476 &usb1 {
477 pinctrl-names = "default";
478 pinctrl-0 = <&usb1_pins_default>;
479 dr_mode = "otg";
480 };
481
482 &dwc3_0 {
483 status = "disabled";
484 };
485
486 &usb0_phy {
487 status = "disabled";
488 };
489
490 &tscadc0 {
491 status = "okay";
492 adc {
493 ti,adc-channels = <0 1 2 3 4 5 6 7>;
494 };
495 };
496
497 &tscadc1 {
498 status = "okay";
499 adc {
500 ti,adc-channels = <0 1 2 3 4 5 6 7>;
501 };
502 };
503
504 &serdes0 {
505 status = "disabled";
506 };
507
508 &serdes1 {
509 status = "disabled";
510 };
511
512 &mailbox0_cluster0 {
513 status = "okay";
514 interrupts = <436>;
515
516 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
517 ti,mbox-tx = <1 0 0>;
518 ti,mbox-rx = <0 0 0>;
519 };
520 };
521
522 &mailbox0_cluster1 {
523 status = "okay";
524 interrupts = <432>;
525
526 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
527 ti,mbox-tx = <1 0 0>;
528 ti,mbox-rx = <0 0 0>;
529 };
530 };
531
532 &mcu_r5fss0_core0 {
533 memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
534 <&mcu_r5fss0_core0_memory_region>;
535 mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
536 };
537
538 &mcu_r5fss0_core1 {
539 memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
540 <&mcu_r5fss0_core1_memory_region>;
541 mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
542 };
543
544 &ospi0 {
545 status = "okay";
546 pinctrl-names = "default";
547 pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
548
549 flash@0 {
550 compatible = "jedec,spi-nor";
551 reg = <0x0>;
552 spi-tx-bus-width = <8>;
553 spi-rx-bus-width = <8>;
554 spi-max-frequency = <25000000>;
555 cdns,tshsl-ns = <60>;
556 cdns,tsd2d-ns = <60>;
557 cdns,tchsh-ns = <60>;
558 cdns,tslch-ns = <60>;
559 cdns,read-delay = <0>;
560
561 partitions {
562 compatible = "fixed-partitions";
563 #address-cells = <1>;
564 #size-cells = <1>;
565
566 partition@0 {
567 label = "ospi.tiboot3";
568 reg = <0x0 0x80000>;
569 };
570
571 partition@80000 {
572 label = "ospi.tispl";
573 reg = <0x80000 0x200000>;
574 };
575
576 partition@280000 {
577 label = "ospi.u-boot";
578 reg = <0x280000 0x400000>;
579 };
580
581 partition@680000 {
582 label = "ospi.env";
583 reg = <0x680000 0x20000>;
584 };
585
586 partition@6a0000 {
587 label = "ospi.env.backup";
588 reg = <0x6a0000 0x20000>;
589 };
590
591 partition@6c0000 {
592 label = "ospi.sysfw";
593 reg = <0x6c0000 0x100000>;
594 };
595
596 partition@800000 {
597 label = "ospi.rootfs";
598 reg = <0x800000 0x37c0000>;
599 };
600
601 partition@3fe0000 {
602 label = "ospi.phypattern";
603 reg = <0x3fe0000 0x20000>;
604 };
605 };
606 };
607 };
608
609 &mcu_cpsw {
610 pinctrl-names = "default";
611 pinctrl-0 = <&mcu_cpsw_pins_default>;
612 };
613
614 &davinci_mdio {
615 status = "okay";
616 pinctrl-names = "default";
617 pinctrl-0 = <&mcu_mdio_pins_default>;
618
619 phy0: ethernet-phy@0 {
620 reg = <0>;
621 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
622 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
623 };
624 };
625
626 &cpsw_port1 {
627 phy-mode = "rgmii-rxid";
628 phy-handle = <&phy0>;
629 };
630
631 &dss {
632 status = "disabled";
633 };
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