1 // SPDX-License-Identifier: GPL-2.0 2 3 #ifndef __ASM_APPLE_M1_PMU_h 4 #define __ASM_APPLE_M1_PMU_h 5 6 #include <linux/bits.h> 7 #include <asm/sysreg.h> 8 9 /* Counters */ 10 #define SYS_IMP_APL_PMC0_EL1 sys_reg(3, 2, 15, 0, 0) 11 #define SYS_IMP_APL_PMC1_EL1 sys_reg(3, 2, 15, 1, 0) 12 #define SYS_IMP_APL_PMC2_EL1 sys_reg(3, 2, 15, 2, 0) 13 #define SYS_IMP_APL_PMC3_EL1 sys_reg(3, 2, 15, 3, 0) 14 #define SYS_IMP_APL_PMC4_EL1 sys_reg(3, 2, 15, 4, 0) 15 #define SYS_IMP_APL_PMC5_EL1 sys_reg(3, 2, 15, 5, 0) 16 #define SYS_IMP_APL_PMC6_EL1 sys_reg(3, 2, 15, 6, 0) 17 #define SYS_IMP_APL_PMC7_EL1 sys_reg(3, 2, 15, 7, 0) 18 #define SYS_IMP_APL_PMC8_EL1 sys_reg(3, 2, 15, 9, 0) 19 #define SYS_IMP_APL_PMC9_EL1 sys_reg(3, 2, 15, 10, 0) 20 21 /* Core PMC control register */ 22 #define SYS_IMP_APL_PMCR0_EL1 sys_reg(3, 1, 15, 0, 0) 23 #define PMCR0_CNT_ENABLE_0_7 GENMASK(7, 0) 24 #define PMCR0_IMODE GENMASK(10, 8) 25 #define PMCR0_IMODE_OFF 0 26 #define PMCR0_IMODE_PMI 1 27 #define PMCR0_IMODE_AIC 2 28 #define PMCR0_IMODE_HALT 3 29 #define PMCR0_IMODE_FIQ 4 30 #define PMCR0_IACT BIT(11) 31 #define PMCR0_PMI_ENABLE_0_7 GENMASK(19, 12) 32 #define PMCR0_STOP_CNT_ON_PMI BIT(20) 33 #define PMCR0_CNT_GLOB_L2C_EVT BIT(21) 34 #define PMCR0_DEFER_PMI_TO_ERET BIT(22) 35 #define PMCR0_ALLOW_CNT_EN_EL0 BIT(30) 36 #define PMCR0_CNT_ENABLE_8_9 GENMASK(33, 32) 37 #define PMCR0_PMI_ENABLE_8_9 GENMASK(45, 44) 38 39 #define SYS_IMP_APL_PMCR1_EL1 sys_reg(3, 1, 15, 1, 0) 40 #define PMCR1_COUNT_A64_EL0_0_7 GENMASK(15, 8) 41 #define PMCR1_COUNT_A64_EL1_0_7 GENMASK(23, 16) 42 #define PMCR1_COUNT_A64_EL0_8_9 GENMASK(41, 40) 43 #define PMCR1_COUNT_A64_EL1_8_9 GENMASK(49, 48) 44 45 #define SYS_IMP_APL_PMCR2_EL1 sys_reg(3, 1, 15, 2, 0) 46 #define SYS_IMP_APL_PMCR3_EL1 sys_reg(3, 1, 15, 3, 0) 47 #define SYS_IMP_APL_PMCR4_EL1 sys_reg(3, 1, 15, 4, 0) 48 49 #define SYS_IMP_APL_PMESR0_EL1 sys_reg(3, 1, 15, 5, 0) 50 #define PMESR0_EVT_CNT_2 GENMASK(7, 0) 51 #define PMESR0_EVT_CNT_3 GENMASK(15, 8) 52 #define PMESR0_EVT_CNT_4 GENMASK(23, 16) 53 #define PMESR0_EVT_CNT_5 GENMASK(31, 24) 54 55 #define SYS_IMP_APL_PMESR1_EL1 sys_reg(3, 1, 15, 6, 0) 56 #define PMESR1_EVT_CNT_6 GENMASK(7, 0) 57 #define PMESR1_EVT_CNT_7 GENMASK(15, 8) 58 #define PMESR1_EVT_CNT_8 GENMASK(23, 16) 59 #define PMESR1_EVT_CNT_9 GENMASK(31, 24) 60 61 #define SYS_IMP_APL_PMSR_EL1 sys_reg(3, 1, 15, 13, 0) 62 #define PMSR_OVERFLOW GENMASK(9, 0) 63 64 #endif /* __ASM_APPLE_M1_PMU_h */ 65
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