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TOMOYO Linux Cross Reference
Linux/arch/arm64/include/asm/kvm_hyp.h

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  1 /* SPDX-License-Identifier: GPL-2.0-only */
  2 /*
  3  * Copyright (C) 2015 - ARM Ltd
  4  * Author: Marc Zyngier <marc.zyngier@arm.com>
  5  */
  6 
  7 #ifndef __ARM64_KVM_HYP_H__
  8 #define __ARM64_KVM_HYP_H__
  9 
 10 #include <linux/compiler.h>
 11 #include <linux/kvm_host.h>
 12 #include <asm/alternative.h>
 13 #include <asm/sysreg.h>
 14 
 15 DECLARE_PER_CPU(struct kvm_cpu_context, kvm_hyp_ctxt);
 16 DECLARE_PER_CPU(unsigned long, kvm_hyp_vector);
 17 DECLARE_PER_CPU(struct kvm_nvhe_init_params, kvm_init_params);
 18 
 19 /*
 20  * Unified accessors for registers that have a different encoding
 21  * between VHE and non-VHE. They must be specified without their "ELx"
 22  * encoding, but with the SYS_ prefix, as defined in asm/sysreg.h.
 23  */
 24 
 25 #if defined(__KVM_VHE_HYPERVISOR__)
 26 
 27 #define read_sysreg_el0(r)      read_sysreg_s(r##_EL02)
 28 #define write_sysreg_el0(v,r)   write_sysreg_s(v, r##_EL02)
 29 #define read_sysreg_el1(r)      read_sysreg_s(r##_EL12)
 30 #define write_sysreg_el1(v,r)   write_sysreg_s(v, r##_EL12)
 31 #define read_sysreg_el2(r)      read_sysreg_s(r##_EL1)
 32 #define write_sysreg_el2(v,r)   write_sysreg_s(v, r##_EL1)
 33 
 34 #else // !__KVM_VHE_HYPERVISOR__
 35 
 36 #if defined(__KVM_NVHE_HYPERVISOR__)
 37 #define VHE_ALT_KEY     ARM64_KVM_HVHE
 38 #else
 39 #define VHE_ALT_KEY     ARM64_HAS_VIRT_HOST_EXTN
 40 #endif
 41 
 42 #define read_sysreg_elx(r,nvh,vh)                                       \
 43         ({                                                              \
 44                 u64 reg;                                                \
 45                 asm volatile(ALTERNATIVE(__mrs_s("%0", r##nvh),         \
 46                                          __mrs_s("%0", r##vh),          \
 47                                          VHE_ALT_KEY)                   \
 48                              : "=r" (reg));                             \
 49                 reg;                                                    \
 50         })
 51 
 52 #define write_sysreg_elx(v,r,nvh,vh)                                    \
 53         do {                                                            \
 54                 u64 __val = (u64)(v);                                   \
 55                 asm volatile(ALTERNATIVE(__msr_s(r##nvh, "%x0"),        \
 56                                          __msr_s(r##vh, "%x0"),         \
 57                                          VHE_ALT_KEY)                   \
 58                                          : : "rZ" (__val));             \
 59         } while (0)
 60 
 61 #define read_sysreg_el0(r)      read_sysreg_elx(r, _EL0, _EL02)
 62 #define write_sysreg_el0(v,r)   write_sysreg_elx(v, r, _EL0, _EL02)
 63 #define read_sysreg_el1(r)      read_sysreg_elx(r, _EL1, _EL12)
 64 #define write_sysreg_el1(v,r)   write_sysreg_elx(v, r, _EL1, _EL12)
 65 #define read_sysreg_el2(r)      read_sysreg_elx(r, _EL2, _EL1)
 66 #define write_sysreg_el2(v,r)   write_sysreg_elx(v, r, _EL2, _EL1)
 67 
 68 #endif  // __KVM_VHE_HYPERVISOR__
 69 
 70 /*
 71  * Without an __arch_swab32(), we fall back to ___constant_swab32(), but the
 72  * static inline can allow the compiler to out-of-line this. KVM always wants
 73  * the macro version as it's always inlined.
 74  */
 75 #define __kvm_swab32(x) ___constant_swab32(x)
 76 
 77 int __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu);
 78 
 79 void __vgic_v3_save_state(struct vgic_v3_cpu_if *cpu_if);
 80 void __vgic_v3_restore_state(struct vgic_v3_cpu_if *cpu_if);
 81 void __vgic_v3_activate_traps(struct vgic_v3_cpu_if *cpu_if);
 82 void __vgic_v3_deactivate_traps(struct vgic_v3_cpu_if *cpu_if);
 83 void __vgic_v3_save_vmcr_aprs(struct vgic_v3_cpu_if *cpu_if);
 84 void __vgic_v3_restore_vmcr_aprs(struct vgic_v3_cpu_if *cpu_if);
 85 int __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu);
 86 
 87 #ifdef __KVM_NVHE_HYPERVISOR__
 88 void __timer_enable_traps(struct kvm_vcpu *vcpu);
 89 void __timer_disable_traps(struct kvm_vcpu *vcpu);
 90 #endif
 91 
 92 #ifdef __KVM_NVHE_HYPERVISOR__
 93 void __sysreg_save_state_nvhe(struct kvm_cpu_context *ctxt);
 94 void __sysreg_restore_state_nvhe(struct kvm_cpu_context *ctxt);
 95 #else
 96 void __vcpu_load_switch_sysregs(struct kvm_vcpu *vcpu);
 97 void __vcpu_put_switch_sysregs(struct kvm_vcpu *vcpu);
 98 void sysreg_save_host_state_vhe(struct kvm_cpu_context *ctxt);
 99 void sysreg_restore_host_state_vhe(struct kvm_cpu_context *ctxt);
100 void sysreg_save_guest_state_vhe(struct kvm_cpu_context *ctxt);
101 void sysreg_restore_guest_state_vhe(struct kvm_cpu_context *ctxt);
102 #endif
103 
104 void __debug_switch_to_guest(struct kvm_vcpu *vcpu);
105 void __debug_switch_to_host(struct kvm_vcpu *vcpu);
106 
107 #ifdef __KVM_NVHE_HYPERVISOR__
108 void __debug_save_host_buffers_nvhe(struct kvm_vcpu *vcpu);
109 void __debug_restore_host_buffers_nvhe(struct kvm_vcpu *vcpu);
110 #endif
111 
112 void __fpsimd_save_state(struct user_fpsimd_state *fp_regs);
113 void __fpsimd_restore_state(struct user_fpsimd_state *fp_regs);
114 void __sve_save_state(void *sve_pffr, u32 *fpsr, int save_ffr);
115 void __sve_restore_state(void *sve_pffr, u32 *fpsr, int restore_ffr);
116 
117 u64 __guest_enter(struct kvm_vcpu *vcpu);
118 
119 bool kvm_host_psci_handler(struct kvm_cpu_context *host_ctxt, u32 func_id);
120 
121 #ifdef __KVM_NVHE_HYPERVISOR__
122 void __noreturn __hyp_do_panic(struct kvm_cpu_context *host_ctxt, u64 spsr,
123                                u64 elr, u64 par);
124 #endif
125 
126 #ifdef __KVM_NVHE_HYPERVISOR__
127 void __pkvm_init_switch_pgd(phys_addr_t pgd, unsigned long sp,
128                 void (*fn)(void));
129 int __pkvm_init(phys_addr_t phys, unsigned long size, unsigned long nr_cpus,
130                 unsigned long *per_cpu_base, u32 hyp_va_bits);
131 void __noreturn __host_enter(struct kvm_cpu_context *host_ctxt);
132 #endif
133 
134 extern u64 kvm_nvhe_sym(id_aa64pfr0_el1_sys_val);
135 extern u64 kvm_nvhe_sym(id_aa64pfr1_el1_sys_val);
136 extern u64 kvm_nvhe_sym(id_aa64isar0_el1_sys_val);
137 extern u64 kvm_nvhe_sym(id_aa64isar1_el1_sys_val);
138 extern u64 kvm_nvhe_sym(id_aa64isar2_el1_sys_val);
139 extern u64 kvm_nvhe_sym(id_aa64mmfr0_el1_sys_val);
140 extern u64 kvm_nvhe_sym(id_aa64mmfr1_el1_sys_val);
141 extern u64 kvm_nvhe_sym(id_aa64mmfr2_el1_sys_val);
142 extern u64 kvm_nvhe_sym(id_aa64smfr0_el1_sys_val);
143 
144 extern unsigned long kvm_nvhe_sym(__icache_flags);
145 extern unsigned int kvm_nvhe_sym(kvm_arm_vmid_bits);
146 extern unsigned int kvm_nvhe_sym(kvm_host_sve_max_vl);
147 
148 #endif /* __ARM64_KVM_HYP_H__ */
149 

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