1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Based on arch/arm/mm/fault.c
4 *
5 * Copyright (C) 1995 Linus Torvalds
6 * Copyright (C) 1995-2004 Russell King
7 * Copyright (C) 2012 ARM Ltd.
8 */
9
10 #include <linux/acpi.h>
11 #include <linux/bitfield.h>
12 #include <linux/extable.h>
13 #include <linux/kfence.h>
14 #include <linux/signal.h>
15 #include <linux/mm.h>
16 #include <linux/hardirq.h>
17 #include <linux/init.h>
18 #include <linux/kasan.h>
19 #include <linux/kprobes.h>
20 #include <linux/uaccess.h>
21 #include <linux/page-flags.h>
22 #include <linux/sched/signal.h>
23 #include <linux/sched/debug.h>
24 #include <linux/highmem.h>
25 #include <linux/perf_event.h>
26 #include <linux/preempt.h>
27 #include <linux/hugetlb.h>
28
29 #include <asm/acpi.h>
30 #include <asm/bug.h>
31 #include <asm/cmpxchg.h>
32 #include <asm/cpufeature.h>
33 #include <asm/efi.h>
34 #include <asm/exception.h>
35 #include <asm/daifflags.h>
36 #include <asm/debug-monitors.h>
37 #include <asm/esr.h>
38 #include <asm/kprobes.h>
39 #include <asm/mte.h>
40 #include <asm/processor.h>
41 #include <asm/sysreg.h>
42 #include <asm/system_misc.h>
43 #include <asm/tlbflush.h>
44 #include <asm/traps.h>
45
46 struct fault_info {
47 int (*fn)(unsigned long far, unsigned long esr,
48 struct pt_regs *regs);
49 int sig;
50 int code;
51 const char *name;
52 };
53
54 static const struct fault_info fault_info[];
55 static struct fault_info debug_fault_info[];
56
57 static inline const struct fault_info *esr_to_fault_info(unsigned long esr)
58 {
59 return fault_info + (esr & ESR_ELx_FSC);
60 }
61
62 static inline const struct fault_info *esr_to_debug_fault_info(unsigned long esr)
63 {
64 return debug_fault_info + DBG_ESR_EVT(esr);
65 }
66
67 static void data_abort_decode(unsigned long esr)
68 {
69 unsigned long iss2 = ESR_ELx_ISS2(esr);
70
71 pr_alert("Data abort info:\n");
72
73 if (esr & ESR_ELx_ISV) {
74 pr_alert(" Access size = %u byte(s)\n",
75 1U << ((esr & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT));
76 pr_alert(" SSE = %lu, SRT = %lu\n",
77 (esr & ESR_ELx_SSE) >> ESR_ELx_SSE_SHIFT,
78 (esr & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT);
79 pr_alert(" SF = %lu, AR = %lu\n",
80 (esr & ESR_ELx_SF) >> ESR_ELx_SF_SHIFT,
81 (esr & ESR_ELx_AR) >> ESR_ELx_AR_SHIFT);
82 } else {
83 pr_alert(" ISV = 0, ISS = 0x%08lx, ISS2 = 0x%08lx\n",
84 esr & ESR_ELx_ISS_MASK, iss2);
85 }
86
87 pr_alert(" CM = %lu, WnR = %lu, TnD = %lu, TagAccess = %lu\n",
88 (esr & ESR_ELx_CM) >> ESR_ELx_CM_SHIFT,
89 (esr & ESR_ELx_WNR) >> ESR_ELx_WNR_SHIFT,
90 (iss2 & ESR_ELx_TnD) >> ESR_ELx_TnD_SHIFT,
91 (iss2 & ESR_ELx_TagAccess) >> ESR_ELx_TagAccess_SHIFT);
92
93 pr_alert(" GCS = %ld, Overlay = %lu, DirtyBit = %lu, Xs = %llu\n",
94 (iss2 & ESR_ELx_GCS) >> ESR_ELx_GCS_SHIFT,
95 (iss2 & ESR_ELx_Overlay) >> ESR_ELx_Overlay_SHIFT,
96 (iss2 & ESR_ELx_DirtyBit) >> ESR_ELx_DirtyBit_SHIFT,
97 (iss2 & ESR_ELx_Xs_MASK) >> ESR_ELx_Xs_SHIFT);
98 }
99
100 static void mem_abort_decode(unsigned long esr)
101 {
102 pr_alert("Mem abort info:\n");
103
104 pr_alert(" ESR = 0x%016lx\n", esr);
105 pr_alert(" EC = 0x%02lx: %s, IL = %u bits\n",
106 ESR_ELx_EC(esr), esr_get_class_string(esr),
107 (esr & ESR_ELx_IL) ? 32 : 16);
108 pr_alert(" SET = %lu, FnV = %lu\n",
109 (esr & ESR_ELx_SET_MASK) >> ESR_ELx_SET_SHIFT,
110 (esr & ESR_ELx_FnV) >> ESR_ELx_FnV_SHIFT);
111 pr_alert(" EA = %lu, S1PTW = %lu\n",
112 (esr & ESR_ELx_EA) >> ESR_ELx_EA_SHIFT,
113 (esr & ESR_ELx_S1PTW) >> ESR_ELx_S1PTW_SHIFT);
114 pr_alert(" FSC = 0x%02lx: %s\n", (esr & ESR_ELx_FSC),
115 esr_to_fault_info(esr)->name);
116
117 if (esr_is_data_abort(esr))
118 data_abort_decode(esr);
119 }
120
121 static inline unsigned long mm_to_pgd_phys(struct mm_struct *mm)
122 {
123 /* Either init_pg_dir or swapper_pg_dir */
124 if (mm == &init_mm)
125 return __pa_symbol(mm->pgd);
126
127 return (unsigned long)virt_to_phys(mm->pgd);
128 }
129
130 /*
131 * Dump out the page tables associated with 'addr' in the currently active mm.
132 */
133 static void show_pte(unsigned long addr)
134 {
135 struct mm_struct *mm;
136 pgd_t *pgdp;
137 pgd_t pgd;
138
139 if (is_ttbr0_addr(addr)) {
140 /* TTBR0 */
141 mm = current->active_mm;
142 if (mm == &init_mm) {
143 pr_alert("[%016lx] user address but active_mm is swapper\n",
144 addr);
145 return;
146 }
147 } else if (is_ttbr1_addr(addr)) {
148 /* TTBR1 */
149 mm = &init_mm;
150 } else {
151 pr_alert("[%016lx] address between user and kernel address ranges\n",
152 addr);
153 return;
154 }
155
156 pr_alert("%s pgtable: %luk pages, %llu-bit VAs, pgdp=%016lx\n",
157 mm == &init_mm ? "swapper" : "user", PAGE_SIZE / SZ_1K,
158 vabits_actual, mm_to_pgd_phys(mm));
159 pgdp = pgd_offset(mm, addr);
160 pgd = READ_ONCE(*pgdp);
161 pr_alert("[%016lx] pgd=%016llx", addr, pgd_val(pgd));
162
163 do {
164 p4d_t *p4dp, p4d;
165 pud_t *pudp, pud;
166 pmd_t *pmdp, pmd;
167 pte_t *ptep, pte;
168
169 if (pgd_none(pgd) || pgd_bad(pgd))
170 break;
171
172 p4dp = p4d_offset(pgdp, addr);
173 p4d = READ_ONCE(*p4dp);
174 pr_cont(", p4d=%016llx", p4d_val(p4d));
175 if (p4d_none(p4d) || p4d_bad(p4d))
176 break;
177
178 pudp = pud_offset(p4dp, addr);
179 pud = READ_ONCE(*pudp);
180 pr_cont(", pud=%016llx", pud_val(pud));
181 if (pud_none(pud) || pud_bad(pud))
182 break;
183
184 pmdp = pmd_offset(pudp, addr);
185 pmd = READ_ONCE(*pmdp);
186 pr_cont(", pmd=%016llx", pmd_val(pmd));
187 if (pmd_none(pmd) || pmd_bad(pmd))
188 break;
189
190 ptep = pte_offset_map(pmdp, addr);
191 if (!ptep)
192 break;
193
194 pte = __ptep_get(ptep);
195 pr_cont(", pte=%016llx", pte_val(pte));
196 pte_unmap(ptep);
197 } while(0);
198
199 pr_cont("\n");
200 }
201
202 /*
203 * This function sets the access flags (dirty, accessed), as well as write
204 * permission, and only to a more permissive setting.
205 *
206 * It needs to cope with hardware update of the accessed/dirty state by other
207 * agents in the system and can safely skip the __sync_icache_dcache() call as,
208 * like __set_ptes(), the PTE is never changed from no-exec to exec here.
209 *
210 * Returns whether or not the PTE actually changed.
211 */
212 int __ptep_set_access_flags(struct vm_area_struct *vma,
213 unsigned long address, pte_t *ptep,
214 pte_t entry, int dirty)
215 {
216 pteval_t old_pteval, pteval;
217 pte_t pte = __ptep_get(ptep);
218
219 if (pte_same(pte, entry))
220 return 0;
221
222 /* only preserve the access flags and write permission */
223 pte_val(entry) &= PTE_RDONLY | PTE_AF | PTE_WRITE | PTE_DIRTY;
224
225 /*
226 * Setting the flags must be done atomically to avoid racing with the
227 * hardware update of the access/dirty state. The PTE_RDONLY bit must
228 * be set to the most permissive (lowest value) of *ptep and entry
229 * (calculated as: a & b == ~(~a | ~b)).
230 */
231 pte_val(entry) ^= PTE_RDONLY;
232 pteval = pte_val(pte);
233 do {
234 old_pteval = pteval;
235 pteval ^= PTE_RDONLY;
236 pteval |= pte_val(entry);
237 pteval ^= PTE_RDONLY;
238 pteval = cmpxchg_relaxed(&pte_val(*ptep), old_pteval, pteval);
239 } while (pteval != old_pteval);
240
241 /* Invalidate a stale read-only entry */
242 if (dirty)
243 flush_tlb_page(vma, address);
244 return 1;
245 }
246
247 static bool is_el1_instruction_abort(unsigned long esr)
248 {
249 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_CUR;
250 }
251
252 static bool is_el1_data_abort(unsigned long esr)
253 {
254 return ESR_ELx_EC(esr) == ESR_ELx_EC_DABT_CUR;
255 }
256
257 static inline bool is_el1_permission_fault(unsigned long addr, unsigned long esr,
258 struct pt_regs *regs)
259 {
260 if (!is_el1_data_abort(esr) && !is_el1_instruction_abort(esr))
261 return false;
262
263 if (esr_fsc_is_permission_fault(esr))
264 return true;
265
266 if (is_ttbr0_addr(addr) && system_uses_ttbr0_pan())
267 return esr_fsc_is_translation_fault(esr) &&
268 (regs->pstate & PSR_PAN_BIT);
269
270 return false;
271 }
272
273 static bool __kprobes is_spurious_el1_translation_fault(unsigned long addr,
274 unsigned long esr,
275 struct pt_regs *regs)
276 {
277 unsigned long flags;
278 u64 par, dfsc;
279
280 if (!is_el1_data_abort(esr) || !esr_fsc_is_translation_fault(esr))
281 return false;
282
283 local_irq_save(flags);
284 asm volatile("at s1e1r, %0" :: "r" (addr));
285 isb();
286 par = read_sysreg_par();
287 local_irq_restore(flags);
288
289 /*
290 * If we now have a valid translation, treat the translation fault as
291 * spurious.
292 */
293 if (!(par & SYS_PAR_EL1_F))
294 return true;
295
296 /*
297 * If we got a different type of fault from the AT instruction,
298 * treat the translation fault as spurious.
299 */
300 dfsc = FIELD_GET(SYS_PAR_EL1_FST, par);
301 return !esr_fsc_is_translation_fault(dfsc);
302 }
303
304 static void die_kernel_fault(const char *msg, unsigned long addr,
305 unsigned long esr, struct pt_regs *regs)
306 {
307 bust_spinlocks(1);
308
309 pr_alert("Unable to handle kernel %s at virtual address %016lx\n", msg,
310 addr);
311
312 kasan_non_canonical_hook(addr);
313
314 mem_abort_decode(esr);
315
316 show_pte(addr);
317 die("Oops", regs, esr);
318 bust_spinlocks(0);
319 make_task_dead(SIGKILL);
320 }
321
322 #ifdef CONFIG_KASAN_HW_TAGS
323 static void report_tag_fault(unsigned long addr, unsigned long esr,
324 struct pt_regs *regs)
325 {
326 /*
327 * SAS bits aren't set for all faults reported in EL1, so we can't
328 * find out access size.
329 */
330 bool is_write = !!(esr & ESR_ELx_WNR);
331 kasan_report((void *)addr, 0, is_write, regs->pc);
332 }
333 #else
334 /* Tag faults aren't enabled without CONFIG_KASAN_HW_TAGS. */
335 static inline void report_tag_fault(unsigned long addr, unsigned long esr,
336 struct pt_regs *regs) { }
337 #endif
338
339 static void do_tag_recovery(unsigned long addr, unsigned long esr,
340 struct pt_regs *regs)
341 {
342
343 report_tag_fault(addr, esr, regs);
344
345 /*
346 * Disable MTE Tag Checking on the local CPU for the current EL.
347 * It will be done lazily on the other CPUs when they will hit a
348 * tag fault.
349 */
350 sysreg_clear_set(sctlr_el1, SCTLR_EL1_TCF_MASK,
351 SYS_FIELD_PREP_ENUM(SCTLR_EL1, TCF, NONE));
352 isb();
353 }
354
355 static bool is_el1_mte_sync_tag_check_fault(unsigned long esr)
356 {
357 unsigned long fsc = esr & ESR_ELx_FSC;
358
359 if (!is_el1_data_abort(esr))
360 return false;
361
362 if (fsc == ESR_ELx_FSC_MTE)
363 return true;
364
365 return false;
366 }
367
368 static void __do_kernel_fault(unsigned long addr, unsigned long esr,
369 struct pt_regs *regs)
370 {
371 const char *msg;
372
373 /*
374 * Are we prepared to handle this kernel fault?
375 * We are almost certainly not prepared to handle instruction faults.
376 */
377 if (!is_el1_instruction_abort(esr) && fixup_exception(regs))
378 return;
379
380 if (WARN_RATELIMIT(is_spurious_el1_translation_fault(addr, esr, regs),
381 "Ignoring spurious kernel translation fault at virtual address %016lx\n", addr))
382 return;
383
384 if (is_el1_mte_sync_tag_check_fault(esr)) {
385 do_tag_recovery(addr, esr, regs);
386
387 return;
388 }
389
390 if (is_el1_permission_fault(addr, esr, regs)) {
391 if (esr & ESR_ELx_WNR)
392 msg = "write to read-only memory";
393 else if (is_el1_instruction_abort(esr))
394 msg = "execute from non-executable memory";
395 else
396 msg = "read from unreadable memory";
397 } else if (addr < PAGE_SIZE) {
398 msg = "NULL pointer dereference";
399 } else {
400 if (esr_fsc_is_translation_fault(esr) &&
401 kfence_handle_page_fault(addr, esr & ESR_ELx_WNR, regs))
402 return;
403
404 msg = "paging request";
405 }
406
407 if (efi_runtime_fixup_exception(regs, msg))
408 return;
409
410 die_kernel_fault(msg, addr, esr, regs);
411 }
412
413 static void set_thread_esr(unsigned long address, unsigned long esr)
414 {
415 current->thread.fault_address = address;
416
417 /*
418 * If the faulting address is in the kernel, we must sanitize the ESR.
419 * From userspace's point of view, kernel-only mappings don't exist
420 * at all, so we report them as level 0 translation faults.
421 * (This is not quite the way that "no mapping there at all" behaves:
422 * an alignment fault not caused by the memory type would take
423 * precedence over translation fault for a real access to empty
424 * space. Unfortunately we can't easily distinguish "alignment fault
425 * not caused by memory type" from "alignment fault caused by memory
426 * type", so we ignore this wrinkle and just return the translation
427 * fault.)
428 */
429 if (!is_ttbr0_addr(current->thread.fault_address)) {
430 switch (ESR_ELx_EC(esr)) {
431 case ESR_ELx_EC_DABT_LOW:
432 /*
433 * These bits provide only information about the
434 * faulting instruction, which userspace knows already.
435 * We explicitly clear bits which are architecturally
436 * RES0 in case they are given meanings in future.
437 * We always report the ESR as if the fault was taken
438 * to EL1 and so ISV and the bits in ISS[23:14] are
439 * clear. (In fact it always will be a fault to EL1.)
440 */
441 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL |
442 ESR_ELx_CM | ESR_ELx_WNR;
443 esr |= ESR_ELx_FSC_FAULT;
444 break;
445 case ESR_ELx_EC_IABT_LOW:
446 /*
447 * Claim a level 0 translation fault.
448 * All other bits are architecturally RES0 for faults
449 * reported with that DFSC value, so we clear them.
450 */
451 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL;
452 esr |= ESR_ELx_FSC_FAULT;
453 break;
454 default:
455 /*
456 * This should never happen (entry.S only brings us
457 * into this code for insn and data aborts from a lower
458 * exception level). Fail safe by not providing an ESR
459 * context record at all.
460 */
461 WARN(1, "ESR 0x%lx is not DABT or IABT from EL0\n", esr);
462 esr = 0;
463 break;
464 }
465 }
466
467 current->thread.fault_code = esr;
468 }
469
470 static void do_bad_area(unsigned long far, unsigned long esr,
471 struct pt_regs *regs)
472 {
473 unsigned long addr = untagged_addr(far);
474
475 /*
476 * If we are in kernel mode at this point, we have no context to
477 * handle this fault with.
478 */
479 if (user_mode(regs)) {
480 const struct fault_info *inf = esr_to_fault_info(esr);
481
482 set_thread_esr(addr, esr);
483 arm64_force_sig_fault(inf->sig, inf->code, far, inf->name);
484 } else {
485 __do_kernel_fault(addr, esr, regs);
486 }
487 }
488
489 static bool is_el0_instruction_abort(unsigned long esr)
490 {
491 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_LOW;
492 }
493
494 /*
495 * Note: not valid for EL1 DC IVAC, but we never use that such that it
496 * should fault. EL0 cannot issue DC IVAC (undef).
497 */
498 static bool is_write_abort(unsigned long esr)
499 {
500 return (esr & ESR_ELx_WNR) && !(esr & ESR_ELx_CM);
501 }
502
503 static int __kprobes do_page_fault(unsigned long far, unsigned long esr,
504 struct pt_regs *regs)
505 {
506 const struct fault_info *inf;
507 struct mm_struct *mm = current->mm;
508 vm_fault_t fault;
509 unsigned long vm_flags;
510 unsigned int mm_flags = FAULT_FLAG_DEFAULT;
511 unsigned long addr = untagged_addr(far);
512 struct vm_area_struct *vma;
513 int si_code;
514
515 if (kprobe_page_fault(regs, esr))
516 return 0;
517
518 /*
519 * If we're in an interrupt or have no user context, we must not take
520 * the fault.
521 */
522 if (faulthandler_disabled() || !mm)
523 goto no_context;
524
525 if (user_mode(regs))
526 mm_flags |= FAULT_FLAG_USER;
527
528 /*
529 * vm_flags tells us what bits we must have in vma->vm_flags
530 * for the fault to be benign, __do_page_fault() would check
531 * vma->vm_flags & vm_flags and returns an error if the
532 * intersection is empty
533 */
534 if (is_el0_instruction_abort(esr)) {
535 /* It was exec fault */
536 vm_flags = VM_EXEC;
537 mm_flags |= FAULT_FLAG_INSTRUCTION;
538 } else if (is_write_abort(esr)) {
539 /* It was write fault */
540 vm_flags = VM_WRITE;
541 mm_flags |= FAULT_FLAG_WRITE;
542 } else {
543 /* It was read fault */
544 vm_flags = VM_READ;
545 /* Write implies read */
546 vm_flags |= VM_WRITE;
547 /* If EPAN is absent then exec implies read */
548 if (!alternative_has_cap_unlikely(ARM64_HAS_EPAN))
549 vm_flags |= VM_EXEC;
550 }
551
552 if (is_ttbr0_addr(addr) && is_el1_permission_fault(addr, esr, regs)) {
553 if (is_el1_instruction_abort(esr))
554 die_kernel_fault("execution of user memory",
555 addr, esr, regs);
556
557 if (!search_exception_tables(regs->pc))
558 die_kernel_fault("access to user memory outside uaccess routines",
559 addr, esr, regs);
560 }
561
562 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
563
564 if (!(mm_flags & FAULT_FLAG_USER))
565 goto lock_mmap;
566
567 vma = lock_vma_under_rcu(mm, addr);
568 if (!vma)
569 goto lock_mmap;
570
571 if (!(vma->vm_flags & vm_flags)) {
572 vma_end_read(vma);
573 fault = 0;
574 si_code = SEGV_ACCERR;
575 count_vm_vma_lock_event(VMA_LOCK_SUCCESS);
576 goto bad_area;
577 }
578 fault = handle_mm_fault(vma, addr, mm_flags | FAULT_FLAG_VMA_LOCK, regs);
579 if (!(fault & (VM_FAULT_RETRY | VM_FAULT_COMPLETED)))
580 vma_end_read(vma);
581
582 if (!(fault & VM_FAULT_RETRY)) {
583 count_vm_vma_lock_event(VMA_LOCK_SUCCESS);
584 goto done;
585 }
586 count_vm_vma_lock_event(VMA_LOCK_RETRY);
587 if (fault & VM_FAULT_MAJOR)
588 mm_flags |= FAULT_FLAG_TRIED;
589
590 /* Quick path to respond to signals */
591 if (fault_signal_pending(fault, regs)) {
592 if (!user_mode(regs))
593 goto no_context;
594 return 0;
595 }
596 lock_mmap:
597
598 retry:
599 vma = lock_mm_and_find_vma(mm, addr, regs);
600 if (unlikely(!vma)) {
601 fault = 0;
602 si_code = SEGV_MAPERR;
603 goto bad_area;
604 }
605
606 if (!(vma->vm_flags & vm_flags)) {
607 mmap_read_unlock(mm);
608 fault = 0;
609 si_code = SEGV_ACCERR;
610 goto bad_area;
611 }
612
613 fault = handle_mm_fault(vma, addr, mm_flags, regs);
614 /* Quick path to respond to signals */
615 if (fault_signal_pending(fault, regs)) {
616 if (!user_mode(regs))
617 goto no_context;
618 return 0;
619 }
620
621 /* The fault is fully completed (including releasing mmap lock) */
622 if (fault & VM_FAULT_COMPLETED)
623 return 0;
624
625 if (fault & VM_FAULT_RETRY) {
626 mm_flags |= FAULT_FLAG_TRIED;
627 goto retry;
628 }
629 mmap_read_unlock(mm);
630
631 done:
632 /* Handle the "normal" (no error) case first. */
633 if (likely(!(fault & VM_FAULT_ERROR)))
634 return 0;
635
636 si_code = SEGV_MAPERR;
637 bad_area:
638 /*
639 * If we are in kernel mode at this point, we have no context to
640 * handle this fault with.
641 */
642 if (!user_mode(regs))
643 goto no_context;
644
645 if (fault & VM_FAULT_OOM) {
646 /*
647 * We ran out of memory, call the OOM killer, and return to
648 * userspace (which will retry the fault, or kill us if we got
649 * oom-killed).
650 */
651 pagefault_out_of_memory();
652 return 0;
653 }
654
655 inf = esr_to_fault_info(esr);
656 set_thread_esr(addr, esr);
657 if (fault & VM_FAULT_SIGBUS) {
658 /*
659 * We had some memory, but were unable to successfully fix up
660 * this page fault.
661 */
662 arm64_force_sig_fault(SIGBUS, BUS_ADRERR, far, inf->name);
663 } else if (fault & (VM_FAULT_HWPOISON_LARGE | VM_FAULT_HWPOISON)) {
664 unsigned int lsb;
665
666 lsb = PAGE_SHIFT;
667 if (fault & VM_FAULT_HWPOISON_LARGE)
668 lsb = hstate_index_to_shift(VM_FAULT_GET_HINDEX(fault));
669
670 arm64_force_sig_mceerr(BUS_MCEERR_AR, far, lsb, inf->name);
671 } else {
672 /* Something tried to access memory that out of memory map */
673 arm64_force_sig_fault(SIGSEGV, si_code, far, inf->name);
674 }
675
676 return 0;
677
678 no_context:
679 __do_kernel_fault(addr, esr, regs);
680 return 0;
681 }
682
683 static int __kprobes do_translation_fault(unsigned long far,
684 unsigned long esr,
685 struct pt_regs *regs)
686 {
687 unsigned long addr = untagged_addr(far);
688
689 if (is_ttbr0_addr(addr))
690 return do_page_fault(far, esr, regs);
691
692 do_bad_area(far, esr, regs);
693 return 0;
694 }
695
696 static int do_alignment_fault(unsigned long far, unsigned long esr,
697 struct pt_regs *regs)
698 {
699 if (IS_ENABLED(CONFIG_COMPAT_ALIGNMENT_FIXUPS) &&
700 compat_user_mode(regs))
701 return do_compat_alignment_fixup(far, regs);
702 do_bad_area(far, esr, regs);
703 return 0;
704 }
705
706 static int do_bad(unsigned long far, unsigned long esr, struct pt_regs *regs)
707 {
708 return 1; /* "fault" */
709 }
710
711 static int do_sea(unsigned long far, unsigned long esr, struct pt_regs *regs)
712 {
713 const struct fault_info *inf;
714 unsigned long siaddr;
715
716 inf = esr_to_fault_info(esr);
717
718 if (user_mode(regs) && apei_claim_sea(regs) == 0) {
719 /*
720 * APEI claimed this as a firmware-first notification.
721 * Some processing deferred to task_work before ret_to_user().
722 */
723 return 0;
724 }
725
726 if (esr & ESR_ELx_FnV) {
727 siaddr = 0;
728 } else {
729 /*
730 * The architecture specifies that the tag bits of FAR_EL1 are
731 * UNKNOWN for synchronous external aborts. Mask them out now
732 * so that userspace doesn't see them.
733 */
734 siaddr = untagged_addr(far);
735 }
736 arm64_notify_die(inf->name, regs, inf->sig, inf->code, siaddr, esr);
737
738 return 0;
739 }
740
741 static int do_tag_check_fault(unsigned long far, unsigned long esr,
742 struct pt_regs *regs)
743 {
744 /*
745 * The architecture specifies that bits 63:60 of FAR_EL1 are UNKNOWN
746 * for tag check faults. Set them to corresponding bits in the untagged
747 * address.
748 */
749 far = (__untagged_addr(far) & ~MTE_TAG_MASK) | (far & MTE_TAG_MASK);
750 do_bad_area(far, esr, regs);
751 return 0;
752 }
753
754 static const struct fault_info fault_info[] = {
755 { do_bad, SIGKILL, SI_KERNEL, "ttbr address size fault" },
756 { do_bad, SIGKILL, SI_KERNEL, "level 1 address size fault" },
757 { do_bad, SIGKILL, SI_KERNEL, "level 2 address size fault" },
758 { do_bad, SIGKILL, SI_KERNEL, "level 3 address size fault" },
759 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 0 translation fault" },
760 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 1 translation fault" },
761 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 2 translation fault" },
762 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 3 translation fault" },
763 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 0 access flag fault" },
764 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 access flag fault" },
765 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 access flag fault" },
766 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 access flag fault" },
767 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 0 permission fault" },
768 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 permission fault" },
769 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 permission fault" },
770 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 permission fault" },
771 { do_sea, SIGBUS, BUS_OBJERR, "synchronous external abort" },
772 { do_tag_check_fault, SIGSEGV, SEGV_MTESERR, "synchronous tag check fault" },
773 { do_bad, SIGKILL, SI_KERNEL, "unknown 18" },
774 { do_sea, SIGKILL, SI_KERNEL, "level -1 (translation table walk)" },
775 { do_sea, SIGKILL, SI_KERNEL, "level 0 (translation table walk)" },
776 { do_sea, SIGKILL, SI_KERNEL, "level 1 (translation table walk)" },
777 { do_sea, SIGKILL, SI_KERNEL, "level 2 (translation table walk)" },
778 { do_sea, SIGKILL, SI_KERNEL, "level 3 (translation table walk)" },
779 { do_sea, SIGBUS, BUS_OBJERR, "synchronous parity or ECC error" }, // Reserved when RAS is implemented
780 { do_bad, SIGKILL, SI_KERNEL, "unknown 25" },
781 { do_bad, SIGKILL, SI_KERNEL, "unknown 26" },
782 { do_sea, SIGKILL, SI_KERNEL, "level -1 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
783 { do_sea, SIGKILL, SI_KERNEL, "level 0 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
784 { do_sea, SIGKILL, SI_KERNEL, "level 1 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
785 { do_sea, SIGKILL, SI_KERNEL, "level 2 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
786 { do_sea, SIGKILL, SI_KERNEL, "level 3 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
787 { do_bad, SIGKILL, SI_KERNEL, "unknown 32" },
788 { do_alignment_fault, SIGBUS, BUS_ADRALN, "alignment fault" },
789 { do_bad, SIGKILL, SI_KERNEL, "unknown 34" },
790 { do_bad, SIGKILL, SI_KERNEL, "unknown 35" },
791 { do_bad, SIGKILL, SI_KERNEL, "unknown 36" },
792 { do_bad, SIGKILL, SI_KERNEL, "unknown 37" },
793 { do_bad, SIGKILL, SI_KERNEL, "unknown 38" },
794 { do_bad, SIGKILL, SI_KERNEL, "unknown 39" },
795 { do_bad, SIGKILL, SI_KERNEL, "unknown 40" },
796 { do_bad, SIGKILL, SI_KERNEL, "level -1 address size fault" },
797 { do_bad, SIGKILL, SI_KERNEL, "unknown 42" },
798 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level -1 translation fault" },
799 { do_bad, SIGKILL, SI_KERNEL, "unknown 44" },
800 { do_bad, SIGKILL, SI_KERNEL, "unknown 45" },
801 { do_bad, SIGKILL, SI_KERNEL, "unknown 46" },
802 { do_bad, SIGKILL, SI_KERNEL, "unknown 47" },
803 { do_bad, SIGKILL, SI_KERNEL, "TLB conflict abort" },
804 { do_bad, SIGKILL, SI_KERNEL, "Unsupported atomic hardware update fault" },
805 { do_bad, SIGKILL, SI_KERNEL, "unknown 50" },
806 { do_bad, SIGKILL, SI_KERNEL, "unknown 51" },
807 { do_bad, SIGKILL, SI_KERNEL, "implementation fault (lockdown abort)" },
808 { do_bad, SIGBUS, BUS_OBJERR, "implementation fault (unsupported exclusive)" },
809 { do_bad, SIGKILL, SI_KERNEL, "unknown 54" },
810 { do_bad, SIGKILL, SI_KERNEL, "unknown 55" },
811 { do_bad, SIGKILL, SI_KERNEL, "unknown 56" },
812 { do_bad, SIGKILL, SI_KERNEL, "unknown 57" },
813 { do_bad, SIGKILL, SI_KERNEL, "unknown 58" },
814 { do_bad, SIGKILL, SI_KERNEL, "unknown 59" },
815 { do_bad, SIGKILL, SI_KERNEL, "unknown 60" },
816 { do_bad, SIGKILL, SI_KERNEL, "section domain fault" },
817 { do_bad, SIGKILL, SI_KERNEL, "page domain fault" },
818 { do_bad, SIGKILL, SI_KERNEL, "unknown 63" },
819 };
820
821 void do_mem_abort(unsigned long far, unsigned long esr, struct pt_regs *regs)
822 {
823 const struct fault_info *inf = esr_to_fault_info(esr);
824 unsigned long addr = untagged_addr(far);
825
826 if (!inf->fn(far, esr, regs))
827 return;
828
829 if (!user_mode(regs))
830 die_kernel_fault(inf->name, addr, esr, regs);
831
832 /*
833 * At this point we have an unrecognized fault type whose tag bits may
834 * have been defined as UNKNOWN. Therefore we only expose the untagged
835 * address to the signal handler.
836 */
837 arm64_notify_die(inf->name, regs, inf->sig, inf->code, addr, esr);
838 }
839 NOKPROBE_SYMBOL(do_mem_abort);
840
841 void do_sp_pc_abort(unsigned long addr, unsigned long esr, struct pt_regs *regs)
842 {
843 arm64_notify_die("SP/PC alignment exception", regs, SIGBUS, BUS_ADRALN,
844 addr, esr);
845 }
846 NOKPROBE_SYMBOL(do_sp_pc_abort);
847
848 /*
849 * __refdata because early_brk64 is __init, but the reference to it is
850 * clobbered at arch_initcall time.
851 * See traps.c and debug-monitors.c:debug_traps_init().
852 */
853 static struct fault_info __refdata debug_fault_info[] = {
854 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware breakpoint" },
855 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware single-step" },
856 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware watchpoint" },
857 { do_bad, SIGKILL, SI_KERNEL, "unknown 3" },
858 { do_bad, SIGTRAP, TRAP_BRKPT, "aarch32 BKPT" },
859 { do_bad, SIGKILL, SI_KERNEL, "aarch32 vector catch" },
860 { early_brk64, SIGTRAP, TRAP_BRKPT, "aarch64 BRK" },
861 { do_bad, SIGKILL, SI_KERNEL, "unknown 7" },
862 };
863
864 void __init hook_debug_fault_code(int nr,
865 int (*fn)(unsigned long, unsigned long, struct pt_regs *),
866 int sig, int code, const char *name)
867 {
868 BUG_ON(nr < 0 || nr >= ARRAY_SIZE(debug_fault_info));
869
870 debug_fault_info[nr].fn = fn;
871 debug_fault_info[nr].sig = sig;
872 debug_fault_info[nr].code = code;
873 debug_fault_info[nr].name = name;
874 }
875
876 /*
877 * In debug exception context, we explicitly disable preemption despite
878 * having interrupts disabled.
879 * This serves two purposes: it makes it much less likely that we would
880 * accidentally schedule in exception context and it will force a warning
881 * if we somehow manage to schedule by accident.
882 */
883 static void debug_exception_enter(struct pt_regs *regs)
884 {
885 preempt_disable();
886
887 /* This code is a bit fragile. Test it. */
888 RCU_LOCKDEP_WARN(!rcu_is_watching(), "exception_enter didn't work");
889 }
890 NOKPROBE_SYMBOL(debug_exception_enter);
891
892 static void debug_exception_exit(struct pt_regs *regs)
893 {
894 preempt_enable_no_resched();
895 }
896 NOKPROBE_SYMBOL(debug_exception_exit);
897
898 void do_debug_exception(unsigned long addr_if_watchpoint, unsigned long esr,
899 struct pt_regs *regs)
900 {
901 const struct fault_info *inf = esr_to_debug_fault_info(esr);
902 unsigned long pc = instruction_pointer(regs);
903
904 debug_exception_enter(regs);
905
906 if (user_mode(regs) && !is_ttbr0_addr(pc))
907 arm64_apply_bp_hardening();
908
909 if (inf->fn(addr_if_watchpoint, esr, regs)) {
910 arm64_notify_die(inf->name, regs, inf->sig, inf->code, pc, esr);
911 }
912
913 debug_exception_exit(regs);
914 }
915 NOKPROBE_SYMBOL(do_debug_exception);
916
917 /*
918 * Used during anonymous page fault handling.
919 */
920 struct folio *vma_alloc_zeroed_movable_folio(struct vm_area_struct *vma,
921 unsigned long vaddr)
922 {
923 gfp_t flags = GFP_HIGHUSER_MOVABLE | __GFP_ZERO;
924
925 /*
926 * If the page is mapped with PROT_MTE, initialise the tags at the
927 * point of allocation and page zeroing as this is usually faster than
928 * separate DC ZVA and STGM.
929 */
930 if (vma->vm_flags & VM_MTE)
931 flags |= __GFP_ZEROTAGS;
932
933 return vma_alloc_folio(flags, 0, vma, vaddr, false);
934 }
935
936 void tag_clear_highpage(struct page *page)
937 {
938 /* Newly allocated page, shouldn't have been tagged yet */
939 WARN_ON_ONCE(!try_page_mte_tagging(page));
940 mte_zero_clear_page_tags(page_address(page));
941 set_page_mte_tagged(page);
942 }
943
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