1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2023 Loongson Technology Corporation Limited
4 */
5
6 /dts-v1/;
7
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/clock/loongson,ls2k-clk.h>
10
11 / {
12 #address-cells = <2>;
13 #size-cells = <2>;
14
15 cpus {
16 #address-cells = <1>;
17 #size-cells = <0>;
18
19 cpu0: cpu@1 {
20 compatible = "loongson,la364";
21 device_type = "cpu";
22 reg = <0x0>;
23 clocks = <&clk LOONGSON2_NODE_CLK>;
24 };
25
26 cpu1: cpu@2 {
27 compatible = "loongson,la364";
28 device_type = "cpu";
29 reg = <0x1>;
30 clocks = <&clk LOONGSON2_NODE_CLK>;
31 };
32 };
33
34 ref_100m: clock-ref-100m {
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
37 clock-frequency = <100000000>;
38 clock-output-names = "ref_100m";
39 };
40
41 cpuintc: interrupt-controller {
42 compatible = "loongson,cpu-interrupt-controller";
43 #interrupt-cells = <1>;
44 interrupt-controller;
45 };
46
47 thermal-zones {
48 cpu-thermal {
49 polling-delay-passive = <1000>;
50 polling-delay = <5000>;
51 thermal-sensors = <&tsensor 0>;
52
53 trips {
54 cpu-alert {
55 temperature = <40000>;
56 hysteresis = <2000>;
57 type = "active";
58 };
59
60 cpu-crit {
61 temperature = <85000>;
62 hysteresis = <5000>;
63 type = "critical";
64 };
65 };
66 };
67 };
68
69 bus@10000000 {
70 compatible = "simple-bus";
71 ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>,
72 <0x0 0x02000000 0x0 0x02000000 0x0 0x02000000>,
73 <0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>,
74 <0xfe 0x0 0xfe 0x0 0x0 0x40000000>;
75 #address-cells = <2>;
76 #size-cells = <2>;
77
78 isa@18400000 {
79 compatible = "isa";
80 #size-cells = <1>;
81 #address-cells = <2>;
82 ranges = <1 0x0 0x0 0x18400000 0x4000>;
83 };
84
85 clk: clock-controller@10010480 {
86 compatible = "loongson,ls2k2000-clk";
87 reg = <0x0 0x10010480 0x0 0x100>;
88 #clock-cells = <1>;
89 clocks = <&ref_100m>;
90 clock-names = "ref_100m";
91 };
92
93 pmc: power-management@100d0000 {
94 compatible = "loongson,ls2k2000-pmc", "loongson,ls2k0500-pmc", "syscon";
95 reg = <0x0 0x100d0000 0x0 0x58>;
96 interrupt-parent = <&eiointc>;
97 interrupts = <47>;
98 loongson,suspend-address = <0x0 0x1c000500>;
99
100 syscon-reboot {
101 compatible = "syscon-reboot";
102 offset = <0x30>;
103 mask = <0x1>;
104 };
105
106 syscon-poweroff {
107 compatible = "syscon-poweroff";
108 regmap = <&pmc>;
109 offset = <0x14>;
110 mask = <0x3c00>;
111 value = <0x3c00>;
112 };
113 };
114
115 tsensor: thermal-sensor@1fe01460 {
116 compatible = "loongson,ls2k2000-thermal";
117 reg = <0x0 0x1fe01460 0x0 0x30>,
118 <0x0 0x1fe0019c 0x0 0x4>;
119 interrupt-parent = <&liointc>;
120 interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
121 #thermal-sensor-cells = <1>;
122 };
123
124 liointc: interrupt-controller@1fe01400 {
125 compatible = "loongson,liointc-1.0";
126 reg = <0x0 0x1fe01400 0x0 0x64>;
127
128 interrupt-controller;
129 #interrupt-cells = <2>;
130 interrupt-parent = <&cpuintc>;
131 interrupts = <2>;
132 interrupt-names = "int0";
133 loongson,parent_int_map = <0xffffffff>, /* int0 */
134 <0x00000000>, /* int1 */
135 <0x00000000>, /* int2 */
136 <0x00000000>; /* int3 */
137 };
138
139 eiointc: interrupt-controller@1fe01600 {
140 compatible = "loongson,ls2k2000-eiointc";
141 reg = <0x0 0x1fe01600 0x0 0xea00>;
142 interrupt-controller;
143 #interrupt-cells = <1>;
144 interrupt-parent = <&cpuintc>;
145 interrupts = <3>;
146 };
147
148 pic: interrupt-controller@10000000 {
149 compatible = "loongson,pch-pic-1.0";
150 reg = <0x0 0x10000000 0x0 0x400>;
151 interrupt-controller;
152 #interrupt-cells = <2>;
153 loongson,pic-base-vec = <0>;
154 interrupt-parent = <&eiointc>;
155 };
156
157 msi: msi-controller@1fe01140 {
158 compatible = "loongson,pch-msi-1.0";
159 reg = <0x0 0x1fe01140 0x0 0x8>;
160 interrupt-controller;
161 #interrupt-cells = <1>;
162 msi-controller;
163 loongson,msi-base-vec = <64>;
164 loongson,msi-num-vecs = <192>;
165 interrupt-parent = <&eiointc>;
166 };
167
168 rtc0: rtc@100d0100 {
169 compatible = "loongson,ls2k2000-rtc", "loongson,ls7a-rtc";
170 reg = <0x0 0x100d0100 0x0 0x100>;
171 interrupt-parent = <&pic>;
172 interrupts = <52 IRQ_TYPE_LEVEL_HIGH>;
173 status = "disabled";
174 };
175
176 uart0: serial@1fe001e0 {
177 compatible = "ns16550a";
178 reg = <0x0 0x1fe001e0 0x0 0x10>;
179 clock-frequency = <100000000>;
180 interrupt-parent = <&liointc>;
181 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
182 no-loopback-test;
183 status = "disabled";
184 };
185
186 pcie@1a000000 {
187 compatible = "loongson,ls2k-pci";
188 reg = <0x0 0x1a000000 0x0 0x02000000>,
189 <0xfe 0x0 0x0 0x20000000>;
190 #address-cells = <3>;
191 #size-cells = <2>;
192 device_type = "pci";
193 msi-parent = <&msi>;
194 bus-range = <0x0 0xff>;
195 ranges = <0x01000000 0x0 0x00008000 0x0 0x18408000 0x0 0x00008000>,
196 <0x02000000 0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>;
197
198 gmac0: ethernet@3,0 {
199 reg = <0x1800 0x0 0x0 0x0 0x0>;
200 interrupts = <12 IRQ_TYPE_LEVEL_HIGH>,
201 <13 IRQ_TYPE_LEVEL_HIGH>;
202 interrupt-names = "macirq", "eth_lpi";
203 interrupt-parent = <&pic>;
204 status = "disabled";
205 };
206
207 gmac1: ethernet@3,1 {
208 reg = <0x1900 0x0 0x0 0x0 0x0>;
209 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>,
210 <15 IRQ_TYPE_LEVEL_HIGH>;
211 interrupt-names = "macirq", "eth_lpi";
212 interrupt-parent = <&pic>;
213 status = "disabled";
214 };
215
216 gmac2: ethernet@3,2 {
217 reg = <0x1a00 0x0 0x0 0x0 0x0>;
218 interrupts = <17 IRQ_TYPE_LEVEL_HIGH>,
219 <18 IRQ_TYPE_LEVEL_HIGH>;
220 interrupt-names = "macirq", "eth_lpi";
221 interrupt-parent = <&pic>;
222 status = "disabled";
223 };
224
225 xhci0: usb@4,0 {
226 reg = <0x2000 0x0 0x0 0x0 0x0>;
227 interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
228 interrupt-parent = <&pic>;
229 status = "disabled";
230 };
231
232 xhci1: usb@19,0 {
233 reg = <0xc800 0x0 0x0 0x0 0x0>;
234 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
235 interrupt-parent = <&pic>;
236 status = "disabled";
237 };
238
239 display@6,1 {
240 reg = <0x3100 0x0 0x0 0x0 0x0>;
241 interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
242 interrupt-parent = <&pic>;
243 status = "disabled";
244 };
245
246 hda@7,0 {
247 reg = <0x3800 0x0 0x0 0x0 0x0>;
248 interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
249 interrupt-parent = <&pic>;
250 status = "disabled";
251 };
252
253 sata: sata@8,0 {
254 reg = <0x4000 0x0 0x0 0x0 0x0>;
255 interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
256 interrupt-parent = <&pic>;
257 status = "disabled";
258 };
259
260 pcie@9,0 {
261 reg = <0x4800 0x0 0x0 0x0 0x0>;
262 #address-cells = <3>;
263 #size-cells = <2>;
264 device_type = "pci";
265 interrupt-parent = <&pic>;
266 #interrupt-cells = <1>;
267 interrupt-map-mask = <0x0 0x0 0x0 0x0>;
268 interrupt-map = <0x0 0x0 0x0 0x0 &pic 32 IRQ_TYPE_LEVEL_HIGH>;
269 ranges;
270 };
271
272 pcie@a,0 {
273 reg = <0x5000 0x0 0x0 0x0 0x0>;
274 #address-cells = <3>;
275 #size-cells = <2>;
276 device_type = "pci";
277 interrupt-parent = <&pic>;
278 #interrupt-cells = <1>;
279 interrupt-map-mask = <0x0 0x0 0x0 0x0>;
280 interrupt-map = <0x0 0x0 0x0 0x0 &pic 33 IRQ_TYPE_LEVEL_HIGH>;
281 ranges;
282 };
283
284 pcie@b,0 {
285 reg = <0x5800 0x0 0x0 0x0 0x0>;
286 #address-cells = <3>;
287 #size-cells = <2>;
288 device_type = "pci";
289 interrupt-parent = <&pic>;
290 #interrupt-cells = <1>;
291 interrupt-map-mask = <0x0 0x0 0x0 0x0>;
292 interrupt-map = <0x0 0x0 0x0 0x0 &pic 34 IRQ_TYPE_LEVEL_HIGH>;
293 ranges;
294 };
295
296 pcie@c,0 {
297 reg = <0x6000 0x0 0x0 0x0 0x0>;
298 #address-cells = <3>;
299 #size-cells = <2>;
300 device_type = "pci";
301 interrupt-parent = <&pic>;
302 #interrupt-cells = <1>;
303 interrupt-map-mask = <0x0 0x0 0x0 0x0>;
304 interrupt-map = <0x0 0x0 0x0 0x0 &pic 35 IRQ_TYPE_LEVEL_HIGH>;
305 ranges;
306 };
307
308 pcie@d,0 {
309 reg = <0x6800 0x0 0x0 0x0 0x0>;
310 #address-cells = <3>;
311 #size-cells = <2>;
312 device_type = "pci";
313 interrupt-parent = <&pic>;
314 #interrupt-cells = <1>;
315 interrupt-map-mask = <0x0 0x0 0x0 0x0>;
316 interrupt-map = <0x0 0x0 0x0 0x0 &pic 36 IRQ_TYPE_LEVEL_HIGH>;
317 ranges;
318 };
319
320 pcie@e,0 {
321 reg = <0x7000 0x0 0x0 0x0 0x0>;
322 #address-cells = <3>;
323 #size-cells = <2>;
324 device_type = "pci";
325 interrupt-parent = <&pic>;
326 #interrupt-cells = <1>;
327 interrupt-map-mask = <0x0 0x0 0x0 0x0>;
328 interrupt-map = <0x0 0x0 0x0 0x0 &pic 37 IRQ_TYPE_LEVEL_HIGH>;
329 ranges;
330 };
331
332 pcie@f,0 {
333 reg = <0x7800 0x0 0x0 0x0 0x0>;
334 #address-cells = <3>;
335 #size-cells = <2>;
336 device_type = "pci";
337 interrupt-parent = <&pic>;
338 #interrupt-cells = <1>;
339 interrupt-map-mask = <0x0 0x0 0x0 0x0>;
340 interrupt-map = <0x0 0x0 0x0 0x0 &pic 40 IRQ_TYPE_LEVEL_HIGH>;
341 ranges;
342 };
343
344 pcie@10,0 {
345 reg = <0x8000 0x0 0x0 0x0 0x0>;
346 #address-cells = <3>;
347 #size-cells = <2>;
348 device_type = "pci";
349 interrupt-parent = <&pic>;
350 #interrupt-cells = <1>;
351 interrupt-map-mask = <0x0 0x0 0x0 0x0>;
352 interrupt-map = <0x0 0x0 0x0 0x0 &pic 30 IRQ_TYPE_LEVEL_HIGH>;
353 ranges;
354 };
355 };
356 };
357 };
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