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Linux/arch/loongarch/pci/pci.c

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  1 // SPDX-License-Identifier: GPL-2.0-or-later
  2 /*
  3  * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
  4  */
  5 #include <linux/kernel.h>
  6 #include <linux/export.h>
  7 #include <linux/init.h>
  8 #include <linux/acpi.h>
  9 #include <linux/types.h>
 10 #include <linux/pci.h>
 11 #include <linux/vgaarb.h>
 12 #include <asm/cacheflush.h>
 13 #include <asm/loongson.h>
 14 
 15 #define PCI_DEVICE_ID_LOONGSON_HOST     0x7a00
 16 #define PCI_DEVICE_ID_LOONGSON_DC1      0x7a06
 17 #define PCI_DEVICE_ID_LOONGSON_DC2      0x7a36
 18 
 19 int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
 20                                                 int reg, int len, u32 *val)
 21 {
 22         struct pci_bus *bus_tmp = pci_find_bus(domain, bus);
 23 
 24         if (bus_tmp)
 25                 return bus_tmp->ops->read(bus_tmp, devfn, reg, len, val);
 26         return -EINVAL;
 27 }
 28 
 29 int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
 30                                                 int reg, int len, u32 val)
 31 {
 32         struct pci_bus *bus_tmp = pci_find_bus(domain, bus);
 33 
 34         if (bus_tmp)
 35                 return bus_tmp->ops->write(bus_tmp, devfn, reg, len, val);
 36         return -EINVAL;
 37 }
 38 
 39 phys_addr_t mcfg_addr_init(int node)
 40 {
 41         return (((u64)node << 44) | MCFG_EXT_PCICFG_BASE);
 42 }
 43 
 44 static int __init pcibios_init(void)
 45 {
 46         unsigned int lsize;
 47 
 48         /*
 49          * Set PCI cacheline size to that of the last level in the
 50          * cache hierarchy.
 51          */
 52         lsize = cpu_last_level_cache_line_size();
 53 
 54         BUG_ON(!lsize);
 55 
 56         pci_dfl_cache_line_size = lsize >> 2;
 57 
 58         pr_debug("PCI: pci_cache_line_size set to %d bytes\n", lsize);
 59 
 60         return 0;
 61 }
 62 
 63 subsys_initcall(pcibios_init);
 64 
 65 int pcibios_device_add(struct pci_dev *dev)
 66 {
 67         int id;
 68         struct irq_domain *dom;
 69 
 70         id = pci_domain_nr(dev->bus);
 71         dom = irq_find_matching_fwnode(get_pch_msi_handle(id), DOMAIN_BUS_PCI_MSI);
 72         dev_set_msi_domain(&dev->dev, dom);
 73 
 74         return 0;
 75 }
 76 
 77 int pcibios_alloc_irq(struct pci_dev *dev)
 78 {
 79         if (acpi_disabled)
 80                 return 0;
 81         if (pci_dev_msi_enabled(dev))
 82                 return 0;
 83         return acpi_pci_irq_enable(dev);
 84 }
 85 
 86 static void pci_fixup_vgadev(struct pci_dev *pdev)
 87 {
 88         struct pci_dev *devp = NULL;
 89 
 90         while ((devp = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, devp))) {
 91                 if (devp->vendor != PCI_VENDOR_ID_LOONGSON) {
 92                         vga_set_default_device(devp);
 93                         dev_info(&pdev->dev,
 94                                 "Overriding boot device as %X:%X\n",
 95                                 devp->vendor, devp->device);
 96                 }
 97         }
 98 }
 99 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LOONGSON, PCI_DEVICE_ID_LOONGSON_DC1, pci_fixup_vgadev);
100 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LOONGSON, PCI_DEVICE_ID_LOONGSON_DC2, pci_fixup_vgadev);
101 

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