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Linux/arch/m68k/coldfire/m523x.c

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  1 // SPDX-License-Identifier: GPL-2.0
  2 /***************************************************************************/
  3 
  4 /*
  5  *      m523x.c  -- platform support for ColdFire 523x based boards
  6  *
  7  *      Sub-architcture dependent initialization code for the Freescale
  8  *      523x CPUs.
  9  *
 10  *      Copyright (C) 1999-2005, Greg Ungerer (gerg@snapgear.com)
 11  *      Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
 12  */
 13 
 14 /***************************************************************************/
 15 
 16 #include <linux/clkdev.h>
 17 #include <linux/kernel.h>
 18 #include <linux/param.h>
 19 #include <linux/init.h>
 20 #include <linux/io.h>
 21 #include <asm/machdep.h>
 22 #include <asm/coldfire.h>
 23 #include <asm/mcfsim.h>
 24 #include <asm/mcfclk.h>
 25 
 26 /***************************************************************************/
 27 
 28 DEFINE_CLK(pll, "pll.0", MCF_CLK);
 29 DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
 30 
 31 static struct clk_lookup m523x_clk_lookup[] = {
 32         CLKDEV_INIT(NULL, "pll.0", &clk_pll),
 33         CLKDEV_INIT(NULL, "sys.0", &clk_sys),
 34         CLKDEV_INIT("mcfpit.0", NULL, &clk_pll),
 35         CLKDEV_INIT("mcfpit.1", NULL, &clk_pll),
 36         CLKDEV_INIT("mcfpit.2", NULL, &clk_pll),
 37         CLKDEV_INIT("mcfpit.3", NULL, &clk_pll),
 38         CLKDEV_INIT("mcfuart.0", NULL, &clk_sys),
 39         CLKDEV_INIT("mcfuart.1", NULL, &clk_sys),
 40         CLKDEV_INIT("mcfuart.2", NULL, &clk_sys),
 41         CLKDEV_INIT("mcfqspi.0", NULL, &clk_sys),
 42         CLKDEV_INIT("fec.0", NULL, &clk_sys),
 43         CLKDEV_INIT("imx1-i2c.0", NULL, &clk_sys),
 44 };
 45 
 46 /***************************************************************************/
 47 
 48 static void __init m523x_qspi_init(void)
 49 {
 50 #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
 51         u16 par;
 52 
 53         /* setup QSPS pins for QSPI with gpio CS control */
 54         writeb(0x1f, MCFGPIO_PAR_QSPI);
 55         /* and CS2 & CS3 as gpio */
 56         par = readw(MCFGPIO_PAR_TIMER);
 57         par &= 0x3f3f;
 58         writew(par, MCFGPIO_PAR_TIMER);
 59 #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
 60 }
 61 
 62 /***************************************************************************/
 63 
 64 static void __init m523x_i2c_init(void)
 65 {
 66 #if IS_ENABLED(CONFIG_I2C_IMX)
 67         u8 par;
 68 
 69         /* setup Port AS Pin Assignment Register for I2C */
 70         /*  set PASPA0 to SCL and PASPA1 to SDA */
 71         par = readb(MCFGPIO_PAR_FECI2C);
 72         par |= 0x0f;
 73         writeb(par, MCFGPIO_PAR_FECI2C);
 74 #endif /* IS_ENABLED(CONFIG_I2C_IMX) */
 75 }
 76 
 77 /***************************************************************************/
 78 
 79 static void __init m523x_fec_init(void)
 80 {
 81         /* Set multi-function pins to ethernet use */
 82         writeb(readb(MCFGPIO_PAR_FECI2C) | 0xf0, MCFGPIO_PAR_FECI2C);
 83 }
 84 
 85 /***************************************************************************/
 86 
 87 void __init config_BSP(char *commandp, int size)
 88 {
 89         mach_sched_init = hw_timer_init;
 90         m523x_fec_init();
 91         m523x_qspi_init();
 92         m523x_i2c_init();
 93 
 94         clkdev_add_table(m523x_clk_lookup, ARRAY_SIZE(m523x_clk_lookup));
 95 }
 96 
 97 /***************************************************************************/
 98 

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