1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _MOTOROLA_PGTABLE_H
3 #define _MOTOROLA_PGTABLE_H
4
5
6 /*
7 * Definitions for MMU descriptors
8 */
9 #define _PAGE_PRESENT 0x001
10 #define _PAGE_SHORT 0x002
11 #define _PAGE_RONLY 0x004
12 #define _PAGE_READWRITE 0x000
13 #define _PAGE_ACCESSED 0x008
14 #define _PAGE_DIRTY 0x010
15 #define _PAGE_SUPER 0x080 /* 68040 supervisor only */
16 #define _PAGE_GLOBAL040 0x400 /* 68040 global bit, used for kva descs */
17 #define _PAGE_NOCACHE030 0x040 /* 68030 no-cache mode */
18 #define _PAGE_NOCACHE 0x060 /* 68040 cache mode, non-serialized */
19 #define _PAGE_NOCACHE_S 0x040 /* 68040 no-cache mode, serialized */
20 #define _PAGE_CACHE040 0x020 /* 68040 cache mode, cachable, copyback */
21 #define _PAGE_CACHE040W 0x000 /* 68040 cache mode, cachable, write-through */
22
23 #define _DESCTYPE_MASK 0x003
24
25 #define _CACHEMASK040 (~0x060)
26
27 /*
28 * Currently set to the minimum alignment of table pointers (256 bytes).
29 * The hardware only uses the low 4 bits for state:
30 *
31 * 3 - Used
32 * 2 - Write Protected
33 * 0,1 - Descriptor Type
34 *
35 * and has the rest of the bits reserved.
36 */
37 #define _TABLE_MASK (0xffffff00)
38
39 #define _PAGE_TABLE (_PAGE_SHORT)
40 #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_NOCACHE)
41
42 #define _PAGE_PROTNONE 0x004
43
44 /* We borrow bit 11 to store the exclusive marker in swap PTEs. */
45 #define _PAGE_SWP_EXCLUSIVE 0x800
46
47 #ifndef __ASSEMBLY__
48
49 /* This is the cache mode to be used for pages containing page descriptors for
50 * processors >= '040. It is in pte_mknocache(), and the variable is defined
51 * and initialized in head.S */
52 extern int m68k_pgtable_cachemode;
53
54 /* This is the cache mode for normal pages, for supervisor access on
55 * processors >= '040. It is used in pte_mkcache(), and the variable is
56 * defined and initialized in head.S */
57
58 #if defined(CPU_M68060_ONLY) && defined(CONFIG_060_WRITETHROUGH)
59 #define m68k_supervisor_cachemode _PAGE_CACHE040W
60 #elif defined(CPU_M68040_OR_M68060_ONLY)
61 #define m68k_supervisor_cachemode _PAGE_CACHE040
62 #elif defined(CPU_M68020_OR_M68030_ONLY)
63 #define m68k_supervisor_cachemode 0
64 #else
65 extern int m68k_supervisor_cachemode;
66 #endif
67
68 #if defined(CPU_M68040_OR_M68060_ONLY)
69 #define mm_cachebits _PAGE_CACHE040
70 #elif defined(CPU_M68020_OR_M68030_ONLY)
71 #define mm_cachebits 0
72 #else
73 extern unsigned long mm_cachebits;
74 #endif
75
76 #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED | mm_cachebits)
77 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | mm_cachebits)
78 #define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED | mm_cachebits)
79 #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED | mm_cachebits)
80 #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | _PAGE_ACCESSED | mm_cachebits)
81
82 #define pmd_pgtable(pmd) ((pgtable_t)pmd_page_vaddr(pmd))
83
84 /*
85 * Conversion functions: convert a page and protection to a page entry,
86 * and a page entry and page directory to the page they refer to.
87 */
88 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
89
90 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
91 {
92 pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot);
93 return pte;
94 }
95
96 static inline void pmd_set(pmd_t *pmdp, pte_t *ptep)
97 {
98 pmd_val(*pmdp) = virt_to_phys(ptep) | _PAGE_TABLE | _PAGE_ACCESSED;
99 }
100
101 static inline void pud_set(pud_t *pudp, pmd_t *pmdp)
102 {
103 pud_val(*pudp) = _PAGE_TABLE | _PAGE_ACCESSED | __pa(pmdp);
104 }
105
106 #define __pte_page(pte) ((unsigned long)__va(pte_val(pte) & PAGE_MASK))
107 #define pmd_page_vaddr(pmd) ((unsigned long)__va(pmd_val(pmd) & _TABLE_MASK))
108 #define pud_pgtable(pud) ((pmd_t *)__va(pud_val(pud) & _TABLE_MASK))
109
110
111 #define pte_none(pte) (!pte_val(pte))
112 #define pte_present(pte) (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROTNONE))
113 #define pte_clear(mm,addr,ptep) ({ pte_val(*(ptep)) = 0; })
114
115 #define PFN_PTE_SHIFT PAGE_SHIFT
116 #define pte_page(pte) virt_to_page(__va(pte_val(pte)))
117 #define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT)
118 #define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
119
120 #define pmd_none(pmd) (!pmd_val(pmd))
121 #define pmd_bad(pmd) ((pmd_val(pmd) & _DESCTYPE_MASK) != _PAGE_TABLE)
122 #define pmd_present(pmd) (pmd_val(pmd) & _PAGE_TABLE)
123 #define pmd_clear(pmdp) ({ pmd_val(*pmdp) = 0; })
124
125 #define pmd_pfn(pmd) ((pmd_val(pmd) & _TABLE_MASK) >> PAGE_SHIFT)
126 /*
127 * m68k does not have huge pages (020/030 actually could), but generic code
128 * expects pmd_page() to exists, only to then DCE it all. Provide a dummy to
129 * make the compiler happy.
130 */
131 #define pmd_page(pmd) ((struct page *)NULL)
132
133
134 #define pud_none(pud) (!pud_val(pud))
135 #define pud_bad(pud) ((pud_val(pud) & _DESCTYPE_MASK) != _PAGE_TABLE)
136 #define pud_present(pud) (pud_val(pud) & _PAGE_TABLE)
137 #define pud_clear(pudp) ({ pud_val(*pudp) = 0; })
138 #define pud_page(pud) (mem_map + ((unsigned long)(__va(pud_val(pud)) - PAGE_OFFSET) >> PAGE_SHIFT))
139
140 #define pte_ERROR(e) \
141 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
142 #define pmd_ERROR(e) \
143 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
144 #define pgd_ERROR(e) \
145 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
146
147
148 /*
149 * The following only work if pte_present() is true.
150 * Undefined behaviour if not..
151 */
152 static inline int pte_write(pte_t pte) { return !(pte_val(pte) & _PAGE_RONLY); }
153 static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
154 static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
155
156 static inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) |= _PAGE_RONLY; return pte; }
157 static inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
158 static inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
159 static inline pte_t pte_mkwrite_novma(pte_t pte){ pte_val(pte) &= ~_PAGE_RONLY; return pte; }
160 static inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; }
161 static inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
162 static inline pte_t pte_mknocache(pte_t pte)
163 {
164 pte_val(pte) = (pte_val(pte) & _CACHEMASK040) | m68k_pgtable_cachemode;
165 return pte;
166 }
167 static inline pte_t pte_mkcache(pte_t pte)
168 {
169 pte_val(pte) = (pte_val(pte) & _CACHEMASK040) | m68k_supervisor_cachemode;
170 return pte;
171 }
172
173 #define swapper_pg_dir kernel_pg_dir
174 extern pgd_t kernel_pg_dir[128];
175
176 /*
177 * Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that
178 * are !pte_none() && !pte_present().
179 *
180 * Format of swap PTEs:
181 *
182 * 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
183 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
184 * <----------------- offset ------------> E <-- type ---> 0 0 0 0
185 *
186 * E is the exclusive marker that is not stored in swap entries.
187 */
188 #define __swp_type(x) (((x).val >> 4) & 0x7f)
189 #define __swp_offset(x) ((x).val >> 12)
190 #define __swp_entry(type, offset) ((swp_entry_t) { (((type) & 0x7f) << 4) | ((offset) << 12) })
191 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
192 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
193
194 static inline int pte_swp_exclusive(pte_t pte)
195 {
196 return pte_val(pte) & _PAGE_SWP_EXCLUSIVE;
197 }
198
199 static inline pte_t pte_swp_mkexclusive(pte_t pte)
200 {
201 pte_val(pte) |= _PAGE_SWP_EXCLUSIVE;
202 return pte;
203 }
204
205 static inline pte_t pte_swp_clear_exclusive(pte_t pte)
206 {
207 pte_val(pte) &= ~_PAGE_SWP_EXCLUSIVE;
208 return pte;
209 }
210
211 #endif /* !__ASSEMBLY__ */
212 #endif /* _MOTOROLA_PGTABLE_H */
213
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