1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * (C) Copyright 2004, 2005 Cavium Networks
4 */
5
6 #ifndef __OCTEON_BOOT_H__
7 #define __OCTEON_BOOT_H__
8
9 #include <linux/types.h>
10
11 struct boot_init_vector {
12 /* First stage address - in ram instead of flash */
13 uint64_t code_addr;
14 /* Setup code for application, NOT application entry point */
15 uint32_t app_start_func_addr;
16 /* k0 is used for global data - needs to be passed to other cores */
17 uint32_t k0_val;
18 /* Address of boot info block structure */
19 uint64_t boot_info_addr;
20 uint32_t flags; /* flags */
21 uint32_t pad;
22 };
23
24 /* similar to bootloader's linux_app_boot_info but without global data */
25 struct linux_app_boot_info {
26 #ifdef __BIG_ENDIAN_BITFIELD
27 uint32_t labi_signature;
28 uint32_t start_core0_addr;
29 uint32_t avail_coremask;
30 uint32_t pci_console_active;
31 uint32_t icache_prefetch_disable;
32 uint32_t padding;
33 uint64_t InitTLBStart_addr;
34 uint32_t start_app_addr;
35 uint32_t cur_exception_base;
36 uint32_t no_mark_private_data;
37 uint32_t compact_flash_common_base_addr;
38 uint32_t compact_flash_attribute_base_addr;
39 uint32_t led_display_base_addr;
40 #else
41 uint32_t start_core0_addr;
42 uint32_t labi_signature;
43
44 uint32_t pci_console_active;
45 uint32_t avail_coremask;
46
47 uint32_t padding;
48 uint32_t icache_prefetch_disable;
49
50 uint64_t InitTLBStart_addr;
51
52 uint32_t cur_exception_base;
53 uint32_t start_app_addr;
54
55 uint32_t compact_flash_common_base_addr;
56 uint32_t no_mark_private_data;
57
58 uint32_t led_display_base_addr;
59 uint32_t compact_flash_attribute_base_addr;
60 #endif
61 };
62
63 /* If not to copy a lot of bootloader's structures
64 here is only offset of requested member */
65 #define AVAIL_COREMASK_OFFSET_IN_LINUX_APP_BOOT_BLOCK 0x765c
66
67 /* hardcoded in bootloader */
68 #define LABI_ADDR_IN_BOOTLOADER 0x700
69
70 #define LINUX_APP_BOOT_BLOCK_NAME "linux-app-boot"
71
72 #define LABI_SIGNATURE 0xAABBCC01
73
74 /* from uboot-headers/octeon_mem_map.h */
75 #define EXCEPTION_BASE_INCR (4 * 1024)
76 /* Increment size for exception base addresses (4k minimum) */
77 #define EXCEPTION_BASE_BASE 0
78 #define BOOTLOADER_PRIV_DATA_BASE (EXCEPTION_BASE_BASE + 0x800)
79 #define BOOTLOADER_BOOT_VECTOR (BOOTLOADER_PRIV_DATA_BASE)
80
81 #endif /* __OCTEON_BOOT_H__ */
82
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