1 /*
2 * Register PCI controller.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1996, 1997, 2004, 05 by Ralf Baechle (ralf@linux-mips.org)
9 * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
10 *
11 */
12 #include <linux/init.h>
13 #include <linux/pci.h>
14
15 #include <asm/gt64120.h>
16
17 extern struct pci_ops gt64xxx_pci0_ops;
18
19 static struct resource cobalt_mem_resource = {
20 .start = GT_DEF_PCI0_MEM0_BASE,
21 .end = GT_DEF_PCI0_MEM0_BASE + GT_DEF_PCI0_MEM0_SIZE - 1,
22 .name = "PCI memory",
23 .flags = IORESOURCE_MEM,
24 };
25
26 static struct resource cobalt_io_resource = {
27 .start = 0x1000,
28 .end = 0xffffffUL,
29 .name = "PCI I/O",
30 .flags = IORESOURCE_IO,
31 };
32
33 static struct pci_controller cobalt_pci_controller = {
34 .pci_ops = >64xxx_pci0_ops,
35 .mem_resource = &cobalt_mem_resource,
36 .io_resource = &cobalt_io_resource,
37 .io_offset = 0 - GT_DEF_PCI0_IO_BASE,
38 .io_map_base = CKSEG1ADDR(GT_DEF_PCI0_IO_BASE),
39 };
40
41 static int __init cobalt_pci_init(void)
42 {
43 register_pci_controller(&cobalt_pci_controller);
44
45 return 0;
46 }
47
48 arch_initcall(cobalt_pci_init);
49
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