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Linux/arch/mips/include/asm/mach-ath79/ar933x_uart.h

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  1 /* SPDX-License-Identifier: GPL-2.0-only */
  2 /*
  3  *  Atheros AR933X UART defines
  4  *
  5  *  Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
  6  */
  7 
  8 #ifndef __AR933X_UART_H
  9 #define __AR933X_UART_H
 10 
 11 #define AR933X_UART_REGS_SIZE           20
 12 #define AR933X_UART_FIFO_SIZE           16
 13 
 14 #define AR933X_UART_DATA_REG            0x00
 15 #define AR933X_UART_CS_REG              0x04
 16 #define AR933X_UART_CLOCK_REG           0x08
 17 #define AR933X_UART_INT_REG             0x0c
 18 #define AR933X_UART_INT_EN_REG          0x10
 19 
 20 #define AR933X_UART_DATA_TX_RX_MASK     0xff
 21 #define AR933X_UART_DATA_RX_CSR         BIT(8)
 22 #define AR933X_UART_DATA_TX_CSR         BIT(9)
 23 
 24 #define AR933X_UART_CS_PARITY_S         0
 25 #define AR933X_UART_CS_PARITY_M         0x3
 26 #define   AR933X_UART_CS_PARITY_NONE    0
 27 #define   AR933X_UART_CS_PARITY_ODD     2
 28 #define   AR933X_UART_CS_PARITY_EVEN    3
 29 #define AR933X_UART_CS_IF_MODE_S        2
 30 #define AR933X_UART_CS_IF_MODE_M        0x3
 31 #define   AR933X_UART_CS_IF_MODE_NONE   0
 32 #define   AR933X_UART_CS_IF_MODE_DTE    1
 33 #define   AR933X_UART_CS_IF_MODE_DCE    2
 34 #define AR933X_UART_CS_FLOW_CTRL_S      4
 35 #define AR933X_UART_CS_FLOW_CTRL_M      0x3
 36 #define AR933X_UART_CS_DMA_EN           BIT(6)
 37 #define AR933X_UART_CS_TX_READY_ORIDE   BIT(7)
 38 #define AR933X_UART_CS_RX_READY_ORIDE   BIT(8)
 39 #define AR933X_UART_CS_TX_READY         BIT(9)
 40 #define AR933X_UART_CS_RX_BREAK         BIT(10)
 41 #define AR933X_UART_CS_TX_BREAK         BIT(11)
 42 #define AR933X_UART_CS_HOST_INT         BIT(12)
 43 #define AR933X_UART_CS_HOST_INT_EN      BIT(13)
 44 #define AR933X_UART_CS_TX_BUSY          BIT(14)
 45 #define AR933X_UART_CS_RX_BUSY          BIT(15)
 46 
 47 #define AR933X_UART_CLOCK_STEP_M        0xffff
 48 #define AR933X_UART_CLOCK_SCALE_M       0xfff
 49 #define AR933X_UART_CLOCK_SCALE_S       16
 50 #define AR933X_UART_CLOCK_STEP_M        0xffff
 51 
 52 #define AR933X_UART_INT_RX_VALID        BIT(0)
 53 #define AR933X_UART_INT_TX_READY        BIT(1)
 54 #define AR933X_UART_INT_RX_FRAMING_ERR  BIT(2)
 55 #define AR933X_UART_INT_RX_OFLOW_ERR    BIT(3)
 56 #define AR933X_UART_INT_TX_OFLOW_ERR    BIT(4)
 57 #define AR933X_UART_INT_RX_PARITY_ERR   BIT(5)
 58 #define AR933X_UART_INT_RX_BREAK_ON     BIT(6)
 59 #define AR933X_UART_INT_RX_BREAK_OFF    BIT(7)
 60 #define AR933X_UART_INT_RX_FULL         BIT(8)
 61 #define AR933X_UART_INT_TX_EMPTY        BIT(9)
 62 #define AR933X_UART_INT_ALLINTS         0x3ff
 63 
 64 #endif /* __AR933X_UART_H */
 65 

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