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Linux/arch/mips/include/asm/mach-rc32434/rb.h

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  1 /* SPDX-License-Identifier: GPL-2.0-or-later */
  2 /*
  3  *
  4  *  Copyright (C) 2004 IDT Inc.
  5  *  Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
  6  */
  7 #ifndef __ASM_RC32434_RB_H
  8 #define __ASM_RC32434_RB_H
  9 
 10 #define REGBASE         0x18000000
 11 #define IDT434_REG_BASE ((volatile void *) KSEG1ADDR(REGBASE))
 12 #define UART0BASE       0x58000
 13 #define RST             (1 << 15)
 14 #define DEV0BASE        0x010000
 15 #define DEV0MASK        0x010004
 16 #define DEV0C           0x010008
 17 #define DEV0T           0x01000C
 18 #define DEV1BASE        0x010010
 19 #define DEV1MASK        0x010014
 20 #define DEV1C           0x010018
 21 #define DEV1TC          0x01001C
 22 #define DEV2BASE        0x010020
 23 #define DEV2MASK        0x010024
 24 #define DEV2C           0x010028
 25 #define DEV2TC          0x01002C
 26 #define DEV3BASE        0x010030
 27 #define DEV3MASK        0x010034
 28 #define DEV3C           0x010038
 29 #define DEV3TC          0x01003C
 30 #define BTCS            0x010040
 31 #define BTCOMPARE       0x010044
 32 #define LO_WPX          (1 << 0)
 33 #define LO_ALE          (1 << 1)
 34 #define LO_CLE          (1 << 2)
 35 #define LO_CEX          (1 << 3)
 36 #define LO_FOFF         (1 << 5)
 37 #define LO_SPICS        (1 << 6)
 38 #define LO_ULED         (1 << 7)
 39 
 40 #define BIT_TO_MASK(x)  (1 << x)
 41 
 42 struct dev_reg {
 43         u32     base;
 44         u32     mask;
 45         u32     ctl;
 46         u32     timing;
 47 };
 48 
 49 struct korina_device {
 50         char *name;
 51         unsigned char mac[6];
 52         struct net_device *dev;
 53 };
 54 
 55 struct mpmc_device {
 56         unsigned char   state;
 57         spinlock_t      lock;
 58         void __iomem    *base;
 59 };
 60 
 61 extern void set_latch_u5(unsigned char or_mask, unsigned char nand_mask);
 62 extern unsigned char get_latch_u5(void);
 63 
 64 #endif  /* __ASM_RC32434_RB_H */
 65 

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