1 /* SPDX-License-Identifier: GPL-2.0 */
2 #include <asm/asm-offsets.h>
3 #include <asm/thread_info.h>
4
5 #define PAGE_SIZE _PAGE_SIZE
6
7 /*
8 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
9 * ensure that it has .bss alignment (64K).
10 */
11 #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
12
13 /* Cavium Octeon should not have a separate PT_NOTE Program Header. */
14 #ifndef CONFIG_CAVIUM_OCTEON_SOC
15 #define EMITS_PT_NOTE
16 #endif
17
18 #define RUNTIME_DISCARD_EXIT
19
20 #include <asm-generic/vmlinux.lds.h>
21
22 #undef mips
23 #define mips mips
24 OUTPUT_ARCH(mips)
25 ENTRY(kernel_entry)
26 PHDRS {
27 text PT_LOAD FLAGS(7); /* RWX */
28 #ifndef CONFIG_CAVIUM_OCTEON_SOC
29 note PT_NOTE FLAGS(4); /* R__ */
30 #endif /* CAVIUM_OCTEON_SOC */
31 }
32
33 #ifdef CONFIG_32BIT
34 #ifdef CONFIG_CPU_LITTLE_ENDIAN
35 jiffies = jiffies_64;
36 #else
37 jiffies = jiffies_64 + 4;
38 #endif
39 #else
40 jiffies = jiffies_64;
41 #endif
42
43 SECTIONS
44 {
45 #ifdef CONFIG_BOOT_ELF64
46 /* Read-only sections, merged into text segment: */
47 /* . = 0xc000000000000000; */
48
49 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
50 /* . = 0xc00000000001c000; */
51
52 /* Set the vaddr for the text segment to a value
53 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
54 * >= 0xa800 0000 0030 0000 otherwise
55 */
56
57 /* . = 0xa800000000300000; */
58 . = 0xffffffff80300000;
59 #endif
60 . = LINKER_LOAD_ADDRESS;
61 /* read-only */
62 _text = .; /* Text and read-only data */
63 .text : {
64 TEXT_TEXT
65 SCHED_TEXT
66 LOCK_TEXT
67 KPROBES_TEXT
68 IRQENTRY_TEXT
69 SOFTIRQENTRY_TEXT
70 *(.fixup)
71 *(.gnu.warning)
72 . = ALIGN(16);
73 *(.got) /* Global offset table */
74 } :text = 0
75 _etext = .; /* End of text section */
76
77 EXCEPTION_TABLE(16)
78
79 /* Exception table for data bus errors */
80 __dbe_table : {
81 __start___dbe_table = .;
82 KEEP(*(__dbe_table))
83 __stop___dbe_table = .;
84 }
85
86 _sdata = .; /* Start of data section */
87 RO_DATA(4096)
88
89 /* writeable */
90 .data : { /* Data */
91 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
92
93 INIT_TASK_DATA(THREAD_SIZE)
94 NOSAVE_DATA
95 PAGE_ALIGNED_DATA(PAGE_SIZE)
96 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
97 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
98 DATA_DATA
99 CONSTRUCTORS
100 }
101 BUG_TABLE
102 _gp = . + 0x8000;
103 .lit8 : {
104 *(.lit8)
105 }
106 .lit4 : {
107 *(.lit4)
108 }
109 /* We want the small data sections together, so single-instruction offsets
110 can access them all, and initialized data all before uninitialized, so
111 we can shorten the on-disk segment size. */
112 .sdata : {
113 *(.sdata)
114 }
115 _edata = .; /* End of data section */
116
117 /* will be freed after init */
118 . = ALIGN(PAGE_SIZE); /* Init code and data */
119 __init_begin = .;
120 INIT_TEXT_SECTION(PAGE_SIZE)
121 INIT_DATA_SECTION(16)
122
123 . = ALIGN(4);
124 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
125 __mips_machines_start = .;
126 KEEP(*(.mips.machines.init))
127 __mips_machines_end = .;
128 }
129
130 /* .exit.text is discarded at runtime, not link time, to deal with
131 * references from .rodata
132 */
133 .exit.text : {
134 EXIT_TEXT
135 }
136 .exit.data : {
137 EXIT_DATA
138 }
139 #ifdef CONFIG_SMP
140 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
141 #endif
142
143 .rel.dyn : ALIGN(8) {
144 *(.rel)
145 *(.rel*)
146 }
147
148 #ifdef CONFIG_MIPS_ELF_APPENDED_DTB
149 STRUCT_ALIGN();
150 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
151 *(.appended_dtb)
152 KEEP(*(.appended_dtb))
153 }
154 #endif
155
156 #ifdef CONFIG_RELOCATABLE
157 . = ALIGN(4);
158
159 .data.reloc : {
160 _relocation_start = .;
161 /*
162 * Space for relocation table
163 * This needs to be filled so that the
164 * relocs tool can overwrite the content.
165 * An invalid value is left at the start of the
166 * section to abort relocation if the table
167 * has not been filled in.
168 */
169 LONG(0xFFFFFFFF);
170 FILL(0);
171 . += CONFIG_RELOCATION_TABLE_SIZE - 4;
172 _relocation_end = .;
173 }
174 #endif
175
176 #ifdef CONFIG_MIPS_RAW_APPENDED_DTB
177 .fill : {
178 FILL(0);
179 BYTE(0);
180 STRUCT_ALIGN();
181 }
182 __appended_dtb = .;
183 /* leave space for appended DTB */
184 . += 0x100000;
185 #endif
186 /*
187 * Align to 64K in attempt to eliminate holes before the
188 * .bss..swapper_pg_dir section at the start of .bss. This
189 * also satisfies PAGE_SIZE alignment as the largest page size
190 * allowed is 64K.
191 */
192 . = ALIGN(0x10000);
193 __init_end = .;
194 /* freed after init ends here */
195
196 /*
197 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
198 * gets that alignment. .sbss should be empty, so there will be
199 * no holes after __init_end. */
200 BSS_SECTION(0, 0x10000, 8)
201
202 _end = . ;
203
204 /* These mark the ABI of the kernel for debuggers. */
205 .mdebug.abi32 : {
206 KEEP(*(.mdebug.abi32))
207 }
208 .mdebug.abi64 : {
209 KEEP(*(.mdebug.abi64))
210 }
211
212 /* This is the MIPS specific mdebug section. */
213 .mdebug : {
214 *(.mdebug)
215 }
216
217 STABS_DEBUG
218 DWARF_DEBUG
219 ELF_DETAILS
220
221 /* These must appear regardless of . */
222 .gptab.sdata : {
223 *(.gptab.data)
224 *(.gptab.sdata)
225 }
226 .gptab.sbss : {
227 *(.gptab.bss)
228 *(.gptab.sbss)
229 }
230
231 /* Sections to be discarded */
232 DISCARDS
233 /DISCARD/ : {
234 /* ABI crap starts here */
235 *(.MIPS.abiflags)
236 *(.MIPS.options)
237 *(.gnu.attributes)
238 *(.options)
239 *(.pdr)
240 *(.reginfo)
241 }
242 }
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