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Linux/arch/mips/sibyte/swarm/rtc_xicor1241.c

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  1 // SPDX-License-Identifier: GPL-2.0-or-later
  2 /*
  3  * Copyright (C) 2000, 2001 Broadcom Corporation
  4  *
  5  * Copyright (C) 2002 MontaVista Software Inc.
  6  * Author: jsun@mvista.com or jsun@junsun.net
  7  */
  8 #include <linux/bcd.h>
  9 #include <linux/types.h>
 10 #include <linux/time.h>
 11 
 12 #include <asm/time.h>
 13 #include <asm/addrspace.h>
 14 #include <asm/io.h>
 15 
 16 #include <asm/sibyte/sb1250.h>
 17 #include <asm/sibyte/sb1250_regs.h>
 18 #include <asm/sibyte/sb1250_smbus.h>
 19 
 20 
 21 /* Xicor 1241 definitions */
 22 
 23 /*
 24  * Register bits
 25  */
 26 
 27 #define X1241REG_SR_BAT 0x80            /* currently on battery power */
 28 #define X1241REG_SR_RWEL 0x04           /* r/w latch is enabled, can write RTC */
 29 #define X1241REG_SR_WEL 0x02            /* r/w latch is unlocked, can enable r/w now */
 30 #define X1241REG_SR_RTCF 0x01           /* clock failed */
 31 #define X1241REG_BL_BP2 0x80            /* block protect 2 */
 32 #define X1241REG_BL_BP1 0x40            /* block protect 1 */
 33 #define X1241REG_BL_BP0 0x20            /* block protect 0 */
 34 #define X1241REG_BL_WD1 0x10
 35 #define X1241REG_BL_WD0 0x08
 36 #define X1241REG_HR_MIL 0x80            /* military time format */
 37 
 38 /*
 39  * Register numbers
 40  */
 41 
 42 #define X1241REG_BL     0x10            /* block protect bits */
 43 #define X1241REG_INT    0x11            /*  */
 44 #define X1241REG_SC     0x30            /* Seconds */
 45 #define X1241REG_MN     0x31            /* Minutes */
 46 #define X1241REG_HR     0x32            /* Hours */
 47 #define X1241REG_DT     0x33            /* Day of month */
 48 #define X1241REG_MO     0x34            /* Month */
 49 #define X1241REG_YR     0x35            /* Year */
 50 #define X1241REG_DW     0x36            /* Day of Week */
 51 #define X1241REG_Y2K    0x37            /* Year 2K */
 52 #define X1241REG_SR     0x3F            /* Status register */
 53 
 54 #define X1241_CCR_ADDRESS       0x6F
 55 
 56 #define SMB_CSR(reg)    IOADDR(A_SMB_REGISTER(1, reg))
 57 
 58 static int xicor_read(uint8_t addr)
 59 {
 60         while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
 61                 ;
 62 
 63         __raw_writeq((addr >> 8) & 0x7, SMB_CSR(R_SMB_CMD));
 64         __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_DATA));
 65         __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR2BYTE,
 66                      SMB_CSR(R_SMB_START));
 67 
 68         while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
 69                 ;
 70 
 71         __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_RD1BYTE,
 72                      SMB_CSR(R_SMB_START));
 73 
 74         while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
 75                 ;
 76 
 77         if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
 78                 /* Clear error bit by writing a 1 */
 79                 __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
 80                 return -1;
 81         }
 82 
 83         return __raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff;
 84 }
 85 
 86 static int xicor_write(uint8_t addr, int b)
 87 {
 88         while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
 89                 ;
 90 
 91         __raw_writeq(addr, SMB_CSR(R_SMB_CMD));
 92         __raw_writeq((addr & 0xff) | ((b & 0xff) << 8), SMB_CSR(R_SMB_DATA));
 93         __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR3BYTE,
 94                      SMB_CSR(R_SMB_START));
 95 
 96         while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
 97                 ;
 98 
 99         if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
100                 /* Clear error bit by writing a 1 */
101                 __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
102                 return -1;
103         } else {
104                 return 0;
105         }
106 }
107 
108 int xicor_set_time(time64_t t)
109 {
110         struct rtc_time tm;
111         int tmp;
112         unsigned long flags;
113 
114         rtc_time64_to_tm(t, &tm);
115         tm.tm_year += 1900;
116 
117         spin_lock_irqsave(&rtc_lock, flags);
118         /* unlock writes to the CCR */
119         xicor_write(X1241REG_SR, X1241REG_SR_WEL);
120         xicor_write(X1241REG_SR, X1241REG_SR_WEL | X1241REG_SR_RWEL);
121 
122         /* trivial ones */
123         tm.tm_sec = bin2bcd(tm.tm_sec);
124         xicor_write(X1241REG_SC, tm.tm_sec);
125 
126         tm.tm_min = bin2bcd(tm.tm_min);
127         xicor_write(X1241REG_MN, tm.tm_min);
128 
129         tm.tm_mday = bin2bcd(tm.tm_mday);
130         xicor_write(X1241REG_DT, tm.tm_mday);
131 
132         /* tm_mon starts from 0, *ick* */
133         tm.tm_mon ++;
134         tm.tm_mon = bin2bcd(tm.tm_mon);
135         xicor_write(X1241REG_MO, tm.tm_mon);
136 
137         /* year is split */
138         tmp = tm.tm_year / 100;
139         tm.tm_year %= 100;
140         xicor_write(X1241REG_YR, tm.tm_year);
141         xicor_write(X1241REG_Y2K, tmp);
142 
143         /* hour is the most tricky one */
144         tmp = xicor_read(X1241REG_HR);
145         if (tmp & X1241REG_HR_MIL) {
146                 /* 24 hour format */
147                 tm.tm_hour = bin2bcd(tm.tm_hour);
148                 tmp = (tmp & ~0x3f) | (tm.tm_hour & 0x3f);
149         } else {
150                 /* 12 hour format, with 0x2 for pm */
151                 tmp = tmp & ~0x3f;
152                 if (tm.tm_hour >= 12) {
153                         tmp |= 0x20;
154                         tm.tm_hour -= 12;
155                 }
156                 tm.tm_hour = bin2bcd(tm.tm_hour);
157                 tmp |= tm.tm_hour;
158         }
159         xicor_write(X1241REG_HR, tmp);
160 
161         xicor_write(X1241REG_SR, 0);
162         spin_unlock_irqrestore(&rtc_lock, flags);
163 
164         return 0;
165 }
166 
167 time64_t xicor_get_time(void)
168 {
169         unsigned int year, mon, day, hour, min, sec, y2k;
170         unsigned long flags;
171 
172         spin_lock_irqsave(&rtc_lock, flags);
173         sec = xicor_read(X1241REG_SC);
174         min = xicor_read(X1241REG_MN);
175         hour = xicor_read(X1241REG_HR);
176 
177         if (hour & X1241REG_HR_MIL) {
178                 hour &= 0x3f;
179         } else {
180                 if (hour & 0x20)
181                         hour = (hour & 0xf) + 0x12;
182         }
183 
184         day = xicor_read(X1241REG_DT);
185         mon = xicor_read(X1241REG_MO);
186         year = xicor_read(X1241REG_YR);
187         y2k = xicor_read(X1241REG_Y2K);
188         spin_unlock_irqrestore(&rtc_lock, flags);
189 
190         sec = bcd2bin(sec);
191         min = bcd2bin(min);
192         hour = bcd2bin(hour);
193         day = bcd2bin(day);
194         mon = bcd2bin(mon);
195         year = bcd2bin(year);
196         y2k = bcd2bin(y2k);
197 
198         year += (y2k * 100);
199 
200         return mktime64(year, mon, day, hour, min, sec);
201 }
202 
203 int xicor_probe(void)
204 {
205         return xicor_read(X1241REG_SC) != -1;
206 }
207 

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