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TOMOYO Linux Cross Reference
Linux/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi

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  1 /*
  2  * P5020/5010 Silicon/SoC Device Tree Source (post include)
  3  *
  4  * Copyright 2011 - 2015 Freescale Semiconductor Inc.
  5  *
  6  * Redistribution and use in source and binary forms, with or without
  7  * modification, are permitted provided that the following conditions are met:
  8  *     * Redistributions of source code must retain the above copyright
  9  *       notice, this list of conditions and the following disclaimer.
 10  *     * Redistributions in binary form must reproduce the above copyright
 11  *       notice, this list of conditions and the following disclaimer in the
 12  *       documentation and/or other materials provided with the distribution.
 13  *     * Neither the name of Freescale Semiconductor nor the
 14  *       names of its contributors may be used to endorse or promote products
 15  *       derived from this software without specific prior written permission.
 16  *
 17  *
 18  * ALTERNATIVELY, this software may be distributed under the terms of the
 19  * GNU General Public License ("GPL") as published by the Free Software
 20  * Foundation, either version 2 of that License or (at your option) any
 21  * later version.
 22  *
 23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
 24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
 27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 33  */
 34 
 35 &bman_fbpr {
 36         compatible = "fsl,bman-fbpr";
 37         alloc-ranges = <0 0 0x10000 0>;
 38 };
 39 
 40 &qman_fqd {
 41         compatible = "fsl,qman-fqd";
 42         alloc-ranges = <0 0 0x10000 0>;
 43 };
 44 
 45 &qman_pfdr {
 46         compatible = "fsl,qman-pfdr";
 47         alloc-ranges = <0 0 0x10000 0>;
 48 };
 49 
 50 &lbc {
 51         compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus";
 52         interrupts = <25 2 0 0>;
 53         #address-cells = <2>;
 54         #size-cells = <1>;
 55 };
 56 
 57 /* controller at 0x200000 */
 58 &pci0 {
 59         compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
 60         device_type = "pci";
 61         #size-cells = <2>;
 62         #address-cells = <3>;
 63         bus-range = <0x0 0xff>;
 64         clock-frequency = <33333333>;
 65         interrupts = <16 2 1 15>;
 66         fsl,iommu-parent = <&pamu0>;
 67         fsl,liodn-reg = <&guts 0x500>; /* PEX1LIODNR */
 68         pcie@0 {
 69                 reg = <0 0 0 0 0>;
 70                 #interrupt-cells = <1>;
 71                 #size-cells = <2>;
 72                 #address-cells = <3>;
 73                 device_type = "pci";
 74                 interrupts = <16 2 1 15>;
 75                 interrupt-map-mask = <0xf800 0 0 7>;
 76                 interrupt-map = <
 77                         /* IDSEL 0x0 */
 78                         0000 0 0 1 &mpic 40 1 0 0
 79                         0000 0 0 2 &mpic 1 1 0 0
 80                         0000 0 0 3 &mpic 2 1 0 0
 81                         0000 0 0 4 &mpic 3 1 0 0
 82                         >;
 83         };
 84 };
 85 
 86 /* controller at 0x201000 */
 87 &pci1 {
 88         compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
 89         device_type = "pci";
 90         #size-cells = <2>;
 91         #address-cells = <3>;
 92         bus-range = <0 0xff>;
 93         clock-frequency = <33333333>;
 94         interrupts = <16 2 1 14>;
 95         fsl,iommu-parent = <&pamu0>;
 96         fsl,liodn-reg = <&guts 0x504>; /* PEX2LIODNR */
 97         pcie@0 {
 98                 reg = <0 0 0 0 0>;
 99                 #interrupt-cells = <1>;
100                 #size-cells = <2>;
101                 #address-cells = <3>;
102                 device_type = "pci";
103                 interrupts = <16 2 1 14>;
104                 interrupt-map-mask = <0xf800 0 0 7>;
105                 interrupt-map = <
106                         /* IDSEL 0x0 */
107                         0000 0 0 1 &mpic 41 1 0 0
108                         0000 0 0 2 &mpic 5 1 0 0
109                         0000 0 0 3 &mpic 6 1 0 0
110                         0000 0 0 4 &mpic 7 1 0 0
111                         >;
112         };
113 };
114 
115 /* controller at 0x202000 */
116 &pci2 {
117         compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
118         device_type = "pci";
119         #size-cells = <2>;
120         #address-cells = <3>;
121         bus-range = <0x0 0xff>;
122         clock-frequency = <33333333>;
123         interrupts = <16 2 1 13>;
124         fsl,iommu-parent = <&pamu0>;
125         fsl,liodn-reg = <&guts 0x508>; /* PEX3LIODNR */
126         pcie@0 {
127                 reg = <0 0 0 0 0>;
128                 #interrupt-cells = <1>;
129                 #size-cells = <2>;
130                 #address-cells = <3>;
131                 device_type = "pci";
132                 interrupts = <16 2 1 13>;
133                 interrupt-map-mask = <0xf800 0 0 7>;
134                 interrupt-map = <
135                         /* IDSEL 0x0 */
136                         0000 0 0 1 &mpic 42 1 0 0
137                         0000 0 0 2 &mpic 9 1 0 0
138                         0000 0 0 3 &mpic 10 1 0 0
139                         0000 0 0 4 &mpic 11 1 0 0
140                         >;
141         };
142 };
143 
144 /* controller at 0x203000 */
145 &pci3 {
146         compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
147         device_type = "pci";
148         #size-cells = <2>;
149         #address-cells = <3>;
150         bus-range = <0x0 0xff>;
151         clock-frequency = <33333333>;
152         interrupts = <16 2 1 12>;
153         fsl,iommu-parent = <&pamu0>;
154         fsl,liodn-reg = <&guts 0x50c>; /* PEX4LIODNR */
155         pcie@0 {
156                 reg = <0 0 0 0 0>;
157                 #interrupt-cells = <1>;
158                 #size-cells = <2>;
159                 #address-cells = <3>;
160                 device_type = "pci";
161                 interrupts = <16 2 1 12>;
162                 interrupt-map-mask = <0xf800 0 0 7>;
163                 interrupt-map = <
164                         /* IDSEL 0x0 */
165                         0000 0 0 1 &mpic 43 1 0 0
166                         0000 0 0 2 &mpic 0 1 0 0
167                         0000 0 0 3 &mpic 4 1 0 0
168                         0000 0 0 4 &mpic 8 1 0 0
169                         >;
170         };
171 };
172 
173 &rio {
174         compatible = "fsl,srio";
175         interrupts = <16 2 1 11>;
176         #address-cells = <2>;
177         #size-cells = <2>;
178         fsl,iommu-parent = <&pamu0>;
179         ranges;
180 
181         port1 {
182                 #address-cells = <2>;
183                 #size-cells = <2>;
184                 cell-index = <1>;
185                 fsl,liodn-reg = <&guts 0x510>; /* RIO1LIODNR */
186         };
187 
188         port2 {
189                 #address-cells = <2>;
190                 #size-cells = <2>;
191                 cell-index = <2>;
192                 fsl,liodn-reg = <&guts 0x514>; /* RIO2LIODNR */
193         };
194 };
195 
196 &dcsr {
197         #address-cells = <1>;
198         #size-cells = <1>;
199         compatible = "fsl,dcsr", "simple-bus";
200 
201         dcsr-epu@0 {
202                 compatible = "fsl,p5020-dcsr-epu", "fsl,dcsr-epu";
203                 interrupts = <52 2 0 0
204                               84 2 0 0
205                               85 2 0 0>;
206                 reg = <0x0 0x1000>;
207         };
208         dcsr-npc {
209                 compatible = "fsl,dcsr-npc";
210                 reg = <0x1000 0x1000 0x1000000 0x8000>;
211         };
212         dcsr-nxc@2000 {
213                 compatible = "fsl,dcsr-nxc";
214                 reg = <0x2000 0x1000>;
215         };
216         dcsr-corenet {
217                 compatible = "fsl,dcsr-corenet";
218                 reg = <0x8000 0x1000 0xB0000 0x1000>;
219         };
220         dcsr-dpaa@9000 {
221                 compatible = "fsl,p5020-dcsr-dpaa", "fsl,dcsr-dpaa";
222                 reg = <0x9000 0x1000>;
223         };
224         dcsr-ocn@11000 {
225                 compatible = "fsl,p5020-dcsr-ocn", "fsl,dcsr-ocn";
226                 reg = <0x11000 0x1000>;
227         };
228         dcsr-ddr@12000 {
229                 compatible = "fsl,dcsr-ddr";
230                 dev-handle = <&ddr1>;
231                 reg = <0x12000 0x1000>;
232         };
233         dcsr-ddr@13000 {
234                 compatible = "fsl,dcsr-ddr";
235                 dev-handle = <&ddr2>;
236                 reg = <0x13000 0x1000>;
237         };
238         dcsr-nal@18000 {
239                 compatible = "fsl,p5020-dcsr-nal", "fsl,dcsr-nal";
240                 reg = <0x18000 0x1000>;
241         };
242         dcsr-rcpm@22000 {
243                 compatible = "fsl,p5020-dcsr-rcpm", "fsl,dcsr-rcpm";
244                 reg = <0x22000 0x1000>;
245         };
246         dcsr-cpu-sb-proxy@40000 {
247                 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
248                 cpu-handle = <&cpu0>;
249                 reg = <0x40000 0x1000>;
250         };
251         dcsr-cpu-sb-proxy@41000 {
252                 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
253                 cpu-handle = <&cpu1>;
254                 reg = <0x41000 0x1000>;
255         };
256 };
257 
258 /include/ "qoriq-bman1-portals.dtsi"
259 
260 /include/ "qoriq-qman1-portals.dtsi"
261 
262 &soc {
263         #address-cells = <1>;
264         #size-cells = <1>;
265         device_type = "soc";
266         compatible = "simple-bus";
267 
268         soc-sram-error {
269                 compatible = "fsl,soc-sram-error";
270                 interrupts = <16 2 1 29>;
271         };
272 
273         corenet-law@0 {
274                 compatible = "fsl,corenet-law";
275                 reg = <0x0 0x1000>;
276                 fsl,num-laws = <32>;
277         };
278 
279         ddr1: memory-controller@8000 {
280                 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
281                 reg = <0x8000 0x1000>;
282                 interrupts = <16 2 1 23>;
283         };
284 
285         ddr2: memory-controller@9000 {
286                 compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller";
287                 reg = <0x9000 0x1000>;
288                 interrupts = <16 2 1 22>;
289         };
290 
291         cpc: l3-cache-controller@10000 {
292                 compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
293                 reg = <0x10000 0x1000
294                        0x11000 0x1000>;
295                 interrupts = <16 2 1 27
296                               16 2 1 26>;
297         };
298 
299         corenet-cf@18000 {
300                 compatible = "fsl,corenet1-cf", "fsl,corenet-cf";
301                 reg = <0x18000 0x1000>;
302                 interrupts = <16 2 1 31>;
303                 fsl,ccf-num-csdids = <32>;
304                 fsl,ccf-num-snoopids = <32>;
305         };
306 
307         iommu@20000 {
308                 compatible = "fsl,pamu-v1.0", "fsl,pamu";
309                 reg = <0x20000 0x4000>; /* for compatibility with older PAMU drivers */
310                 ranges = <0 0x20000 0x4000>;
311                 #address-cells = <1>;
312                 #size-cells = <1>;
313                 interrupts = <
314                         24 2 0 0
315                         16 2 1 30>;
316                 fsl,portid-mapping = <0x3c000000>;
317 
318                 pamu0: pamu@0 {
319                         reg = <0 0x1000>;
320                         fsl,primary-cache-geometry = <32 1>;
321                         fsl,secondary-cache-geometry = <128 2>;
322                 };
323 
324                 pamu1: pamu@1000 {
325                         reg = <0x1000 0x1000>;
326                         fsl,primary-cache-geometry = <32 1>;
327                         fsl,secondary-cache-geometry = <128 2>;
328                 };
329 
330                 pamu2: pamu@2000 {
331                         reg = <0x2000 0x1000>;
332                         fsl,primary-cache-geometry = <32 1>;
333                         fsl,secondary-cache-geometry = <128 2>;
334                 };
335 
336                 pamu3: pamu@3000 {
337                         reg = <0x3000 0x1000>;
338                         fsl,primary-cache-geometry = <32 1>;
339                         fsl,secondary-cache-geometry = <128 2>;
340                 };
341         };
342 
343 /include/ "qoriq-mpic.dtsi"
344 
345         guts: global-utilities@e0000 {
346                 compatible = "fsl,qoriq-device-config-1.0";
347                 reg = <0xe0000 0xe00>;
348                 fsl,has-rstcr;
349                 #sleep-cells = <1>;
350                 fsl,liodn-bits = <12>;
351         };
352 
353         pins: global-utilities@e0e00 {
354                 compatible = "fsl,qoriq-pin-control-1.0";
355                 reg = <0xe0e00 0x200>;
356                 #sleep-cells = <2>;
357         };
358 
359 /include/ "qoriq-clockgen1.dtsi"
360         global-utilities@e1000 {
361                 compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0";
362         };
363 
364         rcpm: global-utilities@e2000 {
365                 compatible = "fsl,qoriq-rcpm-1.0";
366                 reg = <0xe2000 0x1000>;
367                 #sleep-cells = <1>;
368         };
369 
370         sfp: sfp@e8000 {
371                 compatible = "fsl,p5020-sfp", "fsl,qoriq-sfp-1.0";
372                 reg        = <0xe8000 0x1000>;
373         };
374 
375         serdes: serdes@ea000 {
376                 compatible = "fsl,p5020-serdes";
377                 reg        = <0xea000 0x1000>;
378         };
379 
380 /include/ "qoriq-dma-0.dtsi"
381         dma@100300 {
382                 fsl,iommu-parent = <&pamu0>;
383                 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
384         };
385 
386 /include/ "qoriq-dma-1.dtsi"
387         dma@101300 {
388                 fsl,iommu-parent = <&pamu0>;
389                 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
390         };
391 
392 /include/ "qoriq-espi-0.dtsi"
393         spi@110000 {
394                 fsl,espi-num-chipselects = <4>;
395         };
396 
397 /include/ "qoriq-esdhc-0.dtsi"
398         sdhc@114000 {
399                 compatible = "fsl,p5020-esdhc", "fsl,esdhc";
400                 fsl,iommu-parent = <&pamu1>;
401                 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
402                 sdhci,auto-cmd12;
403         };
404 
405 /include/ "qoriq-i2c-0.dtsi"
406 /include/ "qoriq-i2c-1.dtsi"
407 /include/ "qoriq-duart-0.dtsi"
408 /include/ "qoriq-duart-1.dtsi"
409 /include/ "qoriq-gpio-0.dtsi"
410 /include/ "qoriq-usb2-mph-0.dtsi"
411         usb0: usb@210000 {
412                 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
413                 fsl,iommu-parent = <&pamu1>;
414                 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
415                 phy_type = "utmi";
416                 port0;
417         };
418 
419 /include/ "qoriq-usb2-dr-0.dtsi"
420         usb1: usb@211000 {
421                 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
422                 fsl,iommu-parent = <&pamu1>;
423                 fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
424                 dr_mode = "host";
425                 phy_type = "utmi";
426         };
427 
428 /include/ "qoriq-sata2-0.dtsi"
429         sata@220000 {
430                 fsl,iommu-parent = <&pamu1>;
431                 fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
432         };
433 
434 /include/ "qoriq-sata2-1.dtsi"
435         sata@221000 {
436                 fsl,iommu-parent = <&pamu1>;
437                 fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
438         };
439 /include/ "qoriq-sec4.2-0.dtsi"
440         crypto@300000 {
441                 fsl,iommu-parent = <&pamu1>;
442         };
443 
444 /include/ "qoriq-qman1.dtsi"
445 /include/ "qoriq-bman1.dtsi"
446 
447 /include/ "qoriq-raid1.0-0.dtsi"
448         raideng@320000 {
449                 fsl,iommu-parent = <&pamu1>;
450         };
451 
452 /include/ "qoriq-fman-0.dtsi"
453 /include/ "qoriq-fman-0-1g-0.dtsi"
454 /include/ "qoriq-fman-0-1g-1.dtsi"
455 /include/ "qoriq-fman-0-1g-2.dtsi"
456 /include/ "qoriq-fman-0-1g-3.dtsi"
457 /include/ "qoriq-fman-0-1g-4.dtsi"
458 /include/ "qoriq-fman-0-10g-0.dtsi"
459         fman@400000 {
460                 enet0: ethernet@e0000 {
461                 };
462 
463                 enet1: ethernet@e2000 {
464                 };
465 
466                 enet2: ethernet@e4000 {
467                 };
468 
469                 enet3: ethernet@e6000 {
470                 };
471 
472                 enet4: ethernet@e8000 {
473                 };
474 
475                 enet5: ethernet@f0000 {
476                 };
477         };
478 };

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