1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Device Tree for the MGCOGE plattform from keymile
4 *
5 * Copyright 2008 DENX Software Engineering GmbH
6 * Heiko Schocher <hs@denx.de>
7 */
8
9 /dts-v1/;
10 / {
11 model = "MGCOGE";
12 compatible = "keymile,km82xx";
13 #address-cells = <1>;
14 #size-cells = <1>;
15
16 aliases {
17 ethernet0 = ð0;
18 serial0 = &smc2;
19 };
20
21 cpus {
22 #address-cells = <1>;
23 #size-cells = <0>;
24
25 PowerPC,8247@0 {
26 device_type = "cpu";
27 reg = <0>;
28 d-cache-line-size = <32>;
29 i-cache-line-size = <32>;
30 d-cache-size = <16384>;
31 i-cache-size = <16384>;
32 timebase-frequency = <0>; /* Filled in by U-Boot */
33 clock-frequency = <0>; /* Filled in by U-Boot */
34 bus-frequency = <0>; /* Filled in by U-Boot */
35 };
36 };
37
38 localbus@f0010100 {
39 compatible = "fsl,mpc8247-localbus",
40 "fsl,pq2-localbus",
41 "simple-bus";
42 #address-cells = <2>;
43 #size-cells = <1>;
44 reg = <0xf0010100 0x40>;
45
46 ranges = <0 0 0xfe000000 0x00400000
47 1 0 0x30000000 0x00010000
48 2 0 0x40000000 0x00010000
49 5 0 0x50000000 0x04000000
50 >;
51
52 flash@0,0 {
53 compatible = "cfi-flash";
54 reg = <0 0x0 0x400000>;
55 #address-cells = <1>;
56 #size-cells = <1>;
57 bank-width = <1>;
58 device-width = <1>;
59 partition@0 {
60 label = "u-boot";
61 reg = <0x00000 0xC0000>;
62 };
63 partition@1 {
64 label = "env";
65 reg = <0xC0000 0x20000>;
66 };
67 partition@2 {
68 label = "envred";
69 reg = <0xE0000 0x20000>;
70 };
71 partition@3 {
72 label = "free";
73 reg = <0x100000 0x300000>;
74 };
75 };
76
77 flash@5,0 {
78 compatible = "cfi-flash";
79 reg = <5 0x00000000 0x02000000
80 5 0x02000000 0x02000000>;
81 #address-cells = <1>;
82 #size-cells = <1>;
83 bank-width = <2>;
84 partition@app { /* 64 MBytes */
85 label = "ubi0";
86 reg = <0x00000000 0x04000000>;
87 };
88 };
89 };
90
91 memory {
92 device_type = "memory";
93 reg = <0 0>; /* Filled in by U-Boot */
94 };
95
96 soc@f0000000 {
97 #address-cells = <1>;
98 #size-cells = <1>;
99 compatible = "fsl,mpc8247-immr", "fsl,pq2-soc", "simple-bus";
100 ranges = <0x00000000 0xf0000000 0x00053000>;
101
102 // Temporary until code stops depending on it.
103 device_type = "soc";
104
105 cpm@119c0 {
106 #address-cells = <1>;
107 #size-cells = <1>;
108 #interrupt-cells = <2>;
109 compatible = "fsl,mpc8247-cpm", "fsl,cpm2",
110 "simple-bus";
111 reg = <0x119c0 0x30>;
112 ranges;
113
114 muram {
115 compatible = "fsl,cpm-muram";
116 #address-cells = <1>;
117 #size-cells = <1>;
118 ranges = <0 0 0x10000>;
119
120 data@0 {
121 compatible = "fsl,cpm-muram-data";
122 reg = <0x80 0x1f80 0x9800 0x800>;
123 };
124 };
125
126 brg@119f0 {
127 compatible = "fsl,mpc8247-brg",
128 "fsl,cpm2-brg",
129 "fsl,cpm-brg";
130 reg = <0x119f0 0x10 0x115f0 0x10>;
131 };
132
133 /* Monitor port/SMC2 */
134 smc2: serial@11a90 {
135 device_type = "serial";
136 compatible = "fsl,mpc8247-smc-uart",
137 "fsl,cpm2-smc-uart";
138 reg = <0x11a90 0x20 0x88fc 0x02>;
139 interrupts = <5 8>;
140 interrupt-parent = <&PIC>;
141 fsl,cpm-brg = <2>;
142 fsl,cpm-command = <0x21200000>;
143 current-speed = <0>; /* Filled in by U-Boot */
144 };
145
146 eth0: ethernet@11a60 {
147 device_type = "network";
148 compatible = "fsl,mpc8247-scc-enet",
149 "fsl,cpm2-scc-enet";
150 reg = <0x11a60 0x20 0x8300 0x100 0x11390 1>;
151 local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */
152 interrupts = <43 8>;
153 interrupt-parent = <&PIC>;
154 linux,network-index = <0>;
155 fsl,cpm-command = <0xce00000>;
156 fixed-link = <0 0 10 0 0>;
157 };
158
159 i2c@11860 {
160 compatible = "fsl,mpc8272-i2c",
161 "fsl,cpm2-i2c";
162 reg = <0x11860 0x20 0x8afc 0x2>;
163 interrupts = <1 8>;
164 interrupt-parent = <&PIC>;
165 fsl,cpm-command = <0x29600000>;
166 #address-cells = <1>;
167 #size-cells = <0>;
168 };
169
170 mdio@10d40 {
171 compatible = "fsl,cpm2-mdio-bitbang";
172 reg = <0x10d00 0x14>;
173 #address-cells = <1>;
174 #size-cells = <0>;
175 fsl,mdio-pin = <12>;
176 fsl,mdc-pin = <13>;
177
178 phy0: ethernet-phy@0 {
179 reg = <0x0>;
180 };
181
182 phy1: ethernet-phy@1 {
183 reg = <0x1>;
184 };
185 };
186
187 /* FCC1 management to switch */
188 ethernet@11300 {
189 device_type = "network";
190 compatible = "fsl,cpm2-fcc-enet";
191 reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>;
192 local-mac-address = [ 00 01 02 03 04 07 ];
193 interrupts = <32 8>;
194 interrupt-parent = <&PIC>;
195 phy-handle = <&phy0>;
196 linux,network-index = <1>;
197 fsl,cpm-command = <0x12000300>;
198 };
199
200 /* FCC2 to redundant core unit over backplane */
201 ethernet@11320 {
202 device_type = "network";
203 compatible = "fsl,cpm2-fcc-enet";
204 reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
205 local-mac-address = [ 00 01 02 03 04 08 ];
206 interrupts = <33 8>;
207 interrupt-parent = <&PIC>;
208 phy-handle = <&phy1>;
209 linux,network-index = <2>;
210 fsl,cpm-command = <0x16200300>;
211 };
212
213 usb@11b60 {
214 compatible = "fsl,mpc8272-cpm-usb";
215 mode = "peripheral";
216 reg = <0x11b60 0x40 0x8b00 0x100>;
217 interrupts = <11 8>;
218 interrupt-parent = <&PIC>;
219 usb-clock = <5>;
220 };
221 spi@11aa0 {
222 cell-index = <0>;
223 compatible = "fsl,spi", "fsl,cpm2-spi";
224 reg = <0x11a80 0x40 0x89fc 0x2>;
225 interrupts = <2 8>;
226 interrupt-parent = <&PIC>;
227 cs-gpios = < &cpm2_pio_d 19 0>;
228 };
229
230 };
231
232 cpm2_pio_d: gpio-controller@10d60 {
233 #gpio-cells = <2>;
234 compatible = "fsl,cpm2-pario-bank";
235 reg = <0x10d60 0x14>;
236 gpio-controller;
237 };
238
239 cpm2_pio_c: gpio-controller@10d40 {
240 #gpio-cells = <2>;
241 compatible = "fsl,cpm2-pario-bank";
242 reg = <0x10d40 0x14>;
243 gpio-controller;
244 };
245
246 PIC: interrupt-controller@10c00 {
247 #interrupt-cells = <2>;
248 interrupt-controller;
249 reg = <0x10c00 0x80>;
250 compatible = "fsl,mpc8247-pic", "fsl,pq2-pic";
251 };
252 };
253 };
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