1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Manroland mucmc52 board Device Tree Source
4 *
5 * Copyright (C) 2009 DENX Software Engineering GmbH
6 * Heiko Schocher <hs@denx.de>
7 * Copyright 2006-2007 Secret Lab Technologies Ltd.
8 */
9
10 /include/ "mpc5200b.dtsi"
11
12 /* Timer pins that need to be in GPIO mode */
13 &gpt0 { gpio-controller; };
14 &gpt1 { gpio-controller; };
15 &gpt2 { gpio-controller; };
16 &gpt3 { gpio-controller; };
17
18 /* Disabled timers */
19 &gpt4 { status = "disabled"; };
20 &gpt5 { status = "disabled"; };
21 &gpt6 { status = "disabled"; };
22 &gpt7 { status = "disabled"; };
23
24 / {
25 model = "manroland,mucmc52";
26 compatible = "manroland,mucmc52";
27
28 soc5200@f0000000 {
29 rtc@800 {
30 status = "disabled";
31 };
32
33 can@900 {
34 status = "disabled";
35 };
36
37 can@980 {
38 status = "disabled";
39 };
40
41 spi@f00 {
42 status = "disabled";
43 };
44
45 usb@1000 {
46 status = "disabled";
47 };
48
49 psc@2000 { // PSC1
50 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
51 };
52
53 psc@2200 { // PSC2
54 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
55 };
56
57 psc@2400 { // PSC3
58 status = "disabled";
59 };
60
61 psc@2600 { // PSC4
62 status = "disabled";
63 };
64
65 psc@2800 { // PSC5
66 status = "disabled";
67 };
68
69 psc@2c00 { // PSC6
70 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
71 };
72
73 ethernet@3000 {
74 phy-handle = <&phy0>;
75 };
76
77 mdio@3000 {
78 phy0: ethernet-phy@0 {
79 compatible = "intel,lxt971";
80 reg = <0>;
81 };
82 };
83
84 i2c@3d00 {
85 status = "disabled";
86 };
87
88 i2c@3d40 {
89 hwmon@2c {
90 compatible = "ad,adm9240";
91 reg = <0x2c>;
92 };
93 rtc@51 {
94 compatible = "nxp,pcf8563";
95 reg = <0x51>;
96 };
97 };
98 };
99
100 pci@f0000d00 {
101 interrupt-map-mask = <0xf800 0 0 7>;
102 interrupt-map = <
103 /* IDSEL 0x10 */
104 0x8000 0 0 1 &mpc5200_pic 0 3 3
105 0x8000 0 0 2 &mpc5200_pic 0 3 3
106 0x8000 0 0 3 &mpc5200_pic 0 2 3
107 0x8000 0 0 4 &mpc5200_pic 0 1 3
108 >;
109 ranges = <0x42000000 0 0x60000000 0x60000000 0 0x10000000>,
110 <0x02000000 0 0x90000000 0x90000000 0 0x10000000>,
111 <0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
112 };
113
114 localbus {
115 ranges = <0 0 0xff800000 0x00800000
116 1 0 0x80000000 0x00800000
117 3 0 0x80000000 0x00800000>;
118
119 flash@0,0 {
120 compatible = "cfi-flash";
121 reg = <0 0 0x00800000>;
122 bank-width = <4>;
123 device-width = <2>;
124 #size-cells = <1>;
125 #address-cells = <1>;
126 partition@0 {
127 label = "DTS";
128 reg = <0x0 0x00100000>;
129 };
130 partition@100000 {
131 label = "Kernel";
132 reg = <0x100000 0x00200000>;
133 };
134 partition@300000 {
135 label = "RootFS";
136 reg = <0x00300000 0x00200000>;
137 };
138 partition@500000 {
139 label = "user";
140 reg = <0x00500000 0x00200000>;
141 };
142 partition@700000 {
143 label = "U-Boot";
144 reg = <0x00700000 0x00040000>;
145 };
146 partition@740000 {
147 label = "Env";
148 reg = <0x00740000 0x00020000>;
149 };
150 partition@760000 {
151 label = "red. Env";
152 reg = <0x00760000 0x00020000>;
153 };
154 partition@780000 {
155 label = "reserve";
156 reg = <0x00780000 0x00080000>;
157 };
158 };
159
160 simple100: gpio-controller-100@3,600100 {
161 compatible = "manroland,mucmc52-aux-gpio";
162 reg = <3 0x00600100 0x1>;
163 gpio-controller;
164 #gpio-cells = <2>;
165 };
166 simple104: gpio-controller-104@3,600104 {
167 compatible = "manroland,mucmc52-aux-gpio";
168 reg = <3 0x00600104 0x1>;
169 gpio-controller;
170 #gpio-cells = <2>;
171 };
172 simple200: gpio-controller-200@3,600200 {
173 compatible = "manroland,mucmc52-aux-gpio";
174 reg = <3 0x00600200 0x1>;
175 gpio-controller;
176 #gpio-cells = <2>;
177 };
178 simple201: gpio-controller-201@3,600201 {
179 compatible = "manroland,mucmc52-aux-gpio";
180 reg = <3 0x00600201 0x1>;
181 gpio-controller;
182 #gpio-cells = <2>;
183 };
184 simple202: gpio-controller-202@3,600202 {
185 compatible = "manroland,mucmc52-aux-gpio";
186 reg = <3 0x00600202 0x1>;
187 gpio-controller;
188 #gpio-cells = <2>;
189 };
190 simple203: gpio-controller-203@3,600203 {
191 compatible = "manroland,mucmc52-aux-gpio";
192 reg = <3 0x00600203 0x1>;
193 gpio-controller;
194 #gpio-cells = <2>;
195 };
196 simple204: gpio-controller-204@3,600204 {
197 compatible = "manroland,mucmc52-aux-gpio";
198 reg = <3 0x00600204 0x1>;
199 gpio-controller;
200 #gpio-cells = <2>;
201 };
202 simple206: gpio-controller-206@3,600206 {
203 compatible = "manroland,mucmc52-aux-gpio";
204 reg = <3 0x00600206 0x1>;
205 gpio-controller;
206 #gpio-cells = <2>;
207 };
208 simple207: gpio-controller-207@3,600207 {
209 compatible = "manroland,mucmc52-aux-gpio";
210 reg = <3 0x00600207 0x1>;
211 gpio-controller;
212 #gpio-cells = <2>;
213 };
214 simple20f: gpio-controller-20f@3,60020f {
215 compatible = "manroland,mucmc52-aux-gpio";
216 reg = <3 0x0060020f 0x1>;
217 gpio-controller;
218 #gpio-cells = <2>;
219 };
220
221 };
222 };
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