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Linux/arch/powerpc/include/asm/book3s/64/hugetlb.h

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  1 /* SPDX-License-Identifier: GPL-2.0 */
  2 #ifndef _ASM_POWERPC_BOOK3S_64_HUGETLB_H
  3 #define _ASM_POWERPC_BOOK3S_64_HUGETLB_H
  4 
  5 #include <asm/firmware.h>
  6 
  7 /*
  8  * For radix we want generic code to handle hugetlb. But then if we want
  9  * both hash and radix to be enabled together we need to workaround the
 10  * limitations.
 11  */
 12 void radix__flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
 13 void radix__local_flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
 14 
 15 extern void radix__huge_ptep_modify_prot_commit(struct vm_area_struct *vma,
 16                                                 unsigned long addr, pte_t *ptep,
 17                                                 pte_t old_pte, pte_t pte);
 18 
 19 static inline int hstate_get_psize(struct hstate *hstate)
 20 {
 21         unsigned long shift;
 22 
 23         shift = huge_page_shift(hstate);
 24         if (shift == mmu_psize_defs[MMU_PAGE_2M].shift)
 25                 return MMU_PAGE_2M;
 26         else if (shift == mmu_psize_defs[MMU_PAGE_1G].shift)
 27                 return MMU_PAGE_1G;
 28         else if (shift == mmu_psize_defs[MMU_PAGE_16M].shift)
 29                 return MMU_PAGE_16M;
 30         else if (shift == mmu_psize_defs[MMU_PAGE_16G].shift)
 31                 return MMU_PAGE_16G;
 32         else {
 33                 WARN(1, "Wrong huge page shift\n");
 34                 return mmu_virtual_psize;
 35         }
 36 }
 37 
 38 #define __HAVE_ARCH_GIGANTIC_PAGE_RUNTIME_SUPPORTED
 39 static inline bool gigantic_page_runtime_supported(void)
 40 {
 41         /*
 42          * We used gigantic page reservation with hypervisor assist in some case.
 43          * We cannot use runtime allocation of gigantic pages in those platforms
 44          * This is hash translation mode LPARs.
 45          */
 46         if (firmware_has_feature(FW_FEATURE_LPAR) && !radix_enabled())
 47                 return false;
 48 
 49         return true;
 50 }
 51 
 52 #define huge_ptep_modify_prot_start huge_ptep_modify_prot_start
 53 extern pte_t huge_ptep_modify_prot_start(struct vm_area_struct *vma,
 54                                          unsigned long addr, pte_t *ptep);
 55 
 56 #define huge_ptep_modify_prot_commit huge_ptep_modify_prot_commit
 57 extern void huge_ptep_modify_prot_commit(struct vm_area_struct *vma,
 58                                          unsigned long addr, pte_t *ptep,
 59                                          pte_t old_pte, pte_t new_pte);
 60 
 61 static inline void flush_hugetlb_page(struct vm_area_struct *vma,
 62                                       unsigned long vmaddr)
 63 {
 64         if (radix_enabled())
 65                 return radix__flush_hugetlb_page(vma, vmaddr);
 66 }
 67 
 68 void flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
 69 
 70 static inline int check_and_get_huge_psize(int shift)
 71 {
 72         int mmu_psize;
 73 
 74         if (shift > SLICE_HIGH_SHIFT)
 75                 return -EINVAL;
 76 
 77         mmu_psize = shift_to_mmu_psize(shift);
 78 
 79         /*
 80          * We need to make sure that for different page sizes reported by
 81          * firmware we only add hugetlb support for page sizes that can be
 82          * supported by linux page table layout.
 83          * For now we have
 84          * Radix: 2M and 1G
 85          * Hash: 16M and 16G
 86          */
 87         if (radix_enabled()) {
 88                 if (mmu_psize != MMU_PAGE_2M && mmu_psize != MMU_PAGE_1G)
 89                         return -EINVAL;
 90         } else {
 91                 if (mmu_psize != MMU_PAGE_16M && mmu_psize != MMU_PAGE_16G)
 92                         return -EINVAL;
 93         }
 94         return mmu_psize;
 95 }
 96 
 97 #endif
 98 

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