1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_POWERPC_NOHASH_64_PGTABLE_H
3 #define _ASM_POWERPC_NOHASH_64_PGTABLE_H
4 /*
5 * This file contains the functions and defines necessary to modify and use
6 * the ppc64 non-hashed page table.
7 */
8
9 #include <linux/sizes.h>
10
11 #include <asm/nohash/64/pgtable-4k.h>
12 #include <asm/barrier.h>
13 #include <asm/asm-const.h>
14
15 /*
16 * Size of EA range mapped by our pagetables.
17 */
18 #define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \
19 PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT)
20 #define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE)
21
22 #define PMD_CACHE_INDEX PMD_INDEX_SIZE
23 #define PUD_CACHE_INDEX PUD_INDEX_SIZE
24
25 /*
26 * Define the address range of the kernel non-linear virtual area
27 */
28 #define KERN_VIRT_START ASM_CONST(0xc000100000000000)
29 #define KERN_VIRT_SIZE ASM_CONST(0x0000100000000000)
30
31 /*
32 * The vmalloc space starts at the beginning of that region, and
33 * occupies a quarter of it on Book3E
34 * (we keep a quarter for the virtual memmap)
35 */
36 #define VMALLOC_START KERN_VIRT_START
37 #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 2)
38 #define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE)
39
40 /*
41 * The third quarter of the kernel virtual space is used for IO mappings,
42 * it's itself carved into the PIO region (ISA and PHB IO space) and
43 * the ioremap space
44 *
45 * ISA_IO_BASE = KERN_IO_START, 64K reserved area
46 * PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
47 * IOREMAP_BASE = ISA_IO_BASE + 2G to KERN_IO_START + KERN_IO_SIZE
48 */
49 #define KERN_IO_START (KERN_VIRT_START + (KERN_VIRT_SIZE >> 1))
50 #define KERN_IO_SIZE (KERN_VIRT_SIZE >> 2)
51 #define FULL_IO_SIZE 0x80000000ul
52 #define ISA_IO_BASE (KERN_IO_START)
53 #define ISA_IO_END (KERN_IO_START + 0x10000ul)
54 #define PHB_IO_BASE (ISA_IO_END)
55 #define PHB_IO_END (KERN_IO_START + FULL_IO_SIZE)
56 #define IOREMAP_BASE (PHB_IO_END)
57 #define IOREMAP_START (ioremap_bot)
58 #define IOREMAP_END (KERN_IO_START + KERN_IO_SIZE - FIXADDR_SIZE)
59 #define FIXADDR_SIZE SZ_32M
60 #define FIXADDR_TOP (IOREMAP_END + FIXADDR_SIZE)
61
62 /*
63 * Defines the address of the vmemap area, in its own region on
64 * after the vmalloc space on Book3E
65 */
66 #define VMEMMAP_BASE VMALLOC_END
67 #define VMEMMAP_END KERN_IO_START
68 #define vmemmap ((struct page *)VMEMMAP_BASE)
69
70
71 /*
72 * Include the PTE bits definitions
73 */
74 #include <asm/nohash/pte-e500.h>
75
76 #define PTE_RPN_MASK (~((1UL << PTE_RPN_SHIFT) - 1))
77
78 #define H_PAGE_4K_PFN 0
79
80 #ifndef __ASSEMBLY__
81 /* pte_clear moved to later in this file */
82
83 #define PMD_BAD_BITS (PTE_TABLE_SIZE-1)
84 #define PUD_BAD_BITS (PMD_TABLE_SIZE-1)
85
86 static inline void pmd_set(pmd_t *pmdp, unsigned long val)
87 {
88 *pmdp = __pmd(val);
89 }
90
91 static inline void pmd_clear(pmd_t *pmdp)
92 {
93 *pmdp = __pmd(0);
94 }
95
96 static inline pte_t pmd_pte(pmd_t pmd)
97 {
98 return __pte(pmd_val(pmd));
99 }
100
101 #define pmd_none(pmd) (!pmd_val(pmd))
102 #define pmd_bad(pmd) (!is_kernel_addr(pmd_val(pmd)) \
103 || (pmd_val(pmd) & PMD_BAD_BITS))
104 #define pmd_present(pmd) (!pmd_none(pmd))
105 #define pmd_page_vaddr(pmd) ((const void *)(pmd_val(pmd) & ~PMD_MASKED_BITS))
106 extern struct page *pmd_page(pmd_t pmd);
107 #define pmd_pfn(pmd) (page_to_pfn(pmd_page(pmd)))
108
109 static inline void pud_set(pud_t *pudp, unsigned long val)
110 {
111 *pudp = __pud(val);
112 }
113
114 static inline void pud_clear(pud_t *pudp)
115 {
116 *pudp = __pud(0);
117 }
118
119 #define pud_none(pud) (!pud_val(pud))
120 #define pud_bad(pud) (!is_kernel_addr(pud_val(pud)) \
121 || (pud_val(pud) & PUD_BAD_BITS))
122 #define pud_present(pud) (pud_val(pud) != 0)
123
124 static inline pmd_t *pud_pgtable(pud_t pud)
125 {
126 return (pmd_t *)(pud_val(pud) & ~PUD_MASKED_BITS);
127 }
128
129 extern struct page *pud_page(pud_t pud);
130
131 static inline pte_t pud_pte(pud_t pud)
132 {
133 return __pte(pud_val(pud));
134 }
135
136 static inline pud_t pte_pud(pte_t pte)
137 {
138 return __pud(pte_val(pte));
139 }
140 #define pud_write(pud) pte_write(pud_pte(pud))
141 #define p4d_write(pgd) pte_write(p4d_pte(p4d))
142
143 static inline void p4d_set(p4d_t *p4dp, unsigned long val)
144 {
145 *p4dp = __p4d(val);
146 }
147
148 #define __HAVE_ARCH_HUGE_PTEP_SET_WRPROTECT
149 static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
150 unsigned long addr, pte_t *ptep)
151 {
152 pte_update(mm, addr, ptep, _PAGE_WRITE, 0, 1);
153 }
154
155 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
156 #define ptep_clear_flush_young(__vma, __address, __ptep) \
157 ({ \
158 int __young = ptep_test_and_clear_young(__vma, __address, __ptep);\
159 __young; \
160 })
161
162 #define pmd_ERROR(e) \
163 pr_err("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
164 #define pgd_ERROR(e) \
165 pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
166
167 /*
168 * Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that
169 * are !pte_none() && !pte_present().
170 *
171 * Format of swap PTEs:
172 *
173 * 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 3 3
174 * 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
175 * <-------------------------- offset ----------------------------
176 *
177 * 3 3 3 3 3 3 3 3 4 4 4 4 4 4 4 4 4 4 5 5 5 5 5 5 5 5 5 5 6 6 6 6
178 * 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3
179 * --------------> <----------- zero ------------> E < type -> 0 0
180 *
181 * E is the exclusive marker that is not stored in swap entries.
182 */
183 #define MAX_SWAPFILES_CHECK() do { \
184 BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS); \
185 } while (0)
186
187 #define SWP_TYPE_BITS 5
188 #define __swp_type(x) (((x).val >> 2) \
189 & ((1UL << SWP_TYPE_BITS) - 1))
190 #define __swp_offset(x) ((x).val >> PTE_RPN_SHIFT)
191 #define __swp_entry(type, offset) ((swp_entry_t) { \
192 (((type) & 0x1f) << 2) \
193 | ((offset) << PTE_RPN_SHIFT) })
194
195 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) })
196 #define __swp_entry_to_pte(x) __pte((x).val)
197
198 /* We borrow MSB 56 (LSB 7) to store the exclusive marker in swap PTEs. */
199 #define _PAGE_SWP_EXCLUSIVE 0x80
200
201 extern int __meminit vmemmap_create_mapping(unsigned long start,
202 unsigned long page_size,
203 unsigned long phys);
204 extern void vmemmap_remove_mapping(unsigned long start,
205 unsigned long page_size);
206 void __patch_exception(int exc, unsigned long addr);
207 #define patch_exception(exc, name) do { \
208 extern unsigned int name; \
209 __patch_exception((exc), (unsigned long)&name); \
210 } while (0)
211
212 #endif /* __ASSEMBLY__ */
213
214 #endif /* _ASM_POWERPC_NOHASH_64_PGTABLE_H */
215
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