1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 #ifndef __ASM_POWERPC_PCI_H
3 #define __ASM_POWERPC_PCI_H
4 #ifdef __KERNEL__
5
6 /*
7 */
8
9 #include <linux/types.h>
10 #include <linux/slab.h>
11 #include <linux/string.h>
12 #include <linux/dma-map-ops.h>
13 #include <linux/scatterlist.h>
14
15 #include <asm/machdep.h>
16 #include <asm/io.h>
17 #include <asm/pci-bridge.h>
18
19 /* Return values for pci_controller_ops.probe_mode function */
20 #define PCI_PROBE_NONE -1 /* Don't look at this bus at all */
21 #define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */
22 #define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */
23
24 #define PCIBIOS_MIN_IO 0x1000
25 #define PCIBIOS_MIN_MEM 0x10000000
26
27 /* Values for the `which' argument to sys_pciconfig_iobase syscall. */
28 #define IOBASE_BRIDGE_NUMBER 0
29 #define IOBASE_MEMORY 1
30 #define IOBASE_IO 2
31 #define IOBASE_ISA_IO 3
32 #define IOBASE_ISA_MEM 4
33
34 /*
35 * Set this to 1 if you want the kernel to re-assign all PCI
36 * bus numbers (don't do that on ppc64 yet !)
37 */
38 #define pcibios_assign_all_busses() \
39 (pci_has_flag(PCI_REASSIGN_ALL_BUS))
40
41 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
42 {
43 if (ppc_md.pci_get_legacy_ide_irq)
44 return ppc_md.pci_get_legacy_ide_irq(dev, channel);
45 return channel ? 15 : 14;
46 }
47
48 #ifdef CONFIG_PCI
49 void __init set_pci_dma_ops(const struct dma_map_ops *dma_ops);
50 #else /* CONFIG_PCI */
51 #define set_pci_dma_ops(d)
52 #endif
53
54 #ifdef CONFIG_PPC64
55
56 /*
57 * We want to avoid touching the cacheline size or MWI bit.
58 * pSeries firmware sets the cacheline size (which is not the cpu cacheline
59 * size in all cases) and hardware treats MWI the same as memory write.
60 */
61 #define PCI_DISABLE_MWI
62
63 #endif /* CONFIG_PPC64 */
64
65 extern int pci_domain_nr(struct pci_bus *bus);
66
67 /* Decide whether to display the domain number in /proc */
68 extern int pci_proc_domain(struct pci_bus *bus);
69
70 struct vm_area_struct;
71
72 /* Tell PCI code what kind of PCI resource mappings we support */
73 #define HAVE_PCI_MMAP 1
74 #define ARCH_GENERIC_PCI_MMAP_RESOURCE 1
75 #define arch_can_pci_mmap_io() 1
76 #define arch_can_pci_mmap_wc() 1
77
78 extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
79 size_t count);
80 extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
81 size_t count);
82 extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
83 struct vm_area_struct *vma,
84 enum pci_mmap_state mmap_state);
85 extern void pci_adjust_legacy_attr(struct pci_bus *bus,
86 enum pci_mmap_state mmap_type);
87 #define HAVE_PCI_LEGACY 1
88
89 extern void pcibios_claim_one_bus(struct pci_bus *b);
90
91 extern void pcibios_finish_adding_to_bus(struct pci_bus *bus);
92
93 extern void pcibios_resource_survey(void);
94
95 extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
96 extern int remove_phb_dynamic(struct pci_controller *phb);
97
98 extern struct pci_dev *of_create_pci_dev(struct device_node *node,
99 struct pci_bus *bus, int devfn);
100
101 extern unsigned int pci_parse_of_flags(u32 addr0, int bridge);
102
103 extern void of_scan_pci_bridge(struct pci_dev *dev);
104
105 extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
106 extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus);
107
108 extern pgprot_t pci_phys_mem_access_prot(unsigned long pfn,
109 unsigned long size,
110 pgprot_t prot);
111
112 extern resource_size_t pcibios_io_space_offset(struct pci_controller *hose);
113 extern void pcibios_setup_bus_self(struct pci_bus *bus);
114 extern void pcibios_setup_phb_io_space(struct pci_controller *hose);
115 extern void pcibios_scan_phb(struct pci_controller *hose);
116
117 #endif /* __KERNEL__ */
118
119 #endif /* __ASM_POWERPC_PCI_H */
120
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