1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Quadword loads and stores 4 * for use in instruction emulation. 5 * 6 * Copyright 2017 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> 7 */ 8 9 #include <asm/processor.h> 10 #include <asm/ppc_asm.h> 11 #include <asm/ppc-opcode.h> 12 #include <asm/reg.h> 13 #include <asm/asm-offsets.h> 14 #include <linux/errno.h> 15 16 /* do_lq(unsigned long ea, unsigned long *regs) */ 17 _GLOBAL(do_lq) 18 1: lq r6, 0(r3) 19 std r6, 0(r4) 20 std r7, 8(r4) 21 li r3, 0 22 blr 23 2: li r3, -EFAULT 24 blr 25 EX_TABLE(1b, 2b) 26 27 /* do_stq(unsigned long ea, unsigned long val0, unsigned long val1) */ 28 _GLOBAL(do_stq) 29 1: stq r4, 0(r3) 30 li r3, 0 31 blr 32 2: li r3, -EFAULT 33 blr 34 EX_TABLE(1b, 2b) 35 36 /* do_lqarx(unsigned long ea, unsigned long *regs) */ 37 _GLOBAL(do_lqarx) 38 1: PPC_LQARX(6, 0, 3, 0) 39 std r6, 0(r4) 40 std r7, 8(r4) 41 li r3, 0 42 blr 43 2: li r3, -EFAULT 44 blr 45 EX_TABLE(1b, 2b) 46 47 /* do_stqcx(unsigned long ea, unsigned long val0, unsigned long val1, 48 unsigned int *crp) */ 49 50 _GLOBAL(do_stqcx) 51 1: PPC_STQCX(4, 0, 3) 52 mfcr r5 53 stw r5, 0(r6) 54 li r3, 0 55 blr 56 2: li r3, -EFAULT 57 blr 58 EX_TABLE(1b, 2b)
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