1 # SPDX-License-Identifier: GPL-2.0 2 menu "Platform support" 3 4 source "arch/powerpc/platforms/powernv/Kconfig" 5 source "arch/powerpc/platforms/pseries/Kconfig" 6 source "arch/powerpc/platforms/chrp/Kconfig" 7 source "arch/powerpc/platforms/512x/Kconfig" 8 source "arch/powerpc/platforms/52xx/Kconfig" 9 source "arch/powerpc/platforms/powermac/Kconfig" 10 source "arch/powerpc/platforms/maple/Kconfig" 11 source "arch/powerpc/platforms/pasemi/Kconfig" 12 source "arch/powerpc/platforms/ps3/Kconfig" 13 source "arch/powerpc/platforms/cell/Kconfig" 14 source "arch/powerpc/platforms/8xx/Kconfig" 15 source "arch/powerpc/platforms/82xx/Kconfig" 16 source "arch/powerpc/platforms/83xx/Kconfig" 17 source "arch/powerpc/platforms/85xx/Kconfig" 18 source "arch/powerpc/platforms/86xx/Kconfig" 19 source "arch/powerpc/platforms/embedded6xx/Kconfig" 20 source "arch/powerpc/platforms/44x/Kconfig" 21 source "arch/powerpc/platforms/amigaone/Kconfig" 22 source "arch/powerpc/platforms/book3s/Kconfig" 23 source "arch/powerpc/platforms/microwatt/Kconfig" 24 25 config KVM_GUEST 26 bool "KVM Guest support" 27 select EPAPR_PARAVIRT 28 help 29 This option enables various optimizations for running under the KVM 30 hypervisor. Overhead for the kernel when not running inside KVM should 31 be minimal. 32 33 In case of doubt, say Y 34 35 config EPAPR_PARAVIRT 36 bool "ePAPR para-virtualization support" 37 help 38 Enables ePAPR para-virtualization support for guests. 39 40 In case of doubt, say Y 41 42 config PPC_HASH_MMU_NATIVE 43 bool 44 depends on PPC_BOOK3S 45 help 46 Support for running natively on the hardware, i.e. without 47 a hypervisor. This option is not user-selectable but should 48 be selected by all platforms that need it. 49 50 config PPC_OF_BOOT_TRAMPOLINE 51 bool "Support booting from Open Firmware or yaboot" 52 depends on PPC_BOOK3S_32 || PPC64 53 select RELOCATABLE if PPC64 54 default y 55 help 56 Support from booting from Open Firmware or yaboot using an 57 Open Firmware client interface. This enables the kernel to 58 communicate with open firmware to retrieve system information 59 such as the device tree. 60 61 In case of doubt, say Y 62 63 config PPC_DT_CPU_FTRS 64 bool "Device-tree based CPU feature discovery & setup" 65 depends on PPC_BOOK3S_64 66 default y 67 help 68 This enables code to use a new device tree binding for describing CPU 69 compatibility and features. Saying Y here will attempt to use the new 70 binding if the firmware provides it. Currently only the skiboot 71 firmware provides this binding. 72 If you're not sure say Y. 73 74 config UDBG_RTAS_CONSOLE 75 bool "RTAS based debug console" 76 depends on PPC_RTAS 77 78 config PPC_SMP_MUXED_IPI 79 bool 80 help 81 Select this option if your platform supports SMP and your 82 interrupt controller provides less than 4 interrupts to each 83 cpu. This will enable the generic code to multiplex the 4 84 messages on to one ipi. 85 86 config IPIC 87 bool 88 89 config MPIC 90 bool 91 92 config MPIC_TIMER 93 bool "MPIC Global Timer" 94 depends on MPIC && FSL_SOC 95 help 96 The MPIC global timer is a hardware timer inside the 97 Freescale PIC complying with OpenPIC standard. When the 98 specified interval times out, the hardware timer generates 99 an interrupt. The driver currently is only tested on fsl 100 chip, but it can potentially support other global timers 101 complying with the OpenPIC standard. 102 103 config FSL_MPIC_TIMER_WAKEUP 104 tristate "Freescale MPIC global timer wakeup driver" 105 depends on FSL_SOC && MPIC_TIMER && PM 106 help 107 The driver provides a way to wake up the system by MPIC 108 timer. 109 e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup" 110 111 config PPC_EPAPR_HV_PIC 112 bool 113 select EPAPR_PARAVIRT 114 115 config MPIC_WEIRD 116 bool 117 118 config MPIC_MSGR 119 bool "MPIC message register support" 120 depends on MPIC 121 help 122 Enables support for the MPIC message registers. These 123 registers are used for inter-processor communication. 124 125 config PPC_I8259 126 bool 127 128 config U3_DART 129 bool 130 depends on PPC64 131 132 config PPC_RTAS 133 bool 134 135 config RTAS_ERROR_LOGGING 136 bool 137 depends on PPC_RTAS 138 139 config PPC_RTAS_DAEMON 140 bool 141 depends on PPC_RTAS 142 143 config RTAS_PROC 144 bool "Proc interface to RTAS" 145 depends on PPC_RTAS && PROC_FS 146 default y 147 148 config RTAS_FLASH 149 tristate "Firmware flash interface" 150 depends on PPC64 && RTAS_PROC 151 152 config MMIO_NVRAM 153 bool 154 155 config MPIC_U3_HT_IRQS 156 bool 157 158 config MPIC_BROKEN_REGREAD 159 bool 160 depends on MPIC 161 help 162 This option enables a MPIC driver workaround for some chips 163 that have a bug that causes some interrupt source information 164 to not read back properly. It is safe to use on other chips as 165 well, but enabling it uses about 8KB of memory to keep copies 166 of the register contents in software. 167 168 config EEH 169 bool 170 depends on (PPC_POWERNV || PPC_PSERIES) && PCI 171 default y 172 173 config PPC_MPC106 174 bool 175 176 config PPC_970_NAP 177 bool 178 179 config PPC_P7_NAP 180 bool 181 182 config PPC_BOOK3S_IDLE 183 def_bool y 184 depends on (PPC_970_NAP || PPC_P7_NAP) 185 186 config PPC_INDIRECT_PIO 187 bool 188 select GENERIC_IOMAP 189 190 config PPC_INDIRECT_MMIO 191 bool 192 193 config PPC_IO_WORKAROUNDS 194 bool 195 196 source "drivers/cpufreq/Kconfig" 197 198 menu "CPUIdle driver" 199 200 source "drivers/cpuidle/Kconfig" 201 202 endmenu 203 204 config TAU 205 bool "On-chip CPU temperature sensor support" 206 depends on PPC_BOOK3S_32 207 help 208 G3 and G4 processors have an on-chip temperature sensor called the 209 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die 210 temperature within 2-4 degrees Celsius. This option shows the current 211 on-die temperature in /proc/cpuinfo if the cpu supports it. 212 213 Unfortunately, this sensor is very inaccurate when uncalibrated, so 214 don't assume the cpu temp is actually what /proc/cpuinfo says it is. 215 216 config TAU_INT 217 bool "Interrupt driven TAU driver (EXPERIMENTAL)" 218 depends on TAU 219 help 220 The TAU supports an interrupt driven mode which causes an interrupt 221 whenever the temperature goes out of range. This is the fastest way 222 to get notified the temp has exceeded a range. With this option off, 223 a timer is used to re-check the temperature periodically. 224 225 If in doubt, say N here. 226 227 config TAU_AVERAGE 228 bool "Average high and low temp" 229 depends on TAU 230 help 231 The TAU hardware can compare the temperature to an upper and lower 232 bound. The default behavior is to show both the upper and lower 233 bound in /proc/cpuinfo. If the range is large, the temperature is 234 either changing a lot, or the TAU hardware is broken (likely on some 235 G4's). If the range is small (around 4 degrees), the temperature is 236 relatively stable. If you say Y here, a single temperature value, 237 halfway between the upper and lower bounds, will be reported in 238 /proc/cpuinfo. 239 240 If in doubt, say N here. 241 242 config QE_GPIO 243 bool "QE GPIO support" 244 depends on QUICC_ENGINE 245 select GPIOLIB 246 select OF_GPIO_MM_GPIOCHIP 247 help 248 Say Y here if you're going to use hardware that connects to the 249 QE GPIOs. 250 251 config CPM2 252 bool "Enable support for the CPM2 (Communications Processor Module)" 253 depends on (FSL_SOC_BOOKE && PPC32) || PPC_82xx 254 select CPM 255 select HAVE_PCI 256 select GPIOLIB 257 select OF_GPIO_MM_GPIOCHIP 258 help 259 The CPM2 (Communications Processor Module) is a coprocessor on 260 embedded CPUs made by Freescale. Selecting this option means that 261 you wish to build a kernel for a machine with a CPM2 coprocessor 262 on it (826x, 827x, 8560). 263 264 config FSL_ULI1575 265 bool "ULI1575 PCIe south bridge support" 266 depends on FSL_SOC_BOOKE || PPC_86xx 267 depends on PCI 268 select FSL_PCI 269 select GENERIC_ISA_DMA 270 help 271 Supports for the ULI1575 PCIe south bridge that exists on some 272 Freescale reference boards. The boards all use the ULI in pretty 273 much the same way. 274 275 config CPM 276 bool 277 select GENERIC_ALLOCATOR 278 279 config OF_RTC 280 bool 281 help 282 Uses information from the OF or flattened device tree to instantiate 283 platform devices for direct mapped RTC chips like the DS1742 or DS1743. 284 285 config GEN_RTC 286 bool "Use the platform RTC operations from user space" 287 select RTC_CLASS 288 select RTC_DRV_GENERIC 289 help 290 This option provides backwards compatibility with the old gen_rtc.ko 291 module that was traditionally used for old PowerPC machines. 292 Platforms should migrate to enabling the RTC_DRV_GENERIC by hand 293 replacing their get_rtc_time/set_rtc_time callbacks with 294 a proper RTC device driver. 295 296 config MCU_MPC8349EMITX 297 bool "MPC8349E-mITX MCU driver" 298 depends on I2C=y && PPC_83xx 299 select GPIOLIB 300 help 301 Say Y here to enable soft power-off functionality on the Freescale 302 boards with the MPC8349E-mITX-compatible MCU chips. This driver will 303 also register MCU GPIOs with the generic GPIO API, so you'll able 304 to use MCU pins as GPIOs. 305 306 endmenu
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.