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Linux/arch/powerpc/platforms/cell/spider-pic.c

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  1 // SPDX-License-Identifier: GPL-2.0-or-later
  2 /*
  3  * External Interrupt Controller on Spider South Bridge
  4  *
  5  * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
  6  *
  7  * Author: Arnd Bergmann <arndb@de.ibm.com>
  8  */
  9 
 10 #include <linux/interrupt.h>
 11 #include <linux/irq.h>
 12 #include <linux/ioport.h>
 13 #include <linux/of_address.h>
 14 #include <linux/of_irq.h>
 15 #include <linux/pgtable.h>
 16 
 17 #include <asm/io.h>
 18 
 19 #include "interrupt.h"
 20 
 21 /* register layout taken from Spider spec, table 7.4-4 */
 22 enum {
 23         TIR_DEN         = 0x004, /* Detection Enable Register */
 24         TIR_MSK         = 0x084, /* Mask Level Register */
 25         TIR_EDC         = 0x0c0, /* Edge Detection Clear Register */
 26         TIR_PNDA        = 0x100, /* Pending Register A */
 27         TIR_PNDB        = 0x104, /* Pending Register B */
 28         TIR_CS          = 0x144, /* Current Status Register */
 29         TIR_LCSA        = 0x150, /* Level Current Status Register A */
 30         TIR_LCSB        = 0x154, /* Level Current Status Register B */
 31         TIR_LCSC        = 0x158, /* Level Current Status Register C */
 32         TIR_LCSD        = 0x15c, /* Level Current Status Register D */
 33         TIR_CFGA        = 0x200, /* Setting Register A0 */
 34         TIR_CFGB        = 0x204, /* Setting Register B0 */
 35                         /* 0x208 ... 0x3ff Setting Register An/Bn */
 36         TIR_PPNDA       = 0x400, /* Packet Pending Register A */
 37         TIR_PPNDB       = 0x404, /* Packet Pending Register B */
 38         TIR_PIERA       = 0x408, /* Packet Output Error Register A */
 39         TIR_PIERB       = 0x40c, /* Packet Output Error Register B */
 40         TIR_PIEN        = 0x444, /* Packet Output Enable Register */
 41         TIR_PIPND       = 0x454, /* Packet Output Pending Register */
 42         TIRDID          = 0x484, /* Spider Device ID Register */
 43         REISTIM         = 0x500, /* Reissue Command Timeout Time Setting */
 44         REISTIMEN       = 0x504, /* Reissue Command Timeout Setting */
 45         REISWAITEN      = 0x508, /* Reissue Wait Control*/
 46 };
 47 
 48 #define SPIDER_CHIP_COUNT       4
 49 #define SPIDER_SRC_COUNT        64
 50 #define SPIDER_IRQ_INVALID      63
 51 
 52 struct spider_pic {
 53         struct irq_domain               *host;
 54         void __iomem            *regs;
 55         unsigned int            node_id;
 56 };
 57 static struct spider_pic spider_pics[SPIDER_CHIP_COUNT];
 58 
 59 static struct spider_pic *spider_irq_data_to_pic(struct irq_data *d)
 60 {
 61         return irq_data_get_irq_chip_data(d);
 62 }
 63 
 64 static void __iomem *spider_get_irq_config(struct spider_pic *pic,
 65                                            unsigned int src)
 66 {
 67         return pic->regs + TIR_CFGA + 8 * src;
 68 }
 69 
 70 static void spider_unmask_irq(struct irq_data *d)
 71 {
 72         struct spider_pic *pic = spider_irq_data_to_pic(d);
 73         void __iomem *cfg = spider_get_irq_config(pic, irqd_to_hwirq(d));
 74 
 75         out_be32(cfg, in_be32(cfg) | 0x30000000u);
 76 }
 77 
 78 static void spider_mask_irq(struct irq_data *d)
 79 {
 80         struct spider_pic *pic = spider_irq_data_to_pic(d);
 81         void __iomem *cfg = spider_get_irq_config(pic, irqd_to_hwirq(d));
 82 
 83         out_be32(cfg, in_be32(cfg) & ~0x30000000u);
 84 }
 85 
 86 static void spider_ack_irq(struct irq_data *d)
 87 {
 88         struct spider_pic *pic = spider_irq_data_to_pic(d);
 89         unsigned int src = irqd_to_hwirq(d);
 90 
 91         /* Reset edge detection logic if necessary
 92          */
 93         if (irqd_is_level_type(d))
 94                 return;
 95 
 96         /* Only interrupts 47 to 50 can be set to edge */
 97         if (src < 47 || src > 50)
 98                 return;
 99 
100         /* Perform the clear of the edge logic */
101         out_be32(pic->regs + TIR_EDC, 0x100 | (src & 0xf));
102 }
103 
104 static int spider_set_irq_type(struct irq_data *d, unsigned int type)
105 {
106         unsigned int sense = type & IRQ_TYPE_SENSE_MASK;
107         struct spider_pic *pic = spider_irq_data_to_pic(d);
108         unsigned int hw = irqd_to_hwirq(d);
109         void __iomem *cfg = spider_get_irq_config(pic, hw);
110         u32 old_mask;
111         u32 ic;
112 
113         /* Note that only level high is supported for most interrupts */
114         if (sense != IRQ_TYPE_NONE && sense != IRQ_TYPE_LEVEL_HIGH &&
115             (hw < 47 || hw > 50))
116                 return -EINVAL;
117 
118         /* Decode sense type */
119         switch(sense) {
120         case IRQ_TYPE_EDGE_RISING:
121                 ic = 0x3;
122                 break;
123         case IRQ_TYPE_EDGE_FALLING:
124                 ic = 0x2;
125                 break;
126         case IRQ_TYPE_LEVEL_LOW:
127                 ic = 0x0;
128                 break;
129         case IRQ_TYPE_LEVEL_HIGH:
130         case IRQ_TYPE_NONE:
131                 ic = 0x1;
132                 break;
133         default:
134                 return -EINVAL;
135         }
136 
137         /* Configure the source. One gross hack that was there before and
138          * that I've kept around is the priority to the BE which I set to
139          * be the same as the interrupt source number. I don't know whether
140          * that's supposed to make any kind of sense however, we'll have to
141          * decide that, but for now, I'm not changing the behaviour.
142          */
143         old_mask = in_be32(cfg) & 0x30000000u;
144         out_be32(cfg, old_mask | (ic << 24) | (0x7 << 16) |
145                  (pic->node_id << 4) | 0xe);
146         out_be32(cfg + 4, (0x2 << 16) | (hw & 0xff));
147 
148         return 0;
149 }
150 
151 static struct irq_chip spider_pic = {
152         .name = "SPIDER",
153         .irq_unmask = spider_unmask_irq,
154         .irq_mask = spider_mask_irq,
155         .irq_ack = spider_ack_irq,
156         .irq_set_type = spider_set_irq_type,
157 };
158 
159 static int spider_host_map(struct irq_domain *h, unsigned int virq,
160                         irq_hw_number_t hw)
161 {
162         irq_set_chip_data(virq, h->host_data);
163         irq_set_chip_and_handler(virq, &spider_pic, handle_level_irq);
164 
165         /* Set default irq type */
166         irq_set_irq_type(virq, IRQ_TYPE_NONE);
167 
168         return 0;
169 }
170 
171 static int spider_host_xlate(struct irq_domain *h, struct device_node *ct,
172                            const u32 *intspec, unsigned int intsize,
173                            irq_hw_number_t *out_hwirq, unsigned int *out_flags)
174 
175 {
176         /* Spider interrupts have 2 cells, first is the interrupt source,
177          * second, well, I don't know for sure yet ... We mask the top bits
178          * because old device-trees encode a node number in there
179          */
180         *out_hwirq = intspec[0] & 0x3f;
181         *out_flags = IRQ_TYPE_LEVEL_HIGH;
182         return 0;
183 }
184 
185 static const struct irq_domain_ops spider_host_ops = {
186         .map = spider_host_map,
187         .xlate = spider_host_xlate,
188 };
189 
190 static void spider_irq_cascade(struct irq_desc *desc)
191 {
192         struct irq_chip *chip = irq_desc_get_chip(desc);
193         struct spider_pic *pic = irq_desc_get_handler_data(desc);
194         unsigned int cs;
195 
196         cs = in_be32(pic->regs + TIR_CS) >> 24;
197         if (cs != SPIDER_IRQ_INVALID)
198                 generic_handle_domain_irq(pic->host, cs);
199 
200         chip->irq_eoi(&desc->irq_data);
201 }
202 
203 /* For hooking up the cascade we have a problem. Our device-tree is
204  * crap and we don't know on which BE iic interrupt we are hooked on at
205  * least not the "standard" way. We can reconstitute it based on two
206  * informations though: which BE node we are connected to and whether
207  * we are connected to IOIF0 or IOIF1. Right now, we really only care
208  * about the IBM cell blade and we know that its firmware gives us an
209  * interrupt-map property which is pretty strange.
210  */
211 static unsigned int __init spider_find_cascade_and_node(struct spider_pic *pic)
212 {
213         unsigned int virq;
214         const u32 *imap, *tmp;
215         int imaplen, intsize, unit;
216         struct device_node *iic;
217         struct device_node *of_node;
218 
219         of_node = irq_domain_get_of_node(pic->host);
220 
221         /* First, we check whether we have a real "interrupts" in the device
222          * tree in case the device-tree is ever fixed
223          */
224         virq = irq_of_parse_and_map(of_node, 0);
225         if (virq)
226                 return virq;
227 
228         /* Now do the horrible hacks */
229         tmp = of_get_property(of_node, "#interrupt-cells", NULL);
230         if (tmp == NULL)
231                 return 0;
232         intsize = *tmp;
233         imap = of_get_property(of_node, "interrupt-map", &imaplen);
234         if (imap == NULL || imaplen < (intsize + 1))
235                 return 0;
236         iic = of_find_node_by_phandle(imap[intsize]);
237         if (iic == NULL)
238                 return 0;
239         imap += intsize + 1;
240         tmp = of_get_property(iic, "#interrupt-cells", NULL);
241         if (tmp == NULL) {
242                 of_node_put(iic);
243                 return 0;
244         }
245         intsize = *tmp;
246         /* Assume unit is last entry of interrupt specifier */
247         unit = imap[intsize - 1];
248         /* Ok, we have a unit, now let's try to get the node */
249         tmp = of_get_property(iic, "ibm,interrupt-server-ranges", NULL);
250         if (tmp == NULL) {
251                 of_node_put(iic);
252                 return 0;
253         }
254         /* ugly as hell but works for now */
255         pic->node_id = (*tmp) >> 1;
256         of_node_put(iic);
257 
258         /* Ok, now let's get cracking. You may ask me why I just didn't match
259          * the iic host from the iic OF node, but that way I'm still compatible
260          * with really really old old firmwares for which we don't have a node
261          */
262         /* Manufacture an IIC interrupt number of class 2 */
263         virq = irq_create_mapping(NULL,
264                                   (pic->node_id << IIC_IRQ_NODE_SHIFT) |
265                                   (2 << IIC_IRQ_CLASS_SHIFT) |
266                                   unit);
267         if (!virq)
268                 printk(KERN_ERR "spider_pic: failed to map cascade !");
269         return virq;
270 }
271 
272 
273 static void __init spider_init_one(struct device_node *of_node, int chip,
274                                    unsigned long addr)
275 {
276         struct spider_pic *pic = &spider_pics[chip];
277         int i, virq;
278 
279         /* Map registers */
280         pic->regs = ioremap(addr, 0x1000);
281         if (pic->regs == NULL)
282                 panic("spider_pic: can't map registers !");
283 
284         /* Allocate a host */
285         pic->host = irq_domain_add_linear(of_node, SPIDER_SRC_COUNT,
286                                           &spider_host_ops, pic);
287         if (pic->host == NULL)
288                 panic("spider_pic: can't allocate irq host !");
289 
290         /* Go through all sources and disable them */
291         for (i = 0; i < SPIDER_SRC_COUNT; i++) {
292                 void __iomem *cfg = pic->regs + TIR_CFGA + 8 * i;
293                 out_be32(cfg, in_be32(cfg) & ~0x30000000u);
294         }
295 
296         /* do not mask any interrupts because of level */
297         out_be32(pic->regs + TIR_MSK, 0x0);
298 
299         /* enable interrupt packets to be output */
300         out_be32(pic->regs + TIR_PIEN, in_be32(pic->regs + TIR_PIEN) | 0x1);
301 
302         /* Hook up the cascade interrupt to the iic and nodeid */
303         virq = spider_find_cascade_and_node(pic);
304         if (!virq)
305                 return;
306         irq_set_handler_data(virq, pic);
307         irq_set_chained_handler(virq, spider_irq_cascade);
308 
309         printk(KERN_INFO "spider_pic: node %d, addr: 0x%lx %pOF\n",
310                pic->node_id, addr, of_node);
311 
312         /* Enable the interrupt detection enable bit. Do this last! */
313         out_be32(pic->regs + TIR_DEN, in_be32(pic->regs + TIR_DEN) | 0x1);
314 }
315 
316 void __init spider_init_IRQ(void)
317 {
318         struct resource r;
319         struct device_node *dn;
320         int chip = 0;
321 
322         /* XXX node numbers are totally bogus. We _hope_ we get the device
323          * nodes in the right order here but that's definitely not guaranteed,
324          * we need to get the node from the device tree instead.
325          * There is currently no proper property for it (but our whole
326          * device-tree is bogus anyway) so all we can do is pray or maybe test
327          * the address and deduce the node-id
328          */
329         for_each_node_by_name(dn, "interrupt-controller") {
330                 if (of_device_is_compatible(dn, "CBEA,platform-spider-pic")) {
331                         if (of_address_to_resource(dn, 0, &r)) {
332                                 printk(KERN_WARNING "spider-pic: Failed\n");
333                                 continue;
334                         }
335                 } else if (of_device_is_compatible(dn, "sti,platform-spider-pic")
336                            && (chip < 2)) {
337                         static long hard_coded_pics[] =
338                                 { 0x24000008000ul, 0x34000008000ul};
339                         r.start = hard_coded_pics[chip];
340                 } else
341                         continue;
342                 spider_init_one(dn, chip++, r.start);
343         }
344 }
345 

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