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Linux/arch/powerpc/sysdev/xics/icp-native.c

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  1 // SPDX-License-Identifier: GPL-2.0-or-later
  2 /*
  3  * Copyright 2011 IBM Corporation.
  4  */
  5 
  6 #include <linux/types.h>
  7 #include <linux/kernel.h>
  8 #include <linux/irq.h>
  9 #include <linux/irqdomain.h>
 10 #include <linux/smp.h>
 11 #include <linux/interrupt.h>
 12 #include <linux/init.h>
 13 #include <linux/cpu.h>
 14 #include <linux/of.h>
 15 #include <linux/of_address.h>
 16 #include <linux/spinlock.h>
 17 #include <linux/module.h>
 18 
 19 #include <asm/io.h>
 20 #include <asm/smp.h>
 21 #include <asm/irq.h>
 22 #include <asm/errno.h>
 23 #include <asm/xics.h>
 24 #include <asm/kvm_ppc.h>
 25 #include <asm/dbell.h>
 26 
 27 struct icp_ipl {
 28         union {
 29                 u32 word;
 30                 u8 bytes[4];
 31         } xirr_poll;
 32         union {
 33                 u32 word;
 34                 u8 bytes[4];
 35         } xirr;
 36         u32 dummy;
 37         union {
 38                 u32 word;
 39                 u8 bytes[4];
 40         } qirr;
 41         u32 link_a;
 42         u32 link_b;
 43         u32 link_c;
 44 };
 45 
 46 static struct icp_ipl __iomem *icp_native_regs[NR_CPUS];
 47 
 48 static inline unsigned int icp_native_get_xirr(void)
 49 {
 50         int cpu = smp_processor_id();
 51         unsigned int xirr;
 52 
 53         /* Handled an interrupt latched by KVM */
 54         xirr = kvmppc_get_xics_latch();
 55         if (xirr)
 56                 return xirr;
 57 
 58         return in_be32(&icp_native_regs[cpu]->xirr.word);
 59 }
 60 
 61 static inline void icp_native_set_xirr(unsigned int value)
 62 {
 63         int cpu = smp_processor_id();
 64 
 65         out_be32(&icp_native_regs[cpu]->xirr.word, value);
 66 }
 67 
 68 static inline void icp_native_set_cppr(u8 value)
 69 {
 70         int cpu = smp_processor_id();
 71 
 72         out_8(&icp_native_regs[cpu]->xirr.bytes[0], value);
 73 }
 74 
 75 static inline void icp_native_set_qirr(int n_cpu, u8 value)
 76 {
 77         out_8(&icp_native_regs[n_cpu]->qirr.bytes[0], value);
 78 }
 79 
 80 static void icp_native_set_cpu_priority(unsigned char cppr)
 81 {
 82         xics_set_base_cppr(cppr);
 83         icp_native_set_cppr(cppr);
 84         iosync();
 85 }
 86 
 87 void icp_native_eoi(struct irq_data *d)
 88 {
 89         unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
 90 
 91         iosync();
 92         icp_native_set_xirr((xics_pop_cppr() << 24) | hw_irq);
 93 }
 94 
 95 static void icp_native_teardown_cpu(void)
 96 {
 97         int cpu = smp_processor_id();
 98 
 99         /* Clear any pending IPI */
100         icp_native_set_qirr(cpu, 0xff);
101 }
102 
103 static void icp_native_flush_ipi(void)
104 {
105         /* We take the ipi irq but and never return so we
106          * need to EOI the IPI, but want to leave our priority 0
107          *
108          * should we check all the other interrupts too?
109          * should we be flagging idle loop instead?
110          * or creating some task to be scheduled?
111          */
112 
113         icp_native_set_xirr((0x00 << 24) | XICS_IPI);
114 }
115 
116 static unsigned int icp_native_get_irq(void)
117 {
118         unsigned int xirr = icp_native_get_xirr();
119         unsigned int vec = xirr & 0x00ffffff;
120         unsigned int irq;
121 
122         if (vec == XICS_IRQ_SPURIOUS)
123                 return 0;
124 
125         irq = irq_find_mapping(xics_host, vec);
126         if (likely(irq)) {
127                 xics_push_cppr(vec);
128                 return irq;
129         }
130 
131         /* We don't have a linux mapping, so have rtas mask it. */
132         xics_mask_unknown_vec(vec);
133 
134         /* We might learn about it later, so EOI it */
135         icp_native_set_xirr(xirr);
136 
137         return 0;
138 }
139 
140 #ifdef CONFIG_SMP
141 
142 static void icp_native_cause_ipi(int cpu)
143 {
144         kvmppc_set_host_ipi(cpu);
145         icp_native_set_qirr(cpu, IPI_PRIORITY);
146 }
147 
148 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
149 void icp_native_cause_ipi_rm(int cpu)
150 {
151         /*
152          * Currently not used to send IPIs to another CPU
153          * on the same core. Only caller is KVM real mode.
154          * Need the physical address of the XICS to be
155          * previously saved in kvm_hstate in the paca.
156          */
157         void __iomem *xics_phys;
158 
159         /*
160          * Just like the cause_ipi functions, it is required to
161          * include a full barrier before causing the IPI.
162          */
163         xics_phys = paca_ptrs[cpu]->kvm_hstate.xics_phys;
164         mb();
165         __raw_rm_writeb(IPI_PRIORITY, xics_phys + XICS_MFRR);
166 }
167 #endif
168 
169 /*
170  * Called when an interrupt is received on an off-line CPU to
171  * clear the interrupt, so that the CPU can go back to nap mode.
172  */
173 void icp_native_flush_interrupt(void)
174 {
175         unsigned int xirr = icp_native_get_xirr();
176         unsigned int vec = xirr & 0x00ffffff;
177 
178         if (vec == XICS_IRQ_SPURIOUS)
179                 return;
180         if (vec == XICS_IPI) {
181                 /* Clear pending IPI */
182                 int cpu = smp_processor_id();
183                 kvmppc_clear_host_ipi(cpu);
184                 icp_native_set_qirr(cpu, 0xff);
185         } else {
186                 pr_err("XICS: hw interrupt 0x%x to offline cpu, disabling\n",
187                        vec);
188                 xics_mask_unknown_vec(vec);
189         }
190         /* EOI the interrupt */
191         icp_native_set_xirr(xirr);
192 }
193 
194 void xics_wake_cpu(int cpu)
195 {
196         icp_native_set_qirr(cpu, IPI_PRIORITY);
197 }
198 EXPORT_SYMBOL_GPL(xics_wake_cpu);
199 
200 static irqreturn_t icp_native_ipi_action(int irq, void *dev_id)
201 {
202         int cpu = smp_processor_id();
203 
204         kvmppc_clear_host_ipi(cpu);
205         icp_native_set_qirr(cpu, 0xff);
206 
207         return smp_ipi_demux();
208 }
209 
210 #endif /* CONFIG_SMP */
211 
212 static int __init icp_native_map_one_cpu(int hw_id, unsigned long addr,
213                                          unsigned long size)
214 {
215         char *rname;
216         int i, cpu = -1;
217 
218         /* This may look gross but it's good enough for now, we don't quite
219          * have a hard -> linux processor id matching.
220          */
221         for_each_possible_cpu(i) {
222                 if (!cpu_present(i))
223                         continue;
224                 if (hw_id == get_hard_smp_processor_id(i)) {
225                         cpu = i;
226                         break;
227                 }
228         }
229 
230         /* Fail, skip that CPU. Don't print, it's normal, some XICS come up
231          * with way more entries in there than you have CPUs
232          */
233         if (cpu == -1)
234                 return 0;
235 
236         rname = kasprintf(GFP_KERNEL, "CPU %d [0x%x] Interrupt Presentation",
237                           cpu, hw_id);
238 
239         if (!rname)
240                 return -ENOMEM;
241         if (!request_mem_region(addr, size, rname)) {
242                 pr_warn("icp_native: Could not reserve ICP MMIO for CPU %d, interrupt server #0x%x\n",
243                         cpu, hw_id);
244                 return -EBUSY;
245         }
246 
247         icp_native_regs[cpu] = ioremap(addr, size);
248         kvmppc_set_xics_phys(cpu, addr);
249         if (!icp_native_regs[cpu]) {
250                 pr_warn("icp_native: Failed ioremap for CPU %d, interrupt server #0x%x, addr %#lx\n",
251                         cpu, hw_id, addr);
252                 release_mem_region(addr, size);
253                 return -ENOMEM;
254         }
255         return 0;
256 }
257 
258 static int __init icp_native_init_one_node(struct device_node *np,
259                                            unsigned int *indx)
260 {
261         unsigned int ilen;
262         const __be32 *ireg;
263         int i;
264         int num_reg;
265         int num_servers = 0;
266 
267         /* This code does the theorically broken assumption that the interrupt
268          * server numbers are the same as the hard CPU numbers.
269          * This happens to be the case so far but we are playing with fire...
270          * should be fixed one of these days. -BenH.
271          */
272         ireg = of_get_property(np, "ibm,interrupt-server-ranges", &ilen);
273 
274         /* Do that ever happen ? we'll know soon enough... but even good'old
275          * f80 does have that property ..
276          */
277         WARN_ON((ireg == NULL) || (ilen != 2*sizeof(u32)));
278 
279         if (ireg) {
280                 *indx = of_read_number(ireg, 1);
281                 if (ilen >= 2*sizeof(u32))
282                         num_servers = of_read_number(ireg + 1, 1);
283         }
284 
285         num_reg = of_address_count(np);
286         if (num_servers && (num_servers != num_reg)) {
287                 pr_err("icp_native: ICP reg len (%d) != num servers (%d)",
288                        num_reg, num_servers);
289                 return -1;
290         }
291 
292         for (i = 0; i < num_reg; i++) {
293                 struct resource r;
294                 int err;
295 
296                 err = of_address_to_resource(np, i, &r);
297                 if (err) {
298                         pr_err("icp_native: Could not translate ICP MMIO"
299                                " for interrupt server 0x%x (%d)\n", *indx, err);
300                         return -1;
301                 }
302 
303                 if (icp_native_map_one_cpu(*indx, r.start, resource_size(&r)))
304                         return -1;
305 
306                 (*indx)++;
307         }
308         return 0;
309 }
310 
311 static const struct icp_ops icp_native_ops = {
312         .get_irq        = icp_native_get_irq,
313         .eoi            = icp_native_eoi,
314         .set_priority   = icp_native_set_cpu_priority,
315         .teardown_cpu   = icp_native_teardown_cpu,
316         .flush_ipi      = icp_native_flush_ipi,
317 #ifdef CONFIG_SMP
318         .ipi_action     = icp_native_ipi_action,
319         .cause_ipi      = icp_native_cause_ipi,
320 #endif
321 };
322 
323 int __init icp_native_init(void)
324 {
325         struct device_node *np;
326         u32 indx = 0;
327         int found = 0;
328 
329         for_each_compatible_node(np, NULL, "ibm,ppc-xicp")
330                 if (icp_native_init_one_node(np, &indx) == 0)
331                         found = 1;
332         if (!found) {
333                 for_each_node_by_type(np,
334                         "PowerPC-External-Interrupt-Presentation") {
335                                 if (icp_native_init_one_node(np, &indx) == 0)
336                                         found = 1;
337                 }
338         }
339 
340         if (found == 0)
341                 return -ENODEV;
342 
343         icp_ops = &icp_native_ops;
344 
345         return 0;
346 }
347 

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