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Linux/arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dts

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  1 // SPDX-License-Identifier: GPL-2.0
  2 /*
  3  * Original all-in-one devicetree:
  4  * Copyright (C) 2021-2022 - Wolfgang Grandegger <wg@aries-embedded.de>
  5  * Rewritten to use includes:
  6  * Copyright (C) 2022 - Conor Dooley <conor.dooley@microchip.com>
  7  */
  8 /dts-v1/;
  9 
 10 #include "mpfs.dtsi"
 11 #include "mpfs-m100pfs-fabric.dtsi"
 12 
 13 / {
 14         model = "Aries Embedded M100PFEVPS";
 15         compatible = "aries,m100pfsevp", "microchip,mpfs";
 16 
 17         aliases {
 18                 ethernet0 = &mac0;
 19                 ethernet1 = &mac1;
 20                 serial0 = &mmuart0;
 21                 serial1 = &mmuart1;
 22                 serial2 = &mmuart2;
 23                 serial3 = &mmuart3;
 24                 serial4 = &mmuart4;
 25                 gpio0 = &gpio0;
 26                 gpio1 = &gpio2;
 27         };
 28 
 29         chosen {
 30                 stdout-path = "serial1:115200n8";
 31         };
 32 
 33         ddrc_cache_lo: memory@80000000 {
 34                 device_type = "memory";
 35                 reg = <0x0 0x80000000 0x0 0x40000000>;
 36         };
 37         ddrc_cache_hi: memory@1040000000 {
 38                 device_type = "memory";
 39                 reg = <0x10 0x40000000 0x0 0x40000000>;
 40         };
 41 };
 42 
 43 &can0 {
 44         status = "okay";
 45 };
 46 
 47 &i2c0 {
 48         status = "okay";
 49 };
 50 
 51 &i2c1 {
 52         status = "okay";
 53 };
 54 
 55 &gpio0 {
 56         interrupts = <13>, <14>, <15>, <16>,
 57                      <17>, <18>, <19>, <20>,
 58                      <21>, <22>, <23>, <24>,
 59                      <25>, <26>;
 60         ngpios = <14>;
 61         status = "okay";
 62 
 63         pmic-irq-hog {
 64                 gpio-hog;
 65                 gpios = <13 0>;
 66                 input;
 67         };
 68 
 69         /* Set to low for eMMC, high for SD-card */
 70         mmc-sel-hog {
 71                 gpio-hog;
 72                 gpios = <12 0>;
 73                 output-high;
 74         };
 75 };
 76 
 77 &gpio2 {
 78         interrupts = <13>, <14>, <15>, <16>,
 79                      <17>, <18>, <19>, <20>,
 80                      <21>, <22>, <23>, <24>,
 81                      <25>, <26>, <27>, <28>,
 82                      <29>, <30>, <31>, <32>,
 83                      <33>, <34>, <35>, <36>,
 84                      <37>, <38>, <39>, <40>,
 85                      <41>, <42>, <43>, <44>;
 86         status = "okay";
 87 };
 88 
 89 &mac0 {
 90         status = "okay";
 91         phy-mode = "gmii";
 92         phy-handle = <&phy0>;
 93         phy0: ethernet-phy@0 {
 94                 reg = <0>;
 95         };
 96 };
 97 
 98 &mac1 {
 99         status = "okay";
100         phy-mode = "gmii";
101         phy-handle = <&phy1>;
102         phy1: ethernet-phy@0 {
103                 reg = <0>;
104         };
105 };
106 
107 &mbox {
108         status = "okay";
109 };
110 
111 &mmc {
112         max-frequency = <50000000>;
113         bus-width = <4>;
114         cap-mmc-highspeed;
115         cap-sd-highspeed;
116         no-1-8-v;
117         sd-uhs-sdr12;
118         sd-uhs-sdr25;
119         sd-uhs-sdr50;
120         sd-uhs-sdr104;
121         disable-wp;
122         status = "okay";
123 };
124 
125 &mmuart1 {
126         status = "okay";
127 };
128 
129 &mmuart2 {
130         status = "okay";
131 };
132 
133 &mmuart3 {
134         status = "okay";
135 };
136 
137 &mmuart4 {
138         status = "okay";
139 };
140 
141 &pcie {
142         status = "okay";
143 };
144 
145 &qspi {
146         status = "okay";
147 };
148 
149 &refclk {
150         clock-frequency = <125000000>;
151 };
152 
153 &rtc {
154         status = "okay";
155 };
156 
157 &spi0 {
158         status = "okay";
159 };
160 
161 &spi1 {
162         status = "okay";
163 };
164 
165 &syscontroller {
166         status = "okay";
167 };
168 
169 &usb {
170         status = "okay";
171         dr_mode = "host";
172 };

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