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Linux/arch/riscv/include/uapi/asm/perf_regs.h

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  1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
  2 /* Copyright (C) 2019 Hangzhou C-SKY Microsystems co.,ltd. */
  3 
  4 #ifndef _ASM_RISCV_PERF_REGS_H
  5 #define _ASM_RISCV_PERF_REGS_H
  6 
  7 enum perf_event_riscv_regs {
  8         PERF_REG_RISCV_PC,
  9         PERF_REG_RISCV_RA,
 10         PERF_REG_RISCV_SP,
 11         PERF_REG_RISCV_GP,
 12         PERF_REG_RISCV_TP,
 13         PERF_REG_RISCV_T0,
 14         PERF_REG_RISCV_T1,
 15         PERF_REG_RISCV_T2,
 16         PERF_REG_RISCV_S0,
 17         PERF_REG_RISCV_S1,
 18         PERF_REG_RISCV_A0,
 19         PERF_REG_RISCV_A1,
 20         PERF_REG_RISCV_A2,
 21         PERF_REG_RISCV_A3,
 22         PERF_REG_RISCV_A4,
 23         PERF_REG_RISCV_A5,
 24         PERF_REG_RISCV_A6,
 25         PERF_REG_RISCV_A7,
 26         PERF_REG_RISCV_S2,
 27         PERF_REG_RISCV_S3,
 28         PERF_REG_RISCV_S4,
 29         PERF_REG_RISCV_S5,
 30         PERF_REG_RISCV_S6,
 31         PERF_REG_RISCV_S7,
 32         PERF_REG_RISCV_S8,
 33         PERF_REG_RISCV_S9,
 34         PERF_REG_RISCV_S10,
 35         PERF_REG_RISCV_S11,
 36         PERF_REG_RISCV_T3,
 37         PERF_REG_RISCV_T4,
 38         PERF_REG_RISCV_T5,
 39         PERF_REG_RISCV_T6,
 40         PERF_REG_RISCV_MAX,
 41 };
 42 #endif /* _ASM_RISCV_PERF_REGS_H */
 43 

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