1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * CPU-measurement facilities
4 *
5 * Copyright IBM Corp. 2012, 2018
6 * Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
7 * Jan Glauber <jang@linux.vnet.ibm.com>
8 */
9 #ifndef _ASM_S390_CPU_MF_H
10 #define _ASM_S390_CPU_MF_H
11
12 #include <linux/errno.h>
13 #include <linux/kmsan-checks.h>
14 #include <asm/asm-extable.h>
15 #include <asm/facility.h>
16
17 asm(".include \"asm/cpu_mf-insn.h\"\n");
18
19 #define CPU_MF_INT_SF_IAE (1 << 31) /* invalid entry address */
20 #define CPU_MF_INT_SF_ISE (1 << 30) /* incorrect SDBT entry */
21 #define CPU_MF_INT_SF_PRA (1 << 29) /* program request alert */
22 #define CPU_MF_INT_SF_SACA (1 << 23) /* sampler auth. change alert */
23 #define CPU_MF_INT_SF_LSDA (1 << 22) /* loss of sample data alert */
24 #define CPU_MF_INT_CF_MTDA (1 << 15) /* loss of MT ctr. data alert */
25 #define CPU_MF_INT_CF_CACA (1 << 7) /* counter auth. change alert */
26 #define CPU_MF_INT_CF_LCDA (1 << 6) /* loss of counter data alert */
27 #define CPU_MF_INT_CF_MASK (CPU_MF_INT_CF_MTDA|CPU_MF_INT_CF_CACA| \
28 CPU_MF_INT_CF_LCDA)
29 #define CPU_MF_INT_SF_MASK (CPU_MF_INT_SF_IAE|CPU_MF_INT_SF_ISE| \
30 CPU_MF_INT_SF_PRA|CPU_MF_INT_SF_SACA| \
31 CPU_MF_INT_SF_LSDA)
32
33 #define CPU_MF_SF_RIBM_NOTAV 0x1 /* Sampling unavailable */
34
35 /* CPU measurement facility support */
36 static inline int cpum_cf_avail(void)
37 {
38 return test_facility(40) && test_facility(67);
39 }
40
41 static inline int cpum_sf_avail(void)
42 {
43 return test_facility(40) && test_facility(68);
44 }
45
46 struct cpumf_ctr_info {
47 u16 cfvn;
48 u16 auth_ctl;
49 u16 enable_ctl;
50 u16 act_ctl;
51 u16 max_cpu;
52 u16 csvn;
53 u16 max_cg;
54 u16 reserved1;
55 u32 reserved2[12];
56 } __packed;
57
58 /* QUERY SAMPLING INFORMATION block */
59 struct hws_qsi_info_block { /* Bit(s) */
60 unsigned int b0_13:14; /* 0-13: zeros */
61 unsigned int as:1; /* 14: basic-sampling authorization */
62 unsigned int ad:1; /* 15: diag-sampling authorization */
63 unsigned int b16_21:6; /* 16-21: zeros */
64 unsigned int es:1; /* 22: basic-sampling enable control */
65 unsigned int ed:1; /* 23: diag-sampling enable control */
66 unsigned int b24_29:6; /* 24-29: zeros */
67 unsigned int cs:1; /* 30: basic-sampling activation control */
68 unsigned int cd:1; /* 31: diag-sampling activation control */
69 unsigned int bsdes:16; /* 4-5: size of basic sampling entry */
70 unsigned int dsdes:16; /* 6-7: size of diagnostic sampling entry */
71 unsigned long min_sampl_rate; /* 8-15: minimum sampling interval */
72 unsigned long max_sampl_rate; /* 16-23: maximum sampling interval*/
73 unsigned long tear; /* 24-31: TEAR contents */
74 unsigned long dear; /* 32-39: DEAR contents */
75 unsigned int rsvrd0:24; /* 40-42: reserved */
76 unsigned int ribm:8; /* 43: Reserved by IBM */
77 unsigned int cpu_speed; /* 44-47: CPU speed */
78 unsigned long long rsvrd1; /* 48-55: reserved */
79 unsigned long long rsvrd2; /* 56-63: reserved */
80 } __packed;
81
82 /* SET SAMPLING CONTROLS request block */
83 struct hws_lsctl_request_block {
84 unsigned int s:1; /* 0: maximum buffer indicator */
85 unsigned int h:1; /* 1: part. level reserved for VM use*/
86 unsigned long long b2_53:52;/* 2-53: zeros */
87 unsigned int es:1; /* 54: basic-sampling enable control */
88 unsigned int ed:1; /* 55: diag-sampling enable control */
89 unsigned int b56_61:6; /* 56-61: - zeros */
90 unsigned int cs:1; /* 62: basic-sampling activation control */
91 unsigned int cd:1; /* 63: diag-sampling activation control */
92 unsigned long interval; /* 8-15: sampling interval */
93 unsigned long tear; /* 16-23: TEAR contents */
94 unsigned long dear; /* 24-31: DEAR contents */
95 /* 32-63: */
96 unsigned long rsvrd1; /* reserved */
97 unsigned long rsvrd2; /* reserved */
98 unsigned long rsvrd3; /* reserved */
99 unsigned long rsvrd4; /* reserved */
100 } __packed;
101
102 struct hws_basic_entry {
103 unsigned int def:16; /* 0-15 Data Entry Format */
104 unsigned int R:4; /* 16-19 reserved */
105 unsigned int U:4; /* 20-23 Number of unique instruct. */
106 unsigned int z:2; /* zeros */
107 unsigned int T:1; /* 26 PSW DAT mode */
108 unsigned int W:1; /* 27 PSW wait state */
109 unsigned int P:1; /* 28 PSW Problem state */
110 unsigned int AS:2; /* 29-30 PSW address-space control */
111 unsigned int I:1; /* 31 entry valid or invalid */
112 unsigned int CL:2; /* 32-33 Configuration Level */
113 unsigned int H:1; /* 34 Host Indicator */
114 unsigned int LS:1; /* 35 Limited Sampling */
115 unsigned int:12;
116 unsigned int prim_asn:16; /* primary ASN */
117 unsigned long long ia; /* Instruction Address */
118 unsigned long long gpp; /* Guest Program Parameter */
119 unsigned long long hpp; /* Host Program Parameter */
120 } __packed;
121
122 struct hws_diag_entry {
123 unsigned int def:16; /* 0-15 Data Entry Format */
124 unsigned int R:15; /* 16-19 and 20-30 reserved */
125 unsigned int I:1; /* 31 entry valid or invalid */
126 u8 data[]; /* Machine-dependent sample data */
127 } __packed;
128
129 struct hws_combined_entry {
130 struct hws_basic_entry basic; /* Basic-sampling data entry */
131 struct hws_diag_entry diag; /* Diagnostic-sampling data entry */
132 } __packed;
133
134 union hws_trailer_header {
135 struct {
136 unsigned int f:1; /* 0 - Block Full Indicator */
137 unsigned int a:1; /* 1 - Alert request control */
138 unsigned int t:1; /* 2 - Timestamp format */
139 unsigned int :29; /* 3 - 31: Reserved */
140 unsigned int bsdes:16; /* 32-47: size of basic SDE */
141 unsigned int dsdes:16; /* 48-63: size of diagnostic SDE */
142 unsigned long long overflow; /* 64 - Overflow Count */
143 };
144 u128 val;
145 };
146
147 struct hws_trailer_entry {
148 union hws_trailer_header header; /* 0 - 15 Flags + Overflow Count */
149 unsigned char timestamp[16]; /* 16 - 31 timestamp */
150 unsigned long long reserved1; /* 32 -Reserved */
151 unsigned long long reserved2; /* */
152 union { /* 48 - reserved for programming use */
153 struct {
154 unsigned int clock_base:1; /* in progusage2 */
155 unsigned long long progusage1:63;
156 unsigned long long progusage2;
157 };
158 unsigned long long progusage[2];
159 };
160 } __packed;
161
162 /* Load program parameter */
163 static inline void lpp(void *pp)
164 {
165 asm volatile("lpp 0(%0)\n" :: "a" (pp) : "memory");
166 }
167
168 /* Query counter information */
169 static inline int qctri(struct cpumf_ctr_info *info)
170 {
171 int rc = -EINVAL;
172
173 asm volatile (
174 "0: qctri %1\n"
175 "1: lhi %0,0\n"
176 "2:\n"
177 EX_TABLE(1b, 2b)
178 : "+d" (rc), "=Q" (*info));
179 return rc;
180 }
181
182 /* Load CPU-counter-set controls */
183 static inline int lcctl(u64 ctl)
184 {
185 int cc;
186
187 asm volatile (
188 " lcctl %1\n"
189 " ipm %0\n"
190 " srl %0,28\n"
191 : "=d" (cc) : "Q" (ctl) : "cc");
192 return cc;
193 }
194
195 /* Extract CPU counter */
196 static inline int __ecctr(u64 ctr, u64 *content)
197 {
198 u64 _content;
199 int cc;
200
201 asm volatile (
202 " ecctr %0,%2\n"
203 " ipm %1\n"
204 " srl %1,28\n"
205 : "=d" (_content), "=d" (cc) : "d" (ctr) : "cc");
206 *content = _content;
207 return cc;
208 }
209
210 /* Extract CPU counter */
211 static inline int ecctr(u64 ctr, u64 *val)
212 {
213 u64 content;
214 int cc;
215
216 cc = __ecctr(ctr, &content);
217 if (!cc)
218 *val = content;
219 return cc;
220 }
221
222 /* Store CPU counter multiple for a particular counter set */
223 enum stcctm_ctr_set {
224 EXTENDED = 0,
225 BASIC = 1,
226 PROBLEM_STATE = 2,
227 CRYPTO_ACTIVITY = 3,
228 MT_DIAG = 5,
229 MT_DIAG_CLEARING = 9, /* clears loss-of-MT-ctr-data alert */
230 };
231
232 static __always_inline int stcctm(enum stcctm_ctr_set set, u64 range, u64 *dest)
233 {
234 int cc;
235
236 asm volatile (
237 " STCCTM %2,%3,%1\n"
238 " ipm %0\n"
239 " srl %0,28\n"
240 : "=d" (cc)
241 : "Q" (*dest), "d" (range), "i" (set)
242 : "cc", "memory");
243 /*
244 * If cc == 2, less than RANGE counters are stored, but it's not easy
245 * to tell how many. Always unpoison the whole range for simplicity.
246 */
247 kmsan_unpoison_memory(dest, range * sizeof(u64));
248 return cc;
249 }
250
251 /* Query sampling information */
252 static inline int qsi(struct hws_qsi_info_block *info)
253 {
254 int cc = 1;
255
256 asm volatile(
257 "0: qsi %1\n"
258 "1: lhi %0,0\n"
259 "2:\n"
260 EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
261 : "+d" (cc), "+Q" (*info));
262 return cc ? -EINVAL : 0;
263 }
264
265 /* Load sampling controls */
266 static inline int lsctl(struct hws_lsctl_request_block *req)
267 {
268 int cc;
269
270 cc = 1;
271 asm volatile(
272 "0: lsctl 0(%1)\n"
273 "1: ipm %0\n"
274 " srl %0,28\n"
275 "2:\n"
276 EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
277 : "+d" (cc), "+a" (req)
278 : "m" (*req)
279 : "cc", "memory");
280
281 return cc ? -EINVAL : 0;
282 }
283 #endif /* _ASM_S390_CPU_MF_H */
284
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