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Linux/arch/sh/include/asm/entry-macros.S

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  1 ! SPDX-License-Identifier: GPL-2.0
  2 ! entry.S macro define
  3         
  4         .macro  cli
  5         stc     sr, r0
  6         or      #0xf0, r0
  7         ldc     r0, sr
  8         .endm
  9 
 10         .macro  sti
 11         mov     #0xfffffff0, r11
 12         extu.b  r11, r11
 13         not     r11, r11
 14         stc     sr, r10
 15         and     r11, r10
 16 #ifdef CONFIG_CPU_HAS_SR_RB
 17         stc     k_g_imask, r11
 18         or      r11, r10
 19 #endif
 20         ldc     r10, sr
 21         .endm
 22 
 23         .macro  get_current_thread_info, ti, tmp
 24 #ifdef CONFIG_CPU_HAS_SR_RB
 25         stc     r7_bank, \ti
 26 #else
 27         mov     #((THREAD_SIZE - 1) >> 10) ^ 0xff, \tmp
 28         shll8   \tmp
 29         shll2   \tmp
 30         mov     r15, \ti
 31         and     \tmp, \ti
 32 #endif  
 33         .endm
 34 
 35 #ifdef CONFIG_TRACE_IRQFLAGS
 36 
 37         .macro  TRACE_IRQS_ON
 38         mov.l   r0, @-r15
 39         mov.l   r1, @-r15
 40         mov.l   r2, @-r15
 41         mov.l   r3, @-r15
 42         mov.l   r4, @-r15
 43         mov.l   r5, @-r15
 44         mov.l   r6, @-r15
 45         mov.l   r7, @-r15
 46 
 47         mov.l   7834f, r0
 48         jsr     @r0
 49          nop
 50 
 51         mov.l   @r15+, r7
 52         mov.l   @r15+, r6
 53         mov.l   @r15+, r5
 54         mov.l   @r15+, r4
 55         mov.l   @r15+, r3
 56         mov.l   @r15+, r2
 57         mov.l   @r15+, r1
 58         mov.l   @r15+, r0
 59         mov.l   7834f, r0
 60 
 61         bra     7835f
 62          nop
 63         .balign 4
 64 7834:   .long   trace_hardirqs_on
 65 7835:
 66         .endm
 67         .macro  TRACE_IRQS_OFF
 68 
 69         mov.l   r0, @-r15
 70         mov.l   r1, @-r15
 71         mov.l   r2, @-r15
 72         mov.l   r3, @-r15
 73         mov.l   r4, @-r15
 74         mov.l   r5, @-r15
 75         mov.l   r6, @-r15
 76         mov.l   r7, @-r15
 77 
 78         mov.l   7834f, r0
 79         jsr     @r0
 80          nop
 81 
 82         mov.l   @r15+, r7
 83         mov.l   @r15+, r6
 84         mov.l   @r15+, r5
 85         mov.l   @r15+, r4
 86         mov.l   @r15+, r3
 87         mov.l   @r15+, r2
 88         mov.l   @r15+, r1
 89         mov.l   @r15+, r0
 90         mov.l   7834f, r0
 91 
 92         bra     7835f
 93          nop
 94         .balign 4
 95 7834:   .long   trace_hardirqs_off
 96 7835:
 97         .endm
 98 
 99 #else
100         .macro  TRACE_IRQS_ON
101         .endm
102 
103         .macro  TRACE_IRQS_OFF
104         .endm
105 #endif
106 
107 #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4)
108 # define PREF(x)        pref    @x
109 #else
110 # define PREF(x)        nop
111 #endif
112 
113         /*
114          * Macro for use within assembly. Because the DWARF unwinder
115          * needs to use the frame register to unwind the stack, we
116          * need to setup r14 with the value of the stack pointer as
117          * the return address is usually on the stack somewhere.
118          */
119         .macro  setup_frame_reg
120 #ifdef CONFIG_DWARF_UNWINDER
121         mov     r15, r14
122 #endif
123         .endm

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