1 /* SPDX-License-Identifier: GPL-2.0 */
2
3 /*
4 * This file contains definitions from Hyper-V Hypervisor Top-Level Functional
5 * Specification (TLFS):
6 * https://docs.microsoft.com/en-us/virtualization/hyper-v-on-windows/reference/tlfs
7 */
8
9 #ifndef _ASM_GENERIC_HYPERV_TLFS_H
10 #define _ASM_GENERIC_HYPERV_TLFS_H
11
12 #include <linux/types.h>
13 #include <linux/bits.h>
14 #include <linux/time64.h>
15
16 /*
17 * While not explicitly listed in the TLFS, Hyper-V always runs with a page size
18 * of 4096. These definitions are used when communicating with Hyper-V using
19 * guest physical pages and guest physical page addresses, since the guest page
20 * size may not be 4096 on all architectures.
21 */
22 #define HV_HYP_PAGE_SHIFT 12
23 #define HV_HYP_PAGE_SIZE BIT(HV_HYP_PAGE_SHIFT)
24 #define HV_HYP_PAGE_MASK (~(HV_HYP_PAGE_SIZE - 1))
25
26 /*
27 * Hyper-V provides two categories of flags relevant to guest VMs. The
28 * "Features" category indicates specific functionality that is available
29 * to guests on this particular instance of Hyper-V. The "Features"
30 * are presented in four groups, each of which is 32 bits. The group A
31 * and B definitions are common across architectures and are listed here.
32 * However, not all flags are relevant on all architectures.
33 *
34 * Groups C and D vary across architectures and are listed in the
35 * architecture specific portion of hyperv-tlfs.h. Some of these flags exist
36 * on multiple architectures, but the bit positions are different so they
37 * cannot appear in the generic portion of hyperv-tlfs.h.
38 *
39 * The "Enlightenments" category provides recommendations on whether to use
40 * specific enlightenments that are available. The Enlighenments are a single
41 * group of 32 bits, but they vary across architectures and are listed in
42 * the architecture specific portion of hyperv-tlfs.h.
43 */
44
45 /*
46 * Group A Features.
47 */
48
49 /* VP Runtime register available */
50 #define HV_MSR_VP_RUNTIME_AVAILABLE BIT(0)
51 /* Partition Reference Counter available*/
52 #define HV_MSR_TIME_REF_COUNT_AVAILABLE BIT(1)
53 /* Basic SynIC register available */
54 #define HV_MSR_SYNIC_AVAILABLE BIT(2)
55 /* Synthetic Timer registers available */
56 #define HV_MSR_SYNTIMER_AVAILABLE BIT(3)
57 /* Virtual APIC assist and VP assist page registers available */
58 #define HV_MSR_APIC_ACCESS_AVAILABLE BIT(4)
59 /* Hypercall and Guest OS ID registers available*/
60 #define HV_MSR_HYPERCALL_AVAILABLE BIT(5)
61 /* Access virtual processor index register available*/
62 #define HV_MSR_VP_INDEX_AVAILABLE BIT(6)
63 /* Virtual system reset register available*/
64 #define HV_MSR_RESET_AVAILABLE BIT(7)
65 /* Access statistics page registers available */
66 #define HV_MSR_STAT_PAGES_AVAILABLE BIT(8)
67 /* Partition reference TSC register is available */
68 #define HV_MSR_REFERENCE_TSC_AVAILABLE BIT(9)
69 /* Partition Guest IDLE register is available */
70 #define HV_MSR_GUEST_IDLE_AVAILABLE BIT(10)
71 /* Partition local APIC and TSC frequency registers available */
72 #define HV_ACCESS_FREQUENCY_MSRS BIT(11)
73 /* AccessReenlightenmentControls privilege */
74 #define HV_ACCESS_REENLIGHTENMENT BIT(13)
75 /* AccessTscInvariantControls privilege */
76 #define HV_ACCESS_TSC_INVARIANT BIT(15)
77
78 /*
79 * Group B features.
80 */
81 #define HV_CREATE_PARTITIONS BIT(0)
82 #define HV_ACCESS_PARTITION_ID BIT(1)
83 #define HV_ACCESS_MEMORY_POOL BIT(2)
84 #define HV_ADJUST_MESSAGE_BUFFERS BIT(3)
85 #define HV_POST_MESSAGES BIT(4)
86 #define HV_SIGNAL_EVENTS BIT(5)
87 #define HV_CREATE_PORT BIT(6)
88 #define HV_CONNECT_PORT BIT(7)
89 #define HV_ACCESS_STATS BIT(8)
90 #define HV_DEBUGGING BIT(11)
91 #define HV_CPU_MANAGEMENT BIT(12)
92 #define HV_ENABLE_EXTENDED_HYPERCALLS BIT(20)
93 #define HV_ISOLATION BIT(22)
94
95 /*
96 * TSC page layout.
97 */
98 struct ms_hyperv_tsc_page {
99 volatile u32 tsc_sequence;
100 u32 reserved1;
101 volatile u64 tsc_scale;
102 volatile s64 tsc_offset;
103 } __packed;
104
105 union hv_reference_tsc_msr {
106 u64 as_uint64;
107 struct {
108 u64 enable:1;
109 u64 reserved:11;
110 u64 pfn:52;
111 } __packed;
112 };
113
114 /*
115 * The guest OS needs to register the guest ID with the hypervisor.
116 * The guest ID is a 64 bit entity and the structure of this ID is
117 * specified in the Hyper-V specification:
118 *
119 * msdn.microsoft.com/en-us/library/windows/hardware/ff542653%28v=vs.85%29.aspx
120 *
121 * While the current guideline does not specify how Linux guest ID(s)
122 * need to be generated, our plan is to publish the guidelines for
123 * Linux and other guest operating systems that currently are hosted
124 * on Hyper-V. The implementation here conforms to this yet
125 * unpublished guidelines.
126 *
127 *
128 * Bit(s)
129 * 63 - Indicates if the OS is Open Source or not; 1 is Open Source
130 * 62:56 - Os Type; Linux is 0x100
131 * 55:48 - Distro specific identification
132 * 47:16 - Linux kernel version number
133 * 15:0 - Distro specific identification
134 *
135 *
136 */
137
138 #define HV_LINUX_VENDOR_ID 0x8100
139
140 /*
141 * Crash notification flags.
142 */
143 #define HV_CRASH_CTL_CRASH_NOTIFY_MSG BIT_ULL(62)
144 #define HV_CRASH_CTL_CRASH_NOTIFY BIT_ULL(63)
145
146 /* Declare the various hypercall operations. */
147 #define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE 0x0002
148 #define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST 0x0003
149 #define HVCALL_ENABLE_VP_VTL 0x000f
150 #define HVCALL_NOTIFY_LONG_SPIN_WAIT 0x0008
151 #define HVCALL_SEND_IPI 0x000b
152 #define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX 0x0013
153 #define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX 0x0014
154 #define HVCALL_SEND_IPI_EX 0x0015
155 #define HVCALL_GET_PARTITION_ID 0x0046
156 #define HVCALL_DEPOSIT_MEMORY 0x0048
157 #define HVCALL_CREATE_VP 0x004e
158 #define HVCALL_GET_VP_REGISTERS 0x0050
159 #define HVCALL_SET_VP_REGISTERS 0x0051
160 #define HVCALL_POST_MESSAGE 0x005c
161 #define HVCALL_SIGNAL_EVENT 0x005d
162 #define HVCALL_POST_DEBUG_DATA 0x0069
163 #define HVCALL_RETRIEVE_DEBUG_DATA 0x006a
164 #define HVCALL_RESET_DEBUG_SESSION 0x006b
165 #define HVCALL_ADD_LOGICAL_PROCESSOR 0x0076
166 #define HVCALL_MAP_DEVICE_INTERRUPT 0x007c
167 #define HVCALL_UNMAP_DEVICE_INTERRUPT 0x007d
168 #define HVCALL_RETARGET_INTERRUPT 0x007e
169 #define HVCALL_START_VP 0x0099
170 #define HVCALL_GET_VP_ID_FROM_APIC_ID 0x009a
171 #define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_SPACE 0x00af
172 #define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_LIST 0x00b0
173 #define HVCALL_MODIFY_SPARSE_GPA_PAGE_HOST_VISIBILITY 0x00db
174 #define HVCALL_MMIO_READ 0x0106
175 #define HVCALL_MMIO_WRITE 0x0107
176
177 /* Extended hypercalls */
178 #define HV_EXT_CALL_QUERY_CAPABILITIES 0x8001
179 #define HV_EXT_CALL_MEMORY_HEAT_HINT 0x8003
180
181 #define HV_FLUSH_ALL_PROCESSORS BIT(0)
182 #define HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES BIT(1)
183 #define HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY BIT(2)
184 #define HV_FLUSH_USE_EXTENDED_RANGE_FORMAT BIT(3)
185
186 /* Extended capability bits */
187 #define HV_EXT_CAPABILITY_MEMORY_COLD_DISCARD_HINT BIT(8)
188
189 enum HV_GENERIC_SET_FORMAT {
190 HV_GENERIC_SET_SPARSE_4K,
191 HV_GENERIC_SET_ALL,
192 };
193
194 #define HV_PARTITION_ID_SELF ((u64)-1)
195 #define HV_VP_INDEX_SELF ((u32)-2)
196
197 #define HV_HYPERCALL_RESULT_MASK GENMASK_ULL(15, 0)
198 #define HV_HYPERCALL_FAST_BIT BIT(16)
199 #define HV_HYPERCALL_VARHEAD_OFFSET 17
200 #define HV_HYPERCALL_VARHEAD_MASK GENMASK_ULL(26, 17)
201 #define HV_HYPERCALL_RSVD0_MASK GENMASK_ULL(31, 27)
202 #define HV_HYPERCALL_NESTED BIT_ULL(31)
203 #define HV_HYPERCALL_REP_COMP_OFFSET 32
204 #define HV_HYPERCALL_REP_COMP_1 BIT_ULL(32)
205 #define HV_HYPERCALL_REP_COMP_MASK GENMASK_ULL(43, 32)
206 #define HV_HYPERCALL_RSVD1_MASK GENMASK_ULL(47, 44)
207 #define HV_HYPERCALL_REP_START_OFFSET 48
208 #define HV_HYPERCALL_REP_START_MASK GENMASK_ULL(59, 48)
209 #define HV_HYPERCALL_RSVD2_MASK GENMASK_ULL(63, 60)
210 #define HV_HYPERCALL_RSVD_MASK (HV_HYPERCALL_RSVD0_MASK | \
211 HV_HYPERCALL_RSVD1_MASK | \
212 HV_HYPERCALL_RSVD2_MASK)
213
214 /* hypercall status code */
215 #define HV_STATUS_SUCCESS 0
216 #define HV_STATUS_INVALID_HYPERCALL_CODE 2
217 #define HV_STATUS_INVALID_HYPERCALL_INPUT 3
218 #define HV_STATUS_INVALID_ALIGNMENT 4
219 #define HV_STATUS_INVALID_PARAMETER 5
220 #define HV_STATUS_ACCESS_DENIED 6
221 #define HV_STATUS_OPERATION_DENIED 8
222 #define HV_STATUS_INSUFFICIENT_MEMORY 11
223 #define HV_STATUS_INVALID_PORT_ID 17
224 #define HV_STATUS_INVALID_CONNECTION_ID 18
225 #define HV_STATUS_INSUFFICIENT_BUFFERS 19
226 #define HV_STATUS_TIME_OUT 120
227 #define HV_STATUS_VTL_ALREADY_ENABLED 134
228
229 /*
230 * The Hyper-V TimeRefCount register and the TSC
231 * page provide a guest VM clock with 100ns tick rate
232 */
233 #define HV_CLOCK_HZ (NSEC_PER_SEC/100)
234
235 /* Define the number of synthetic interrupt sources. */
236 #define HV_SYNIC_SINT_COUNT (16)
237 /* Define the expected SynIC version. */
238 #define HV_SYNIC_VERSION_1 (0x1)
239 /* Valid SynIC vectors are 16-255. */
240 #define HV_SYNIC_FIRST_VALID_VECTOR (16)
241
242 #define HV_SYNIC_CONTROL_ENABLE (1ULL << 0)
243 #define HV_SYNIC_SIMP_ENABLE (1ULL << 0)
244 #define HV_SYNIC_SIEFP_ENABLE (1ULL << 0)
245 #define HV_SYNIC_SINT_MASKED (1ULL << 16)
246 #define HV_SYNIC_SINT_AUTO_EOI (1ULL << 17)
247 #define HV_SYNIC_SINT_VECTOR_MASK (0xFF)
248
249 #define HV_SYNIC_STIMER_COUNT (4)
250
251 /* Define synthetic interrupt controller message constants. */
252 #define HV_MESSAGE_SIZE (256)
253 #define HV_MESSAGE_PAYLOAD_BYTE_COUNT (240)
254 #define HV_MESSAGE_PAYLOAD_QWORD_COUNT (30)
255
256 /*
257 * Define hypervisor message types. Some of the message types
258 * are x86/x64 specific, but there's no good way to separate
259 * them out into the arch-specific version of hyperv-tlfs.h
260 * because C doesn't provide a way to extend enum types.
261 * Keeping them all in the arch neutral hyperv-tlfs.h seems
262 * the least messy compromise.
263 */
264 enum hv_message_type {
265 HVMSG_NONE = 0x00000000,
266
267 /* Memory access messages. */
268 HVMSG_UNMAPPED_GPA = 0x80000000,
269 HVMSG_GPA_INTERCEPT = 0x80000001,
270
271 /* Timer notification messages. */
272 HVMSG_TIMER_EXPIRED = 0x80000010,
273
274 /* Error messages. */
275 HVMSG_INVALID_VP_REGISTER_VALUE = 0x80000020,
276 HVMSG_UNRECOVERABLE_EXCEPTION = 0x80000021,
277 HVMSG_UNSUPPORTED_FEATURE = 0x80000022,
278
279 /* Trace buffer complete messages. */
280 HVMSG_EVENTLOG_BUFFERCOMPLETE = 0x80000040,
281
282 /* Platform-specific processor intercept messages. */
283 HVMSG_X64_IOPORT_INTERCEPT = 0x80010000,
284 HVMSG_X64_MSR_INTERCEPT = 0x80010001,
285 HVMSG_X64_CPUID_INTERCEPT = 0x80010002,
286 HVMSG_X64_EXCEPTION_INTERCEPT = 0x80010003,
287 HVMSG_X64_APIC_EOI = 0x80010004,
288 HVMSG_X64_LEGACY_FP_ERROR = 0x80010005
289 };
290
291 /* Define synthetic interrupt controller message flags. */
292 union hv_message_flags {
293 __u8 asu8;
294 struct {
295 __u8 msg_pending:1;
296 __u8 reserved:7;
297 } __packed;
298 };
299
300 /* Define port identifier type. */
301 union hv_port_id {
302 __u32 asu32;
303 struct {
304 __u32 id:24;
305 __u32 reserved:8;
306 } __packed u;
307 };
308
309 /* Define synthetic interrupt controller message header. */
310 struct hv_message_header {
311 __u32 message_type;
312 __u8 payload_size;
313 union hv_message_flags message_flags;
314 __u8 reserved[2];
315 union {
316 __u64 sender;
317 union hv_port_id port;
318 };
319 } __packed;
320
321 /* Define synthetic interrupt controller message format. */
322 struct hv_message {
323 struct hv_message_header header;
324 union {
325 __u64 payload[HV_MESSAGE_PAYLOAD_QWORD_COUNT];
326 } u;
327 } __packed;
328
329 /* Define the synthetic interrupt message page layout. */
330 struct hv_message_page {
331 struct hv_message sint_message[HV_SYNIC_SINT_COUNT];
332 } __packed;
333
334 /* Define timer message payload structure. */
335 struct hv_timer_message_payload {
336 __u32 timer_index;
337 __u32 reserved;
338 __u64 expiration_time; /* When the timer expired */
339 __u64 delivery_time; /* When the message was delivered */
340 } __packed;
341
342
343 /* Define synthetic interrupt controller flag constants. */
344 #define HV_EVENT_FLAGS_COUNT (256 * 8)
345 #define HV_EVENT_FLAGS_LONG_COUNT (256 / sizeof(unsigned long))
346
347 /*
348 * Synthetic timer configuration.
349 */
350 union hv_stimer_config {
351 u64 as_uint64;
352 struct {
353 u64 enable:1;
354 u64 periodic:1;
355 u64 lazy:1;
356 u64 auto_enable:1;
357 u64 apic_vector:8;
358 u64 direct_mode:1;
359 u64 reserved_z0:3;
360 u64 sintx:4;
361 u64 reserved_z1:44;
362 } __packed;
363 };
364
365
366 /* Define the synthetic interrupt controller event flags format. */
367 union hv_synic_event_flags {
368 unsigned long flags[HV_EVENT_FLAGS_LONG_COUNT];
369 };
370
371 /* Define SynIC control register. */
372 union hv_synic_scontrol {
373 u64 as_uint64;
374 struct {
375 u64 enable:1;
376 u64 reserved:63;
377 } __packed;
378 };
379
380 /* Define synthetic interrupt source. */
381 union hv_synic_sint {
382 u64 as_uint64;
383 struct {
384 u64 vector:8;
385 u64 reserved1:8;
386 u64 masked:1;
387 u64 auto_eoi:1;
388 u64 polling:1;
389 u64 reserved2:45;
390 } __packed;
391 };
392
393 /* Define the format of the SIMP register */
394 union hv_synic_simp {
395 u64 as_uint64;
396 struct {
397 u64 simp_enabled:1;
398 u64 preserved:11;
399 u64 base_simp_gpa:52;
400 } __packed;
401 };
402
403 /* Define the format of the SIEFP register */
404 union hv_synic_siefp {
405 u64 as_uint64;
406 struct {
407 u64 siefp_enabled:1;
408 u64 preserved:11;
409 u64 base_siefp_gpa:52;
410 } __packed;
411 };
412
413 struct hv_vpset {
414 u64 format;
415 u64 valid_bank_mask;
416 u64 bank_contents[];
417 } __packed;
418
419 /* The maximum number of sparse vCPU banks which can be encoded by 'struct hv_vpset' */
420 #define HV_MAX_SPARSE_VCPU_BANKS (64)
421 /* The number of vCPUs in one sparse bank */
422 #define HV_VCPUS_PER_SPARSE_BANK (64)
423
424 /* HvCallSendSyntheticClusterIpi hypercall */
425 struct hv_send_ipi {
426 u32 vector;
427 u32 reserved;
428 u64 cpu_mask;
429 } __packed;
430
431 /* HvCallSendSyntheticClusterIpiEx hypercall */
432 struct hv_send_ipi_ex {
433 u32 vector;
434 u32 reserved;
435 struct hv_vpset vp_set;
436 } __packed;
437
438 /* HvFlushGuestPhysicalAddressSpace hypercalls */
439 struct hv_guest_mapping_flush {
440 u64 address_space;
441 u64 flags;
442 } __packed;
443
444 /*
445 * HV_MAX_FLUSH_PAGES = "additional_pages" + 1. It's limited
446 * by the bitwidth of "additional_pages" in union hv_gpa_page_range.
447 */
448 #define HV_MAX_FLUSH_PAGES (2048)
449 #define HV_GPA_PAGE_RANGE_PAGE_SIZE_2MB 0
450 #define HV_GPA_PAGE_RANGE_PAGE_SIZE_1GB 1
451
452 /* HvFlushGuestPhysicalAddressList, HvExtCallMemoryHeatHint hypercall */
453 union hv_gpa_page_range {
454 u64 address_space;
455 struct {
456 u64 additional_pages:11;
457 u64 largepage:1;
458 u64 basepfn:52;
459 } page;
460 struct {
461 u64 reserved:12;
462 u64 page_size:1;
463 u64 reserved1:8;
464 u64 base_large_pfn:43;
465 };
466 };
467
468 /*
469 * All input flush parameters should be in single page. The max flush
470 * count is equal with how many entries of union hv_gpa_page_range can
471 * be populated into the input parameter page.
472 */
473 #define HV_MAX_FLUSH_REP_COUNT ((HV_HYP_PAGE_SIZE - 2 * sizeof(u64)) / \
474 sizeof(union hv_gpa_page_range))
475
476 struct hv_guest_mapping_flush_list {
477 u64 address_space;
478 u64 flags;
479 union hv_gpa_page_range gpa_list[HV_MAX_FLUSH_REP_COUNT];
480 };
481
482 /* HvFlushVirtualAddressSpace, HvFlushVirtualAddressList hypercalls */
483 struct hv_tlb_flush {
484 u64 address_space;
485 u64 flags;
486 u64 processor_mask;
487 u64 gva_list[];
488 } __packed;
489
490 /* HvFlushVirtualAddressSpaceEx, HvFlushVirtualAddressListEx hypercalls */
491 struct hv_tlb_flush_ex {
492 u64 address_space;
493 u64 flags;
494 struct hv_vpset hv_vp_set;
495 u64 gva_list[];
496 } __packed;
497
498 /* HvGetPartitionId hypercall (output only) */
499 struct hv_get_partition_id {
500 u64 partition_id;
501 } __packed;
502
503 /* HvDepositMemory hypercall */
504 struct hv_deposit_memory {
505 u64 partition_id;
506 u64 gpa_page_list[];
507 } __packed;
508
509 struct hv_proximity_domain_flags {
510 u32 proximity_preferred : 1;
511 u32 reserved : 30;
512 u32 proximity_info_valid : 1;
513 } __packed;
514
515 struct hv_proximity_domain_info {
516 u32 domain_id;
517 struct hv_proximity_domain_flags flags;
518 } __packed;
519
520 struct hv_lp_startup_status {
521 u64 hv_status;
522 u64 substatus1;
523 u64 substatus2;
524 u64 substatus3;
525 u64 substatus4;
526 u64 substatus5;
527 u64 substatus6;
528 } __packed;
529
530 /* HvAddLogicalProcessor hypercall */
531 struct hv_input_add_logical_processor {
532 u32 lp_index;
533 u32 apic_id;
534 struct hv_proximity_domain_info proximity_domain_info;
535 } __packed;
536
537 struct hv_output_add_logical_processor {
538 struct hv_lp_startup_status startup_status;
539 } __packed;
540
541 enum HV_SUBNODE_TYPE
542 {
543 HvSubnodeAny = 0,
544 HvSubnodeSocket = 1,
545 HvSubnodeAmdNode = 2,
546 HvSubnodeL3 = 3,
547 HvSubnodeCount = 4,
548 HvSubnodeInvalid = -1
549 };
550
551 /* HvCreateVp hypercall */
552 struct hv_create_vp {
553 u64 partition_id;
554 u32 vp_index;
555 u8 padding[3];
556 u8 subnode_type;
557 u64 subnode_id;
558 struct hv_proximity_domain_info proximity_domain_info;
559 u64 flags;
560 } __packed;
561
562 enum hv_interrupt_source {
563 HV_INTERRUPT_SOURCE_MSI = 1, /* MSI and MSI-X */
564 HV_INTERRUPT_SOURCE_IOAPIC,
565 };
566
567 union hv_ioapic_rte {
568 u64 as_uint64;
569
570 struct {
571 u32 vector:8;
572 u32 delivery_mode:3;
573 u32 destination_mode:1;
574 u32 delivery_status:1;
575 u32 interrupt_polarity:1;
576 u32 remote_irr:1;
577 u32 trigger_mode:1;
578 u32 interrupt_mask:1;
579 u32 reserved1:15;
580
581 u32 reserved2:24;
582 u32 destination_id:8;
583 };
584
585 struct {
586 u32 low_uint32;
587 u32 high_uint32;
588 };
589 } __packed;
590
591 struct hv_interrupt_entry {
592 u32 source;
593 u32 reserved1;
594 union {
595 union hv_msi_entry msi_entry;
596 union hv_ioapic_rte ioapic_rte;
597 };
598 } __packed;
599
600 /*
601 * flags for hv_device_interrupt_target.flags
602 */
603 #define HV_DEVICE_INTERRUPT_TARGET_MULTICAST 1
604 #define HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET 2
605
606 struct hv_device_interrupt_target {
607 u32 vector;
608 u32 flags;
609 union {
610 u64 vp_mask;
611 struct hv_vpset vp_set;
612 };
613 } __packed;
614
615 struct hv_retarget_device_interrupt {
616 u64 partition_id; /* use "self" */
617 u64 device_id;
618 struct hv_interrupt_entry int_entry;
619 u64 reserved2;
620 struct hv_device_interrupt_target int_target;
621 } __packed __aligned(8);
622
623 /*
624 * These Hyper-V registers provide information equivalent to the CPUID
625 * instruction on x86/x64.
626 */
627 #define HV_REGISTER_HYPERVISOR_VERSION 0x00000100 /*CPUID 0x40000002 */
628 #define HV_REGISTER_FEATURES 0x00000200 /*CPUID 0x40000003 */
629 #define HV_REGISTER_ENLIGHTENMENTS 0x00000201 /*CPUID 0x40000004 */
630
631 /*
632 * Synthetic register definitions equivalent to MSRs on x86/x64
633 */
634 #define HV_REGISTER_GUEST_CRASH_P0 0x00000210
635 #define HV_REGISTER_GUEST_CRASH_P1 0x00000211
636 #define HV_REGISTER_GUEST_CRASH_P2 0x00000212
637 #define HV_REGISTER_GUEST_CRASH_P3 0x00000213
638 #define HV_REGISTER_GUEST_CRASH_P4 0x00000214
639 #define HV_REGISTER_GUEST_CRASH_CTL 0x00000215
640
641 #define HV_REGISTER_GUEST_OS_ID 0x00090002
642 #define HV_REGISTER_VP_INDEX 0x00090003
643 #define HV_REGISTER_TIME_REF_COUNT 0x00090004
644 #define HV_REGISTER_REFERENCE_TSC 0x00090017
645
646 #define HV_REGISTER_SINT0 0x000A0000
647 #define HV_REGISTER_SCONTROL 0x000A0010
648 #define HV_REGISTER_SIEFP 0x000A0012
649 #define HV_REGISTER_SIMP 0x000A0013
650 #define HV_REGISTER_EOM 0x000A0014
651
652 #define HV_REGISTER_STIMER0_CONFIG 0x000B0000
653 #define HV_REGISTER_STIMER0_COUNT 0x000B0001
654
655 /* HvGetVpRegisters hypercall input with variable size reg name list*/
656 struct hv_get_vp_registers_input {
657 struct {
658 u64 partitionid;
659 u32 vpindex;
660 u8 inputvtl;
661 u8 padding[3];
662 } header;
663 struct input {
664 u32 name0;
665 u32 name1;
666 } element[];
667 } __packed;
668
669 /* HvGetVpRegisters returns an array of these output elements */
670 struct hv_get_vp_registers_output {
671 union {
672 struct {
673 u32 a;
674 u32 b;
675 u32 c;
676 u32 d;
677 } as32 __packed;
678 struct {
679 u64 low;
680 u64 high;
681 } as64 __packed;
682 };
683 };
684
685 /* HvSetVpRegisters hypercall with variable size reg name/value list*/
686 struct hv_set_vp_registers_input {
687 struct {
688 u64 partitionid;
689 u32 vpindex;
690 u8 inputvtl;
691 u8 padding[3];
692 } header;
693 struct {
694 u32 name;
695 u32 padding1;
696 u64 padding2;
697 u64 valuelow;
698 u64 valuehigh;
699 } element[];
700 } __packed;
701
702 enum hv_device_type {
703 HV_DEVICE_TYPE_LOGICAL = 0,
704 HV_DEVICE_TYPE_PCI = 1,
705 HV_DEVICE_TYPE_IOAPIC = 2,
706 HV_DEVICE_TYPE_ACPI = 3,
707 };
708
709 typedef u16 hv_pci_rid;
710 typedef u16 hv_pci_segment;
711 typedef u64 hv_logical_device_id;
712 union hv_pci_bdf {
713 u16 as_uint16;
714
715 struct {
716 u8 function:3;
717 u8 device:5;
718 u8 bus;
719 };
720 } __packed;
721
722 union hv_pci_bus_range {
723 u16 as_uint16;
724
725 struct {
726 u8 subordinate_bus;
727 u8 secondary_bus;
728 };
729 } __packed;
730
731 union hv_device_id {
732 u64 as_uint64;
733
734 struct {
735 u64 reserved0:62;
736 u64 device_type:2;
737 };
738
739 /* HV_DEVICE_TYPE_LOGICAL */
740 struct {
741 u64 id:62;
742 u64 device_type:2;
743 } logical;
744
745 /* HV_DEVICE_TYPE_PCI */
746 struct {
747 union {
748 hv_pci_rid rid;
749 union hv_pci_bdf bdf;
750 };
751
752 hv_pci_segment segment;
753 union hv_pci_bus_range shadow_bus_range;
754
755 u16 phantom_function_bits:2;
756 u16 source_shadow:1;
757
758 u16 rsvdz0:11;
759 u16 device_type:2;
760 } pci;
761
762 /* HV_DEVICE_TYPE_IOAPIC */
763 struct {
764 u8 ioapic_id;
765 u8 rsvdz0;
766 u16 rsvdz1;
767 u16 rsvdz2;
768
769 u16 rsvdz3:14;
770 u16 device_type:2;
771 } ioapic;
772
773 /* HV_DEVICE_TYPE_ACPI */
774 struct {
775 u32 input_mapping_base;
776 u32 input_mapping_count:30;
777 u32 device_type:2;
778 } acpi;
779 } __packed;
780
781 enum hv_interrupt_trigger_mode {
782 HV_INTERRUPT_TRIGGER_MODE_EDGE = 0,
783 HV_INTERRUPT_TRIGGER_MODE_LEVEL = 1,
784 };
785
786 struct hv_device_interrupt_descriptor {
787 u32 interrupt_type;
788 u32 trigger_mode;
789 u32 vector_count;
790 u32 reserved;
791 struct hv_device_interrupt_target target;
792 } __packed;
793
794 struct hv_input_map_device_interrupt {
795 u64 partition_id;
796 u64 device_id;
797 u64 flags;
798 struct hv_interrupt_entry logical_interrupt_entry;
799 struct hv_device_interrupt_descriptor interrupt_descriptor;
800 } __packed;
801
802 struct hv_output_map_device_interrupt {
803 struct hv_interrupt_entry interrupt_entry;
804 } __packed;
805
806 struct hv_input_unmap_device_interrupt {
807 u64 partition_id;
808 u64 device_id;
809 struct hv_interrupt_entry interrupt_entry;
810 } __packed;
811
812 #define HV_SOURCE_SHADOW_NONE 0x0
813 #define HV_SOURCE_SHADOW_BRIDGE_BUS_RANGE 0x1
814
815 /*
816 * Version info reported by hypervisor
817 */
818 union hv_hypervisor_version_info {
819 struct {
820 u32 build_number;
821
822 u32 minor_version : 16;
823 u32 major_version : 16;
824
825 u32 service_pack;
826
827 u32 service_number : 24;
828 u32 service_branch : 8;
829 };
830 struct {
831 u32 eax;
832 u32 ebx;
833 u32 ecx;
834 u32 edx;
835 };
836 };
837
838 /*
839 * The whole argument should fit in a page to be able to pass to the hypervisor
840 * in one hypercall.
841 */
842 #define HV_MEMORY_HINT_MAX_GPA_PAGE_RANGES \
843 ((HV_HYP_PAGE_SIZE - sizeof(struct hv_memory_hint)) / \
844 sizeof(union hv_gpa_page_range))
845
846 /* HvExtCallMemoryHeatHint hypercall */
847 #define HV_EXT_MEMORY_HEAT_HINT_TYPE_COLD_DISCARD 2
848 struct hv_memory_hint {
849 u64 type:2;
850 u64 reserved:62;
851 union hv_gpa_page_range ranges[];
852 } __packed;
853
854 /* Data structures for HVCALL_MMIO_READ and HVCALL_MMIO_WRITE */
855 #define HV_HYPERCALL_MMIO_MAX_DATA_LENGTH 64
856
857 struct hv_mmio_read_input {
858 u64 gpa;
859 u32 size;
860 u32 reserved;
861 } __packed;
862
863 struct hv_mmio_read_output {
864 u8 data[HV_HYPERCALL_MMIO_MAX_DATA_LENGTH];
865 } __packed;
866
867 struct hv_mmio_write_input {
868 u64 gpa;
869 u32 size;
870 u32 reserved;
871 u8 data[HV_HYPERCALL_MMIO_MAX_DATA_LENGTH];
872 } __packed;
873
874 #endif
875
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