1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * Copyright (C) 2021 Sean Anderson <sean.anderson@seco.com>
4 */
5
6 #ifndef XILINX_TIMER_H
7 #define XILINX_TIMER_H
8
9 #include <linux/compiler.h>
10
11 #define TCSR0 0x00
12 #define TLR0 0x04
13 #define TCR0 0x08
14 #define TCSR1 0x10
15 #define TLR1 0x14
16 #define TCR1 0x18
17
18 #define TCSR_MDT BIT(0)
19 #define TCSR_UDT BIT(1)
20 #define TCSR_GENT BIT(2)
21 #define TCSR_CAPT BIT(3)
22 #define TCSR_ARHT BIT(4)
23 #define TCSR_LOAD BIT(5)
24 #define TCSR_ENIT BIT(6)
25 #define TCSR_ENT BIT(7)
26 #define TCSR_TINT BIT(8)
27 #define TCSR_PWMA BIT(9)
28 #define TCSR_ENALL BIT(10)
29 #define TCSR_CASC BIT(11)
30
31 struct clk;
32 struct device_node;
33 struct regmap;
34
35 /**
36 * struct xilinx_timer_priv - Private data for Xilinx AXI timer drivers
37 * @map: Regmap of the device, possibly with an offset
38 * @clk: Parent clock
39 * @max: Maximum value of the counters
40 */
41 struct xilinx_timer_priv {
42 struct regmap *map;
43 struct clk *clk;
44 u64 max;
45 };
46
47 /**
48 * xilinx_timer_tlr_cycles() - Calculate the TLR for a period specified
49 * in clock cycles
50 * @priv: The timer's private data
51 * @tcsr: The value of the TCSR register for this counter
52 * @cycles: The number of cycles in this period
53 *
54 * Callers of this function MUST ensure that @cycles is representable as
55 * a TLR.
56 *
57 * Return: The calculated value for TLR
58 */
59 u32 xilinx_timer_tlr_cycles(struct xilinx_timer_priv *priv, u32 tcsr,
60 u64 cycles);
61
62 /**
63 * xilinx_timer_get_period() - Get the current period of a counter
64 * @priv: The timer's private data
65 * @tlr: The value of TLR for this counter
66 * @tcsr: The value of TCSR for this counter
67 *
68 * Return: The period, in ns
69 */
70 unsigned int xilinx_timer_get_period(struct xilinx_timer_priv *priv,
71 u32 tlr, u32 tcsr);
72
73 #endif /* XILINX_TIMER_H */
74
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