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TOMOYO Linux Cross Reference
Linux/include/dt-bindings/clock/qcom,gpucc-sm8350.h

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  1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
  2 /*
  3  * Copyright (c) 2022, The Linux Foundation. All rights reserved.
  4  */
  5 
  6 #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8350_H
  7 #define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8350_H
  8 
  9 /* GPU_CC clocks */
 10 #define GPU_CC_AHB_CLK                  0
 11 #define GPU_CC_CB_CLK                   1
 12 #define GPU_CC_CRC_AHB_CLK              2
 13 #define GPU_CC_CX_APB_CLK               3
 14 #define GPU_CC_CX_GMU_CLK               4
 15 #define GPU_CC_CX_QDSS_AT_CLK           5
 16 #define GPU_CC_CX_QDSS_TRIG_CLK         6
 17 #define GPU_CC_CX_QDSS_TSCTR_CLK        7
 18 #define GPU_CC_CX_SNOC_DVM_CLK          8
 19 #define GPU_CC_CXO_AON_CLK              9
 20 #define GPU_CC_CXO_CLK                  10
 21 #define GPU_CC_FREQ_MEASURE_CLK         11
 22 #define GPU_CC_GMU_CLK_SRC              12
 23 #define GPU_CC_GX_GMU_CLK               13
 24 #define GPU_CC_GX_QDSS_TSCTR_CLK        14
 25 #define GPU_CC_GX_VSENSE_CLK            15
 26 #define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK  16
 27 #define GPU_CC_HUB_AHB_DIV_CLK_SRC      17
 28 #define GPU_CC_HUB_AON_CLK              18
 29 #define GPU_CC_HUB_CLK_SRC              19
 30 #define GPU_CC_HUB_CX_INT_CLK           20
 31 #define GPU_CC_HUB_CX_INT_DIV_CLK_SRC   21
 32 #define GPU_CC_MND1X_0_GFX3D_CLK        22
 33 #define GPU_CC_MND1X_1_GFX3D_CLK        23
 34 #define GPU_CC_PLL0                     24
 35 #define GPU_CC_PLL1                     25
 36 #define GPU_CC_SLEEP_CLK                26
 37 
 38 /* GPU_CC resets */
 39 #define GPUCC_GPU_CC_ACD_BCR            0
 40 #define GPUCC_GPU_CC_CB_BCR             1
 41 #define GPUCC_GPU_CC_CX_BCR             2
 42 #define GPUCC_GPU_CC_FAST_HUB_BCR       3
 43 #define GPUCC_GPU_CC_GFX3D_AON_BCR      4
 44 #define GPUCC_GPU_CC_GMU_BCR            5
 45 #define GPUCC_GPU_CC_GX_BCR             6
 46 #define GPUCC_GPU_CC_XO_BCR             7
 47 
 48 /* GPU_CC GDSCRs */
 49 #define GPU_CX_GDSC                     0
 50 #define GPU_GX_GDSC                     1
 51 
 52 #endif
 53 

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