1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 /* 3 * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. 4 */ 5 6 #ifndef _DT_BINDINGS_CLK_QCOM_CAM_CC_SM8150_H 7 #define _DT_BINDINGS_CLK_QCOM_CAM_CC_SM8150_H 8 9 /* CAM_CC clocks */ 10 #define CAM_CC_PLL0 0 11 #define CAM_CC_PLL0_OUT_EVEN 1 12 #define CAM_CC_PLL0_OUT_ODD 2 13 #define CAM_CC_PLL1 3 14 #define CAM_CC_PLL1_OUT_EVEN 4 15 #define CAM_CC_PLL2 5 16 #define CAM_CC_PLL2_OUT_MAIN 6 17 #define CAM_CC_PLL3 7 18 #define CAM_CC_PLL3_OUT_EVEN 8 19 #define CAM_CC_PLL4 9 20 #define CAM_CC_PLL4_OUT_EVEN 10 21 #define CAM_CC_BPS_AHB_CLK 11 22 #define CAM_CC_BPS_AREG_CLK 12 23 #define CAM_CC_BPS_AXI_CLK 13 24 #define CAM_CC_BPS_CLK 14 25 #define CAM_CC_BPS_CLK_SRC 15 26 #define CAM_CC_CAMNOC_AXI_CLK 16 27 #define CAM_CC_CAMNOC_AXI_CLK_SRC 17 28 #define CAM_CC_CAMNOC_DCD_XO_CLK 18 29 #define CAM_CC_CCI_0_CLK 19 30 #define CAM_CC_CCI_0_CLK_SRC 20 31 #define CAM_CC_CCI_1_CLK 21 32 #define CAM_CC_CCI_1_CLK_SRC 22 33 #define CAM_CC_CORE_AHB_CLK 23 34 #define CAM_CC_CPAS_AHB_CLK 24 35 #define CAM_CC_CPHY_RX_CLK_SRC 25 36 #define CAM_CC_CSI0PHYTIMER_CLK 26 37 #define CAM_CC_CSI0PHYTIMER_CLK_SRC 27 38 #define CAM_CC_CSI1PHYTIMER_CLK 28 39 #define CAM_CC_CSI1PHYTIMER_CLK_SRC 29 40 #define CAM_CC_CSI2PHYTIMER_CLK 30 41 #define CAM_CC_CSI2PHYTIMER_CLK_SRC 31 42 #define CAM_CC_CSI3PHYTIMER_CLK 32 43 #define CAM_CC_CSI3PHYTIMER_CLK_SRC 33 44 #define CAM_CC_CSIPHY0_CLK 34 45 #define CAM_CC_CSIPHY1_CLK 35 46 #define CAM_CC_CSIPHY2_CLK 36 47 #define CAM_CC_CSIPHY3_CLK 37 48 #define CAM_CC_FAST_AHB_CLK_SRC 38 49 #define CAM_CC_FD_CORE_CLK 39 50 #define CAM_CC_FD_CORE_CLK_SRC 40 51 #define CAM_CC_FD_CORE_UAR_CLK 41 52 #define CAM_CC_GDSC_CLK 42 53 #define CAM_CC_ICP_AHB_CLK 43 54 #define CAM_CC_ICP_CLK 44 55 #define CAM_CC_ICP_CLK_SRC 45 56 #define CAM_CC_IFE_0_AXI_CLK 46 57 #define CAM_CC_IFE_0_CLK 47 58 #define CAM_CC_IFE_0_CLK_SRC 48 59 #define CAM_CC_IFE_0_CPHY_RX_CLK 49 60 #define CAM_CC_IFE_0_CSID_CLK 50 61 #define CAM_CC_IFE_0_CSID_CLK_SRC 51 62 #define CAM_CC_IFE_0_DSP_CLK 52 63 #define CAM_CC_IFE_1_AXI_CLK 53 64 #define CAM_CC_IFE_1_CLK 54 65 #define CAM_CC_IFE_1_CLK_SRC 55 66 #define CAM_CC_IFE_1_CPHY_RX_CLK 56 67 #define CAM_CC_IFE_1_CSID_CLK 57 68 #define CAM_CC_IFE_1_CSID_CLK_SRC 58 69 #define CAM_CC_IFE_1_DSP_CLK 59 70 #define CAM_CC_IFE_LITE_0_CLK 60 71 #define CAM_CC_IFE_LITE_0_CLK_SRC 61 72 #define CAM_CC_IFE_LITE_0_CPHY_RX_CLK 62 73 #define CAM_CC_IFE_LITE_0_CSID_CLK 63 74 #define CAM_CC_IFE_LITE_0_CSID_CLK_SRC 64 75 #define CAM_CC_IFE_LITE_1_CLK 65 76 #define CAM_CC_IFE_LITE_1_CLK_SRC 66 77 #define CAM_CC_IFE_LITE_1_CPHY_RX_CLK 67 78 #define CAM_CC_IFE_LITE_1_CSID_CLK 68 79 #define CAM_CC_IFE_LITE_1_CSID_CLK_SRC 69 80 #define CAM_CC_IPE_0_AHB_CLK 70 81 #define CAM_CC_IPE_0_AREG_CLK 71 82 #define CAM_CC_IPE_0_AXI_CLK 72 83 #define CAM_CC_IPE_0_CLK 73 84 #define CAM_CC_IPE_0_CLK_SRC 74 85 #define CAM_CC_IPE_1_AHB_CLK 75 86 #define CAM_CC_IPE_1_AREG_CLK 76 87 #define CAM_CC_IPE_1_AXI_CLK 77 88 #define CAM_CC_IPE_1_CLK 78 89 #define CAM_CC_JPEG_CLK 79 90 #define CAM_CC_JPEG_CLK_SRC 80 91 #define CAM_CC_LRME_CLK 81 92 #define CAM_CC_LRME_CLK_SRC 82 93 #define CAM_CC_MCLK0_CLK 83 94 #define CAM_CC_MCLK0_CLK_SRC 84 95 #define CAM_CC_MCLK1_CLK 85 96 #define CAM_CC_MCLK1_CLK_SRC 86 97 #define CAM_CC_MCLK2_CLK 87 98 #define CAM_CC_MCLK2_CLK_SRC 88 99 #define CAM_CC_MCLK3_CLK 89 100 #define CAM_CC_MCLK3_CLK_SRC 90 101 #define CAM_CC_SLOW_AHB_CLK_SRC 91 102 103 /* CAM_CC power domains */ 104 #define TITAN_TOP_GDSC 0 105 #define BPS_GDSC 1 106 #define IFE_0_GDSC 2 107 #define IFE_1_GDSC 3 108 #define IPE_0_GDSC 4 109 #define IPE_1_GDSC 5 110 111 /* CAM_CC resets */ 112 #define CAM_CC_BPS_BCR 0 113 #define CAM_CC_CAMNOC_BCR 1 114 #define CAM_CC_CCI_BCR 2 115 #define CAM_CC_CPAS_BCR 3 116 #define CAM_CC_CSI0PHY_BCR 4 117 #define CAM_CC_CSI1PHY_BCR 5 118 #define CAM_CC_CSI2PHY_BCR 6 119 #define CAM_CC_CSI3PHY_BCR 7 120 #define CAM_CC_FD_BCR 8 121 #define CAM_CC_ICP_BCR 9 122 #define CAM_CC_IFE_0_BCR 10 123 #define CAM_CC_IFE_1_BCR 11 124 #define CAM_CC_IFE_LITE_0_BCR 12 125 #define CAM_CC_IFE_LITE_1_BCR 13 126 #define CAM_CC_IPE_0_BCR 14 127 #define CAM_CC_IPE_1_BCR 15 128 #define CAM_CC_JPEG_BCR 16 129 #define CAM_CC_LRME_BCR 17 130 #define CAM_CC_MCLK0_BCR 18 131 #define CAM_CC_MCLK1_BCR 19 132 #define CAM_CC_MCLK2_BCR 20 133 #define CAM_CC_MCLK3_BCR 21 134 135 #endif 136
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