1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * This header provides macros for MAXIM MAX77620 device bindings. 4 * 5 * Copyright (c) 2016, NVIDIA Corporation. 6 * Author: Laxman Dewangan <ldewangan@nvidia.com> 7 */ 8 9 #ifndef _DT_BINDINGS_MFD_MAX77620_H 10 #define _DT_BINDINGS_MFD_MAX77620_H 11 12 /* MAX77620 interrupts */ 13 #define MAX77620_IRQ_TOP_GLBL 0 /* Low-Battery */ 14 #define MAX77620_IRQ_TOP_SD 1 /* SD power fail */ 15 #define MAX77620_IRQ_TOP_LDO 2 /* LDO power fail */ 16 #define MAX77620_IRQ_TOP_GPIO 3 /* GPIO internal int to MAX77620 */ 17 #define MAX77620_IRQ_TOP_RTC 4 /* RTC */ 18 #define MAX77620_IRQ_TOP_32K 5 /* 32kHz oscillator */ 19 #define MAX77620_IRQ_TOP_ONOFF 6 /* ON/OFF oscillator */ 20 #define MAX77620_IRQ_LBT_MBATLOW 7 /* Thermal alarm status, > 120C */ 21 #define MAX77620_IRQ_LBT_TJALRM1 8 /* Thermal alarm status, > 120C */ 22 #define MAX77620_IRQ_LBT_TJALRM2 9 /* Thermal alarm status, > 140C */ 23 24 /* FPS event source */ 25 #define MAX77620_FPS_EVENT_SRC_EN0 0 26 #define MAX77620_FPS_EVENT_SRC_EN1 1 27 #define MAX77620_FPS_EVENT_SRC_SW 2 28 29 /* Device state when FPS event LOW */ 30 #define MAX77620_FPS_INACTIVE_STATE_SLEEP 0 31 #define MAX77620_FPS_INACTIVE_STATE_LOW_POWER 1 32 33 /* FPS source */ 34 #define MAX77620_FPS_SRC_0 0 35 #define MAX77620_FPS_SRC_1 1 36 #define MAX77620_FPS_SRC_2 2 37 #define MAX77620_FPS_SRC_NONE 3 38 #define MAX77620_FPS_SRC_DEF 4 39 40 #endif 41
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