1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (c) 2012, The Linux Foundation. All rights reserved.
4 */
5
6 #ifndef _LINUX_CORESIGHT_H
7 #define _LINUX_CORESIGHT_H
8
9 #include <linux/amba/bus.h>
10 #include <linux/clk.h>
11 #include <linux/device.h>
12 #include <linux/io.h>
13 #include <linux/perf_event.h>
14 #include <linux/sched.h>
15 #include <linux/platform_device.h>
16
17 /* Peripheral id registers (0xFD0-0xFEC) */
18 #define CORESIGHT_PERIPHIDR4 0xfd0
19 #define CORESIGHT_PERIPHIDR5 0xfd4
20 #define CORESIGHT_PERIPHIDR6 0xfd8
21 #define CORESIGHT_PERIPHIDR7 0xfdC
22 #define CORESIGHT_PERIPHIDR0 0xfe0
23 #define CORESIGHT_PERIPHIDR1 0xfe4
24 #define CORESIGHT_PERIPHIDR2 0xfe8
25 #define CORESIGHT_PERIPHIDR3 0xfeC
26 /* Component id registers (0xFF0-0xFFC) */
27 #define CORESIGHT_COMPIDR0 0xff0
28 #define CORESIGHT_COMPIDR1 0xff4
29 #define CORESIGHT_COMPIDR2 0xff8
30 #define CORESIGHT_COMPIDR3 0xffC
31
32 #define ETM_ARCH_V3_3 0x23
33 #define ETM_ARCH_V3_5 0x25
34 #define PFT_ARCH_V1_0 0x30
35 #define PFT_ARCH_V1_1 0x31
36
37 #define CORESIGHT_UNLOCK 0xc5acce55
38
39 extern const struct bus_type coresight_bustype;
40
41 enum coresight_dev_type {
42 CORESIGHT_DEV_TYPE_SINK,
43 CORESIGHT_DEV_TYPE_LINK,
44 CORESIGHT_DEV_TYPE_LINKSINK,
45 CORESIGHT_DEV_TYPE_SOURCE,
46 CORESIGHT_DEV_TYPE_HELPER,
47 CORESIGHT_DEV_TYPE_MAX
48 };
49
50 enum coresight_dev_subtype_sink {
51 CORESIGHT_DEV_SUBTYPE_SINK_DUMMY,
52 CORESIGHT_DEV_SUBTYPE_SINK_PORT,
53 CORESIGHT_DEV_SUBTYPE_SINK_BUFFER,
54 CORESIGHT_DEV_SUBTYPE_SINK_SYSMEM,
55 CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM,
56 };
57
58 enum coresight_dev_subtype_link {
59 CORESIGHT_DEV_SUBTYPE_LINK_MERG,
60 CORESIGHT_DEV_SUBTYPE_LINK_SPLIT,
61 CORESIGHT_DEV_SUBTYPE_LINK_FIFO,
62 };
63
64 enum coresight_dev_subtype_source {
65 CORESIGHT_DEV_SUBTYPE_SOURCE_PROC,
66 CORESIGHT_DEV_SUBTYPE_SOURCE_BUS,
67 CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE,
68 CORESIGHT_DEV_SUBTYPE_SOURCE_TPDM,
69 CORESIGHT_DEV_SUBTYPE_SOURCE_OTHERS,
70 };
71
72 enum coresight_dev_subtype_helper {
73 CORESIGHT_DEV_SUBTYPE_HELPER_CATU,
74 CORESIGHT_DEV_SUBTYPE_HELPER_ECT_CTI
75 };
76
77 /**
78 * union coresight_dev_subtype - further characterisation of a type
79 * @sink_subtype: type of sink this component is, as defined
80 * by @coresight_dev_subtype_sink.
81 * @link_subtype: type of link this component is, as defined
82 * by @coresight_dev_subtype_link.
83 * @source_subtype: type of source this component is, as defined
84 * by @coresight_dev_subtype_source.
85 * @helper_subtype: type of helper this component is, as defined
86 * by @coresight_dev_subtype_helper.
87 */
88 union coresight_dev_subtype {
89 /* We have some devices which acts as LINK and SINK */
90 struct {
91 enum coresight_dev_subtype_sink sink_subtype;
92 enum coresight_dev_subtype_link link_subtype;
93 };
94 enum coresight_dev_subtype_source source_subtype;
95 enum coresight_dev_subtype_helper helper_subtype;
96 };
97
98 /**
99 * struct coresight_platform_data - data harvested from the firmware
100 * specification.
101 *
102 * @nr_inconns: Number of elements for the input connections.
103 * @nr_outconns: Number of elements for the output connections.
104 * @out_conns: Array of nr_outconns pointers to connections from this
105 * component.
106 * @in_conns: Sparse array of pointers to input connections. Sparse
107 * because the source device owns the connection so when it's
108 * unloaded the connection leaves an empty slot.
109 */
110 struct coresight_platform_data {
111 int nr_inconns;
112 int nr_outconns;
113 struct coresight_connection **out_conns;
114 struct coresight_connection **in_conns;
115 };
116
117 /**
118 * struct csdev_access - Abstraction of a CoreSight device access.
119 *
120 * @io_mem : True if the device has memory mapped I/O
121 * @base : When io_mem == true, base address of the component
122 * @read : Read from the given "offset" of the given instance.
123 * @write : Write "val" to the given "offset".
124 */
125 struct csdev_access {
126 bool io_mem;
127 union {
128 void __iomem *base;
129 struct {
130 u64 (*read)(u32 offset, bool relaxed, bool _64bit);
131 void (*write)(u64 val, u32 offset, bool relaxed,
132 bool _64bit);
133 };
134 };
135 };
136
137 #define CSDEV_ACCESS_IOMEM(_addr) \
138 ((struct csdev_access) { \
139 .io_mem = true, \
140 .base = (_addr), \
141 })
142
143 /**
144 * struct coresight_desc - description of a component required from drivers
145 * @type: as defined by @coresight_dev_type.
146 * @subtype: as defined by @coresight_dev_subtype.
147 * @ops: generic operations for this component, as defined
148 * by @coresight_ops.
149 * @pdata: platform data collected from DT.
150 * @dev: The device entity associated to this component.
151 * @groups: operations specific to this component. These will end up
152 * in the component's sysfs sub-directory.
153 * @name: name for the coresight device, also shown under sysfs.
154 * @access: Describe access to the device
155 */
156 struct coresight_desc {
157 enum coresight_dev_type type;
158 union coresight_dev_subtype subtype;
159 const struct coresight_ops *ops;
160 struct coresight_platform_data *pdata;
161 struct device *dev;
162 const struct attribute_group **groups;
163 const char *name;
164 struct csdev_access access;
165 };
166
167 /**
168 * struct coresight_connection - representation of a single connection
169 * @src_port: a connection's output port number.
170 * @dest_port: destination's input port number @src_port is connected to.
171 * @dest_fwnode: destination component's fwnode handle.
172 * @dest_dev: a @coresight_device representation of the component
173 connected to @src_port. NULL until the device is created
174 * @link: Representation of the connection as a sysfs link.
175 *
176 * The full connection structure looks like this, where in_conns store
177 * references to same connection as the source device's out_conns.
178 *
179 * +-----------------------------+ +-----------------------------+
180 * |coresight_device | |coresight_connection |
181 * |-----------------------------| |-----------------------------|
182 * | | | |
183 * | | | dest_dev*|<--
184 * |pdata->out_conns[nr_outconns]|<->|src_dev* | |
185 * | | | | |
186 * +-----------------------------+ +-----------------------------+ |
187 * |
188 * +-----------------------------+ |
189 * |coresight_device | |
190 * |------------------------------ |
191 * | | |
192 * | pdata->in_conns[nr_inconns]|<--
193 * | |
194 * +-----------------------------+
195 */
196 struct coresight_connection {
197 int src_port;
198 int dest_port;
199 struct fwnode_handle *dest_fwnode;
200 struct coresight_device *dest_dev;
201 struct coresight_sysfs_link *link;
202 struct coresight_device *src_dev;
203 atomic_t src_refcnt;
204 atomic_t dest_refcnt;
205 };
206
207 /**
208 * struct coresight_sysfs_link - representation of a connection in sysfs.
209 * @orig: Originating (master) coresight device for the link.
210 * @orig_name: Name to use for the link orig->target.
211 * @target: Target (slave) coresight device for the link.
212 * @target_name: Name to use for the link target->orig.
213 */
214 struct coresight_sysfs_link {
215 struct coresight_device *orig;
216 const char *orig_name;
217 struct coresight_device *target;
218 const char *target_name;
219 };
220
221 /**
222 * struct coresight_device - representation of a device as used by the framework
223 * @pdata: Platform data with device connections associated to this device.
224 * @type: as defined by @coresight_dev_type.
225 * @subtype: as defined by @coresight_dev_subtype.
226 * @ops: generic operations for this component, as defined
227 * by @coresight_ops.
228 * @access: Device i/o access abstraction for this device.
229 * @dev: The device entity associated to this component.
230 * @mode: This tracer's mode, i.e sysFS, Perf or disabled. This is
231 * actually an 'enum cs_mode', but is stored in an atomic type.
232 * This is always accessed through local_read() and local_set(),
233 * but wherever it's done from within the Coresight device's lock,
234 * a non-atomic read would also work. This is the main point of
235 * synchronisation between code happening inside the sysfs mode's
236 * coresight_mutex and outside when running in Perf mode. A compare
237 * and exchange swap is done to atomically claim one mode or the
238 * other.
239 * @refcnt: keep track of what is in use. Only access this outside of the
240 * device's spinlock when the coresight_mutex held and mode ==
241 * CS_MODE_SYSFS. Otherwise it must be accessed from inside the
242 * spinlock.
243 * @orphan: true if the component has connections that haven't been linked.
244 * @sysfs_sink_activated: 'true' when a sink has been selected for use via sysfs
245 * by writing a 1 to the 'enable_sink' file. A sink can be
246 * activated but not yet enabled. Enabling for a _sink_ happens
247 * when a source has been selected and a path is enabled from
248 * source to that sink. A sink can also become enabled but not
249 * activated if it's used via Perf.
250 * @ea: Device attribute for sink representation under PMU directory.
251 * @def_sink: cached reference to default sink found for this device.
252 * @nr_links: number of sysfs links created to other components from this
253 * device. These will appear in the "connections" group.
254 * @has_conns_grp: Have added a "connections" group for sysfs links.
255 * @feature_csdev_list: List of complex feature programming added to the device.
256 * @config_csdev_list: List of system configurations added to the device.
257 * @cscfg_csdev_lock: Protect the lists of configurations and features.
258 * @active_cscfg_ctxt: Context information for current active system configuration.
259 */
260 struct coresight_device {
261 struct coresight_platform_data *pdata;
262 enum coresight_dev_type type;
263 union coresight_dev_subtype subtype;
264 const struct coresight_ops *ops;
265 struct csdev_access access;
266 struct device dev;
267 local_t mode;
268 int refcnt;
269 bool orphan;
270 /* sink specific fields */
271 bool sysfs_sink_activated;
272 struct dev_ext_attribute *ea;
273 struct coresight_device *def_sink;
274 /* sysfs links between components */
275 int nr_links;
276 bool has_conns_grp;
277 /* system configuration and feature lists */
278 struct list_head feature_csdev_list;
279 struct list_head config_csdev_list;
280 spinlock_t cscfg_csdev_lock;
281 void *active_cscfg_ctxt;
282 };
283
284 /*
285 * coresight_dev_list - Mapping for devices to "name" index for device
286 * names.
287 *
288 * @nr_idx: Number of entries already allocated.
289 * @pfx: Prefix pattern for device name.
290 * @fwnode_list: Array of fwnode_handles associated with each allocated
291 * index, upto nr_idx entries.
292 */
293 struct coresight_dev_list {
294 int nr_idx;
295 const char *pfx;
296 struct fwnode_handle **fwnode_list;
297 };
298
299 #define DEFINE_CORESIGHT_DEVLIST(var, dev_pfx) \
300 static struct coresight_dev_list (var) = { \
301 .pfx = dev_pfx, \
302 .nr_idx = 0, \
303 .fwnode_list = NULL, \
304 }
305
306 #define to_coresight_device(d) container_of(d, struct coresight_device, dev)
307
308 enum cs_mode {
309 CS_MODE_DISABLED,
310 CS_MODE_SYSFS,
311 CS_MODE_PERF,
312 };
313
314 #define source_ops(csdev) csdev->ops->source_ops
315 #define sink_ops(csdev) csdev->ops->sink_ops
316 #define link_ops(csdev) csdev->ops->link_ops
317 #define helper_ops(csdev) csdev->ops->helper_ops
318 #define ect_ops(csdev) csdev->ops->ect_ops
319
320 /**
321 * struct coresight_ops_sink - basic operations for a sink
322 * Operations available for sinks
323 * @enable: enables the sink.
324 * @disable: disables the sink.
325 * @alloc_buffer: initialises perf's ring buffer for trace collection.
326 * @free_buffer: release memory allocated in @get_config.
327 * @update_buffer: update buffer pointers after a trace session.
328 */
329 struct coresight_ops_sink {
330 int (*enable)(struct coresight_device *csdev, enum cs_mode mode,
331 void *data);
332 int (*disable)(struct coresight_device *csdev);
333 void *(*alloc_buffer)(struct coresight_device *csdev,
334 struct perf_event *event, void **pages,
335 int nr_pages, bool overwrite);
336 void (*free_buffer)(void *config);
337 unsigned long (*update_buffer)(struct coresight_device *csdev,
338 struct perf_output_handle *handle,
339 void *sink_config);
340 };
341
342 /**
343 * struct coresight_ops_link - basic operations for a link
344 * Operations available for links.
345 * @enable: enables flow between iport and oport.
346 * @disable: disables flow between iport and oport.
347 */
348 struct coresight_ops_link {
349 int (*enable)(struct coresight_device *csdev,
350 struct coresight_connection *in,
351 struct coresight_connection *out);
352 void (*disable)(struct coresight_device *csdev,
353 struct coresight_connection *in,
354 struct coresight_connection *out);
355 };
356
357 /**
358 * struct coresight_ops_source - basic operations for a source
359 * Operations available for sources.
360 * @cpu_id: returns the value of the CPU number this component
361 * is associated to.
362 * @enable: enables tracing for a source.
363 * @disable: disables tracing for a source.
364 */
365 struct coresight_ops_source {
366 int (*cpu_id)(struct coresight_device *csdev);
367 int (*enable)(struct coresight_device *csdev, struct perf_event *event,
368 enum cs_mode mode);
369 void (*disable)(struct coresight_device *csdev,
370 struct perf_event *event);
371 };
372
373 /**
374 * struct coresight_ops_helper - Operations for a helper device.
375 *
376 * All operations could pass in a device specific data, which could
377 * help the helper device to determine what to do.
378 *
379 * @enable : Enable the device
380 * @disable : Disable the device
381 */
382 struct coresight_ops_helper {
383 int (*enable)(struct coresight_device *csdev, enum cs_mode mode,
384 void *data);
385 int (*disable)(struct coresight_device *csdev, void *data);
386 };
387
388 struct coresight_ops {
389 const struct coresight_ops_sink *sink_ops;
390 const struct coresight_ops_link *link_ops;
391 const struct coresight_ops_source *source_ops;
392 const struct coresight_ops_helper *helper_ops;
393 };
394
395 static inline u32 csdev_access_relaxed_read32(struct csdev_access *csa,
396 u32 offset)
397 {
398 if (likely(csa->io_mem))
399 return readl_relaxed(csa->base + offset);
400
401 return csa->read(offset, true, false);
402 }
403
404 #define CORESIGHT_CIDRn(i) (0xFF0 + ((i) * 4))
405
406 static inline u32 coresight_get_cid(void __iomem *base)
407 {
408 u32 i, cid = 0;
409
410 for (i = 0; i < 4; i++)
411 cid |= readl(base + CORESIGHT_CIDRn(i)) << (i * 8);
412
413 return cid;
414 }
415
416 static inline bool is_coresight_device(void __iomem *base)
417 {
418 u32 cid = coresight_get_cid(base);
419
420 return cid == CORESIGHT_CID;
421 }
422
423 /*
424 * Attempt to find and enable "APB clock" for the given device
425 *
426 * Returns:
427 *
428 * clk - Clock is found and enabled
429 * NULL - clock is not found
430 * ERROR - Clock is found but failed to enable
431 */
432 static inline struct clk *coresight_get_enable_apb_pclk(struct device *dev)
433 {
434 struct clk *pclk;
435 int ret;
436
437 pclk = clk_get(dev, "apb_pclk");
438 if (IS_ERR(pclk))
439 return NULL;
440
441 ret = clk_prepare_enable(pclk);
442 if (ret) {
443 clk_put(pclk);
444 return ERR_PTR(ret);
445 }
446 return pclk;
447 }
448
449 #define CORESIGHT_PIDRn(i) (0xFE0 + ((i) * 4))
450
451 static inline u32 coresight_get_pid(struct csdev_access *csa)
452 {
453 u32 i, pid = 0;
454
455 for (i = 0; i < 4; i++)
456 pid |= csdev_access_relaxed_read32(csa, CORESIGHT_PIDRn(i)) << (i * 8);
457
458 return pid;
459 }
460
461 static inline u64 csdev_access_relaxed_read_pair(struct csdev_access *csa,
462 u32 lo_offset, u32 hi_offset)
463 {
464 if (likely(csa->io_mem)) {
465 return readl_relaxed(csa->base + lo_offset) |
466 ((u64)readl_relaxed(csa->base + hi_offset) << 32);
467 }
468
469 return csa->read(lo_offset, true, false) | (csa->read(hi_offset, true, false) << 32);
470 }
471
472 static inline void csdev_access_relaxed_write_pair(struct csdev_access *csa, u64 val,
473 u32 lo_offset, u32 hi_offset)
474 {
475 if (likely(csa->io_mem)) {
476 writel_relaxed((u32)val, csa->base + lo_offset);
477 writel_relaxed((u32)(val >> 32), csa->base + hi_offset);
478 } else {
479 csa->write((u32)val, lo_offset, true, false);
480 csa->write((u32)(val >> 32), hi_offset, true, false);
481 }
482 }
483
484 static inline u32 csdev_access_read32(struct csdev_access *csa, u32 offset)
485 {
486 if (likely(csa->io_mem))
487 return readl(csa->base + offset);
488
489 return csa->read(offset, false, false);
490 }
491
492 static inline void csdev_access_relaxed_write32(struct csdev_access *csa,
493 u32 val, u32 offset)
494 {
495 if (likely(csa->io_mem))
496 writel_relaxed(val, csa->base + offset);
497 else
498 csa->write(val, offset, true, false);
499 }
500
501 static inline void csdev_access_write32(struct csdev_access *csa, u32 val, u32 offset)
502 {
503 if (likely(csa->io_mem))
504 writel(val, csa->base + offset);
505 else
506 csa->write(val, offset, false, false);
507 }
508
509 #ifdef CONFIG_64BIT
510
511 static inline u64 csdev_access_relaxed_read64(struct csdev_access *csa,
512 u32 offset)
513 {
514 if (likely(csa->io_mem))
515 return readq_relaxed(csa->base + offset);
516
517 return csa->read(offset, true, true);
518 }
519
520 static inline u64 csdev_access_read64(struct csdev_access *csa, u32 offset)
521 {
522 if (likely(csa->io_mem))
523 return readq(csa->base + offset);
524
525 return csa->read(offset, false, true);
526 }
527
528 static inline void csdev_access_relaxed_write64(struct csdev_access *csa,
529 u64 val, u32 offset)
530 {
531 if (likely(csa->io_mem))
532 writeq_relaxed(val, csa->base + offset);
533 else
534 csa->write(val, offset, true, true);
535 }
536
537 static inline void csdev_access_write64(struct csdev_access *csa, u64 val, u32 offset)
538 {
539 if (likely(csa->io_mem))
540 writeq(val, csa->base + offset);
541 else
542 csa->write(val, offset, false, true);
543 }
544
545 #else /* !CONFIG_64BIT */
546
547 static inline u64 csdev_access_relaxed_read64(struct csdev_access *csa,
548 u32 offset)
549 {
550 WARN_ON(1);
551 return 0;
552 }
553
554 static inline u64 csdev_access_read64(struct csdev_access *csa, u32 offset)
555 {
556 WARN_ON(1);
557 return 0;
558 }
559
560 static inline void csdev_access_relaxed_write64(struct csdev_access *csa,
561 u64 val, u32 offset)
562 {
563 WARN_ON(1);
564 }
565
566 static inline void csdev_access_write64(struct csdev_access *csa, u64 val, u32 offset)
567 {
568 WARN_ON(1);
569 }
570 #endif /* CONFIG_64BIT */
571
572 static inline bool coresight_is_percpu_source(struct coresight_device *csdev)
573 {
574 return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SOURCE) &&
575 (csdev->subtype.source_subtype == CORESIGHT_DEV_SUBTYPE_SOURCE_PROC);
576 }
577
578 static inline bool coresight_is_percpu_sink(struct coresight_device *csdev)
579 {
580 return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SINK) &&
581 (csdev->subtype.sink_subtype == CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM);
582 }
583
584 /*
585 * Atomically try to take the device and set a new mode. Returns true on
586 * success, false if the device is already taken by someone else.
587 */
588 static inline bool coresight_take_mode(struct coresight_device *csdev,
589 enum cs_mode new_mode)
590 {
591 return local_cmpxchg(&csdev->mode, CS_MODE_DISABLED, new_mode) ==
592 CS_MODE_DISABLED;
593 }
594
595 static inline enum cs_mode coresight_get_mode(struct coresight_device *csdev)
596 {
597 return local_read(&csdev->mode);
598 }
599
600 static inline void coresight_set_mode(struct coresight_device *csdev,
601 enum cs_mode new_mode)
602 {
603 enum cs_mode current_mode = coresight_get_mode(csdev);
604
605 /*
606 * Changing to a new mode must be done from an already disabled state
607 * unless it's synchronized with coresight_take_mode(). Otherwise the
608 * device is already in use and signifies a locking issue.
609 */
610 WARN(new_mode != CS_MODE_DISABLED && current_mode != CS_MODE_DISABLED &&
611 current_mode != new_mode, "Device already in use\n");
612
613 local_set(&csdev->mode, new_mode);
614 }
615
616 extern struct coresight_device *
617 coresight_register(struct coresight_desc *desc);
618 extern void coresight_unregister(struct coresight_device *csdev);
619 extern int coresight_enable_sysfs(struct coresight_device *csdev);
620 extern void coresight_disable_sysfs(struct coresight_device *csdev);
621 extern int coresight_timeout(struct csdev_access *csa, u32 offset,
622 int position, int value);
623
624 extern int coresight_claim_device(struct coresight_device *csdev);
625 extern int coresight_claim_device_unlocked(struct coresight_device *csdev);
626
627 extern void coresight_disclaim_device(struct coresight_device *csdev);
628 extern void coresight_disclaim_device_unlocked(struct coresight_device *csdev);
629 extern char *coresight_alloc_device_name(struct coresight_dev_list *devs,
630 struct device *dev);
631
632 extern bool coresight_loses_context_with_cpu(struct device *dev);
633
634 u32 coresight_relaxed_read32(struct coresight_device *csdev, u32 offset);
635 u32 coresight_read32(struct coresight_device *csdev, u32 offset);
636 void coresight_write32(struct coresight_device *csdev, u32 val, u32 offset);
637 void coresight_relaxed_write32(struct coresight_device *csdev,
638 u32 val, u32 offset);
639 u64 coresight_relaxed_read64(struct coresight_device *csdev, u32 offset);
640 u64 coresight_read64(struct coresight_device *csdev, u32 offset);
641 void coresight_relaxed_write64(struct coresight_device *csdev,
642 u64 val, u32 offset);
643 void coresight_write64(struct coresight_device *csdev, u64 val, u32 offset);
644
645 extern int coresight_get_cpu(struct device *dev);
646
647 struct coresight_platform_data *coresight_get_platform_data(struct device *dev);
648 struct coresight_connection *
649 coresight_add_out_conn(struct device *dev,
650 struct coresight_platform_data *pdata,
651 const struct coresight_connection *new_conn);
652 int coresight_add_in_conn(struct coresight_connection *conn);
653 struct coresight_device *
654 coresight_find_input_type(struct coresight_platform_data *pdata,
655 enum coresight_dev_type type,
656 union coresight_dev_subtype subtype);
657 struct coresight_device *
658 coresight_find_output_type(struct coresight_platform_data *pdata,
659 enum coresight_dev_type type,
660 union coresight_dev_subtype subtype);
661
662 int coresight_init_driver(const char *drv, struct amba_driver *amba_drv,
663 struct platform_driver *pdev_drv);
664
665 void coresight_remove_driver(struct amba_driver *amba_drv,
666 struct platform_driver *pdev_drv);
667 #endif /* _LINUX_COREISGHT_H */
668
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