1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com
4 */
5
6 #ifndef K3_PSIL_H_
7 #define K3_PSIL_H_
8
9 #include <linux/types.h>
10
11 #define K3_PSIL_DST_THREAD_ID_OFFSET 0x8000
12
13 struct device;
14
15 /**
16 * enum udma_tp_level - Channel Throughput Levels
17 * @UDMA_TP_NORMAL: Normal channel
18 * @UDMA_TP_HIGH: High Throughput channel
19 * @UDMA_TP_ULTRAHIGH: Ultra High Throughput channel
20 */
21 enum udma_tp_level {
22 UDMA_TP_NORMAL = 0,
23 UDMA_TP_HIGH,
24 UDMA_TP_ULTRAHIGH,
25 UDMA_TP_LAST,
26 };
27
28 /**
29 * enum psil_endpoint_type - PSI-L Endpoint type
30 * @PSIL_EP_NATIVE: Normal channel
31 * @PSIL_EP_PDMA_XY: XY mode PDMA
32 * @PSIL_EP_PDMA_MCAN: MCAN mode PDMA
33 * @PSIL_EP_PDMA_AASRC: AASRC mode PDMA
34 */
35 enum psil_endpoint_type {
36 PSIL_EP_NATIVE = 0,
37 PSIL_EP_PDMA_XY,
38 PSIL_EP_PDMA_MCAN,
39 PSIL_EP_PDMA_AASRC,
40 };
41
42 /**
43 * struct psil_endpoint_config - PSI-L Endpoint configuration
44 * @ep_type: PSI-L endpoint type
45 * @channel_tpl: Desired throughput level for the channel
46 * @pkt_mode: If set, the channel must be in Packet mode, otherwise in
47 * TR mode
48 * @notdpkt: TDCM must be suppressed on the TX channel
49 * @needs_epib: Endpoint needs EPIB
50 * @pdma_acc32: ACC32 must be enabled on the PDMA side
51 * @pdma_burst: BURST must be enabled on the PDMA side
52 * @psd_size: If set, PSdata is used by the endpoint
53 * @mapped_channel_id: PKTDMA thread to channel mapping for mapped channels.
54 * The thread must be serviced by the specified channel if
55 * mapped_channel_id is >= 0 in case of PKTDMA
56 * @flow_start: PKDMA flow range start of mapped channel. Unmapped
57 * channels use flow_id == chan_id
58 * @flow_num: PKDMA flow count of mapped channel. Unmapped channels
59 * use flow_id == chan_id
60 * @default_flow_id: PKDMA default (r)flow index of mapped channel.
61 * Must be within the flow range of the mapped channel.
62 */
63 struct psil_endpoint_config {
64 enum psil_endpoint_type ep_type;
65 enum udma_tp_level channel_tpl;
66
67 unsigned pkt_mode:1;
68 unsigned notdpkt:1;
69 unsigned needs_epib:1;
70 /* PDMA properties, valid for PSIL_EP_PDMA_* */
71 unsigned pdma_acc32:1;
72 unsigned pdma_burst:1;
73
74 u32 psd_size;
75 /* PKDMA mapped channel */
76 s16 mapped_channel_id;
77 /* PKTDMA tflow and rflow ranges for mapped channel */
78 u16 flow_start;
79 u16 flow_num;
80 s16 default_flow_id;
81 };
82
83 int psil_set_new_ep_config(struct device *dev, const char *name,
84 struct psil_endpoint_config *ep_config);
85
86 #endif /* K3_PSIL_H_ */
87
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