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Linux/include/linux/iio/adc/ad_sigma_delta.h

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  1 /* SPDX-License-Identifier: GPL-2.0-only */
  2 /*
  3  * Support code for Analog Devices Sigma-Delta ADCs
  4  *
  5  * Copyright 2012 Analog Devices Inc.
  6  *  Author: Lars-Peter Clausen <lars@metafoo.de>
  7  */
  8 #ifndef __AD_SIGMA_DELTA_H__
  9 #define __AD_SIGMA_DELTA_H__
 10 
 11 #include <linux/iio/iio.h>
 12 
 13 enum ad_sigma_delta_mode {
 14         AD_SD_MODE_CONTINUOUS = 0,
 15         AD_SD_MODE_SINGLE = 1,
 16         AD_SD_MODE_IDLE = 2,
 17         AD_SD_MODE_POWERDOWN = 3,
 18 };
 19 
 20 /**
 21  * struct ad_sigma_delta_calib_data - Calibration data for Sigma Delta devices
 22  * @mode: Calibration mode.
 23  * @channel: Calibration channel.
 24  */
 25 struct ad_sd_calib_data {
 26         unsigned int mode;
 27         unsigned int channel;
 28 };
 29 
 30 struct ad_sigma_delta;
 31 struct device;
 32 struct iio_dev;
 33 
 34 /**
 35  * struct ad_sigma_delta_info - Sigma Delta driver specific callbacks and options
 36  * @set_channel: Will be called to select the current channel, may be NULL.
 37  * @append_status: Will be called to enable status append at the end of the sample, may be NULL.
 38  * @set_mode: Will be called to select the current mode, may be NULL.
 39  * @disable_all: Will be called to disable all channels, may be NULL.
 40  * @disable_one: Will be called to disable a single channel after
 41  *              ad_sigma_delta_single_conversion(), may be NULL.
 42  *              Usage of this callback expects iio_chan_spec.address to contain
 43  *              the value required for the driver to identify the channel.
 44  * @postprocess_sample: Is called for each sampled data word, can be used to
 45  *              modify or drop the sample data, it, may be NULL.
 46  * @has_registers: true if the device has writable and readable registers, false
 47  *              if there is just one read-only sample data shift register.
 48  * @addr_shift: Shift of the register address in the communications register.
 49  * @read_mask: Mask for the communications register having the read bit set.
 50  * @status_ch_mask: Mask for the channel number stored in status register.
 51  * @data_reg: Address of the data register, if 0 the default address of 0x3 will
 52  *   be used.
 53  * @irq_flags: flags for the interrupt used by the triggered buffer
 54  * @num_slots: Number of sequencer slots
 55  * @irq_line: IRQ for reading conversions. If 0, spi->irq will be used
 56  */
 57 struct ad_sigma_delta_info {
 58         int (*set_channel)(struct ad_sigma_delta *, unsigned int channel);
 59         int (*append_status)(struct ad_sigma_delta *, bool append);
 60         int (*set_mode)(struct ad_sigma_delta *, enum ad_sigma_delta_mode mode);
 61         int (*disable_all)(struct ad_sigma_delta *);
 62         int (*disable_one)(struct ad_sigma_delta *, unsigned int chan);
 63         int (*postprocess_sample)(struct ad_sigma_delta *, unsigned int raw_sample);
 64         bool has_registers;
 65         unsigned int addr_shift;
 66         unsigned int read_mask;
 67         unsigned int status_ch_mask;
 68         unsigned int data_reg;
 69         unsigned long irq_flags;
 70         unsigned int num_slots;
 71         int irq_line;
 72 };
 73 
 74 /**
 75  * struct ad_sigma_delta - Sigma Delta device struct
 76  * @spi: The spi device associated with the Sigma Delta device.
 77  * @trig: The IIO trigger associated with the Sigma Delta device.
 78  *
 79  * Most of the fields are private to the sigma delta library code and should not
 80  * be accessed by individual drivers.
 81  */
 82 struct ad_sigma_delta {
 83         struct spi_device       *spi;
 84         struct iio_trigger      *trig;
 85 
 86 /* private: */
 87         struct completion       completion;
 88         bool                    irq_dis;
 89 
 90         bool                    bus_locked;
 91         bool                    keep_cs_asserted;
 92 
 93         uint8_t                 comm;
 94 
 95         const struct ad_sigma_delta_info *info;
 96         unsigned int            active_slots;
 97         unsigned int            current_slot;
 98         unsigned int            num_slots;
 99         int             irq_line;
100         bool                    status_appended;
101         /* map slots to channels in order to know what to expect from devices */
102         unsigned int            *slots;
103         uint8_t                 *samples_buf;
104 
105         /*
106          * DMA (thus cache coherency maintenance) requires the
107          * transfer buffers to live in their own cache lines.
108          * 'tx_buf' is up to 32 bits.
109          * 'rx_buf' is up to 32 bits per sample + 64 bit timestamp,
110          * rounded to 16 bytes to take into account padding.
111          */
112         uint8_t                         tx_buf[4] __aligned(IIO_DMA_MINALIGN);
113         uint8_t                         rx_buf[16] __aligned(8);
114 };
115 
116 static inline int ad_sigma_delta_set_channel(struct ad_sigma_delta *sd,
117         unsigned int channel)
118 {
119         if (sd->info->set_channel)
120                 return sd->info->set_channel(sd, channel);
121 
122         return 0;
123 }
124 
125 static inline int ad_sigma_delta_append_status(struct ad_sigma_delta *sd, bool append)
126 {
127         int ret;
128 
129         if (sd->info->append_status) {
130                 ret = sd->info->append_status(sd, append);
131                 if (ret < 0)
132                         return ret;
133 
134                 sd->status_appended = append;
135         }
136 
137         return 0;
138 }
139 
140 static inline int ad_sigma_delta_disable_all(struct ad_sigma_delta *sd)
141 {
142         if (sd->info->disable_all)
143                 return sd->info->disable_all(sd);
144 
145         return 0;
146 }
147 
148 static inline int ad_sigma_delta_disable_one(struct ad_sigma_delta *sd,
149                                              unsigned int chan)
150 {
151         if (sd->info->disable_one)
152                 return sd->info->disable_one(sd, chan);
153 
154         return 0;
155 }
156 
157 static inline int ad_sigma_delta_set_mode(struct ad_sigma_delta *sd,
158         unsigned int mode)
159 {
160         if (sd->info->set_mode)
161                 return sd->info->set_mode(sd, mode);
162 
163         return 0;
164 }
165 
166 static inline int ad_sigma_delta_postprocess_sample(struct ad_sigma_delta *sd,
167         unsigned int raw_sample)
168 {
169         if (sd->info->postprocess_sample)
170                 return sd->info->postprocess_sample(sd, raw_sample);
171 
172         return 0;
173 }
174 
175 void ad_sd_set_comm(struct ad_sigma_delta *sigma_delta, uint8_t comm);
176 int ad_sd_write_reg(struct ad_sigma_delta *sigma_delta, unsigned int reg,
177         unsigned int size, unsigned int val);
178 int ad_sd_read_reg(struct ad_sigma_delta *sigma_delta, unsigned int reg,
179         unsigned int size, unsigned int *val);
180 
181 int ad_sd_reset(struct ad_sigma_delta *sigma_delta,
182         unsigned int reset_length);
183 
184 int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev,
185         const struct iio_chan_spec *chan, int *val);
186 int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta,
187         unsigned int mode, unsigned int channel);
188 int ad_sd_calibrate_all(struct ad_sigma_delta *sigma_delta,
189         const struct ad_sd_calib_data *cd, unsigned int n);
190 int ad_sd_init(struct ad_sigma_delta *sigma_delta, struct iio_dev *indio_dev,
191         struct spi_device *spi, const struct ad_sigma_delta_info *info);
192 
193 int devm_ad_sd_setup_buffer_and_trigger(struct device *dev, struct iio_dev *indio_dev);
194 
195 int ad_sd_validate_trigger(struct iio_dev *indio_dev, struct iio_trigger *trig);
196 
197 #endif
198 

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