1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __IO_PGTABLE_H
3 #define __IO_PGTABLE_H
4
5 #include <linux/bitops.h>
6 #include <linux/iommu.h>
7
8 /*
9 * Public API for use by IOMMU drivers
10 */
11 enum io_pgtable_fmt {
12 ARM_32_LPAE_S1,
13 ARM_32_LPAE_S2,
14 ARM_64_LPAE_S1,
15 ARM_64_LPAE_S2,
16 ARM_V7S,
17 ARM_MALI_LPAE,
18 AMD_IOMMU_V1,
19 AMD_IOMMU_V2,
20 APPLE_DART,
21 APPLE_DART2,
22 IO_PGTABLE_NUM_FMTS,
23 };
24
25 /**
26 * struct iommu_flush_ops - IOMMU callbacks for TLB and page table management.
27 *
28 * @tlb_flush_all: Synchronously invalidate the entire TLB context.
29 * @tlb_flush_walk: Synchronously invalidate all intermediate TLB state
30 * (sometimes referred to as the "walk cache") for a virtual
31 * address range.
32 * @tlb_add_page: Optional callback to queue up leaf TLB invalidation for a
33 * single page. IOMMUs that cannot batch TLB invalidation
34 * operations efficiently will typically issue them here, but
35 * others may decide to update the iommu_iotlb_gather structure
36 * and defer the invalidation until iommu_iotlb_sync() instead.
37 *
38 * Note that these can all be called in atomic context and must therefore
39 * not block.
40 */
41 struct iommu_flush_ops {
42 void (*tlb_flush_all)(void *cookie);
43 void (*tlb_flush_walk)(unsigned long iova, size_t size, size_t granule,
44 void *cookie);
45 void (*tlb_add_page)(struct iommu_iotlb_gather *gather,
46 unsigned long iova, size_t granule, void *cookie);
47 };
48
49 /**
50 * struct io_pgtable_cfg - Configuration data for a set of page tables.
51 *
52 * @quirks: A bitmap of hardware quirks that require some special
53 * action by the low-level page table allocator.
54 * @pgsize_bitmap: A bitmap of page sizes supported by this set of page
55 * tables.
56 * @ias: Input address (iova) size, in bits.
57 * @oas: Output address (paddr) size, in bits.
58 * @coherent_walk A flag to indicate whether or not page table walks made
59 * by the IOMMU are coherent with the CPU caches.
60 * @tlb: TLB management callbacks for this set of tables.
61 * @iommu_dev: The device representing the DMA configuration for the
62 * page table walker.
63 */
64 struct io_pgtable_cfg {
65 /*
66 * IO_PGTABLE_QUIRK_ARM_NS: (ARM formats) Set NS and NSTABLE bits in
67 * stage 1 PTEs, for hardware which insists on validating them
68 * even in non-secure state where they should normally be ignored.
69 *
70 * IO_PGTABLE_QUIRK_NO_PERMS: Ignore the IOMMU_READ, IOMMU_WRITE and
71 * IOMMU_NOEXEC flags and map everything with full access, for
72 * hardware which does not implement the permissions of a given
73 * format, and/or requires some format-specific default value.
74 *
75 * IO_PGTABLE_QUIRK_ARM_MTK_EXT: (ARM v7s format) MediaTek IOMMUs extend
76 * to support up to 35 bits PA where the bit32, bit33 and bit34 are
77 * encoded in the bit9, bit4 and bit5 of the PTE respectively.
78 *
79 * IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT: (ARM v7s format) MediaTek IOMMUs
80 * extend the translation table base support up to 35 bits PA, the
81 * encoding format is same with IO_PGTABLE_QUIRK_ARM_MTK_EXT.
82 *
83 * IO_PGTABLE_QUIRK_ARM_TTBR1: (ARM LPAE format) Configure the table
84 * for use in the upper half of a split address space.
85 *
86 * IO_PGTABLE_QUIRK_ARM_OUTER_WBWA: Override the outer-cacheability
87 * attributes set in the TCR for a non-coherent page-table walker.
88 *
89 * IO_PGTABLE_QUIRK_ARM_HD: Enables dirty tracking in stage 1 pagetable.
90 */
91 #define IO_PGTABLE_QUIRK_ARM_NS BIT(0)
92 #define IO_PGTABLE_QUIRK_NO_PERMS BIT(1)
93 #define IO_PGTABLE_QUIRK_ARM_MTK_EXT BIT(3)
94 #define IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT BIT(4)
95 #define IO_PGTABLE_QUIRK_ARM_TTBR1 BIT(5)
96 #define IO_PGTABLE_QUIRK_ARM_OUTER_WBWA BIT(6)
97 #define IO_PGTABLE_QUIRK_ARM_HD BIT(7)
98 unsigned long quirks;
99 unsigned long pgsize_bitmap;
100 unsigned int ias;
101 unsigned int oas;
102 bool coherent_walk;
103 const struct iommu_flush_ops *tlb;
104 struct device *iommu_dev;
105
106 /**
107 * @alloc: Custom page allocator.
108 *
109 * Optional hook used to allocate page tables. If this function is NULL,
110 * @free must be NULL too.
111 *
112 * Memory returned should be zeroed and suitable for dma_map_single() and
113 * virt_to_phys().
114 *
115 * Not all formats support custom page allocators. Before considering
116 * passing a non-NULL value, make sure the chosen page format supports
117 * this feature.
118 */
119 void *(*alloc)(void *cookie, size_t size, gfp_t gfp);
120
121 /**
122 * @free: Custom page de-allocator.
123 *
124 * Optional hook used to free page tables allocated with the @alloc
125 * hook. Must be non-NULL if @alloc is not NULL, must be NULL
126 * otherwise.
127 */
128 void (*free)(void *cookie, void *pages, size_t size);
129
130 /* Low-level data specific to the table format */
131 union {
132 struct {
133 u64 ttbr;
134 struct {
135 u32 ips:3;
136 u32 tg:2;
137 u32 sh:2;
138 u32 orgn:2;
139 u32 irgn:2;
140 u32 tsz:6;
141 } tcr;
142 u64 mair;
143 } arm_lpae_s1_cfg;
144
145 struct {
146 u64 vttbr;
147 struct {
148 u32 ps:3;
149 u32 tg:2;
150 u32 sh:2;
151 u32 orgn:2;
152 u32 irgn:2;
153 u32 sl:2;
154 u32 tsz:6;
155 } vtcr;
156 } arm_lpae_s2_cfg;
157
158 struct {
159 u32 ttbr;
160 u32 tcr;
161 u32 nmrr;
162 u32 prrr;
163 } arm_v7s_cfg;
164
165 struct {
166 u64 transtab;
167 u64 memattr;
168 } arm_mali_lpae_cfg;
169
170 struct {
171 u64 ttbr[4];
172 u32 n_ttbrs;
173 } apple_dart_cfg;
174 };
175 };
176
177 /**
178 * struct io_pgtable_ops - Page table manipulation API for IOMMU drivers.
179 *
180 * @map_pages: Map a physically contiguous range of pages of the same size.
181 * @unmap_pages: Unmap a range of virtually contiguous pages of the same size.
182 * @iova_to_phys: Translate iova to physical address.
183 *
184 * These functions map directly onto the iommu_ops member functions with
185 * the same names.
186 */
187 struct io_pgtable_ops {
188 int (*map_pages)(struct io_pgtable_ops *ops, unsigned long iova,
189 phys_addr_t paddr, size_t pgsize, size_t pgcount,
190 int prot, gfp_t gfp, size_t *mapped);
191 size_t (*unmap_pages)(struct io_pgtable_ops *ops, unsigned long iova,
192 size_t pgsize, size_t pgcount,
193 struct iommu_iotlb_gather *gather);
194 phys_addr_t (*iova_to_phys)(struct io_pgtable_ops *ops,
195 unsigned long iova);
196 int (*read_and_clear_dirty)(struct io_pgtable_ops *ops,
197 unsigned long iova, size_t size,
198 unsigned long flags,
199 struct iommu_dirty_bitmap *dirty);
200 };
201
202 /**
203 * alloc_io_pgtable_ops() - Allocate a page table allocator for use by an IOMMU.
204 *
205 * @fmt: The page table format.
206 * @cfg: The page table configuration. This will be modified to represent
207 * the configuration actually provided by the allocator (e.g. the
208 * pgsize_bitmap may be restricted).
209 * @cookie: An opaque token provided by the IOMMU driver and passed back to
210 * the callback routines in cfg->tlb.
211 */
212 struct io_pgtable_ops *alloc_io_pgtable_ops(enum io_pgtable_fmt fmt,
213 struct io_pgtable_cfg *cfg,
214 void *cookie);
215
216 /**
217 * free_io_pgtable_ops() - Free an io_pgtable_ops structure. The caller
218 * *must* ensure that the page table is no longer
219 * live, but the TLB can be dirty.
220 *
221 * @ops: The ops returned from alloc_io_pgtable_ops.
222 */
223 void free_io_pgtable_ops(struct io_pgtable_ops *ops);
224
225
226 /*
227 * Internal structures for page table allocator implementations.
228 */
229
230 /**
231 * struct io_pgtable - Internal structure describing a set of page tables.
232 *
233 * @fmt: The page table format.
234 * @cookie: An opaque token provided by the IOMMU driver and passed back to
235 * any callback routines.
236 * @cfg: A copy of the page table configuration.
237 * @ops: The page table operations in use for this set of page tables.
238 */
239 struct io_pgtable {
240 enum io_pgtable_fmt fmt;
241 void *cookie;
242 struct io_pgtable_cfg cfg;
243 struct io_pgtable_ops ops;
244 };
245
246 #define io_pgtable_ops_to_pgtable(x) container_of((x), struct io_pgtable, ops)
247
248 static inline void io_pgtable_tlb_flush_all(struct io_pgtable *iop)
249 {
250 if (iop->cfg.tlb && iop->cfg.tlb->tlb_flush_all)
251 iop->cfg.tlb->tlb_flush_all(iop->cookie);
252 }
253
254 static inline void
255 io_pgtable_tlb_flush_walk(struct io_pgtable *iop, unsigned long iova,
256 size_t size, size_t granule)
257 {
258 if (iop->cfg.tlb && iop->cfg.tlb->tlb_flush_walk)
259 iop->cfg.tlb->tlb_flush_walk(iova, size, granule, iop->cookie);
260 }
261
262 static inline void
263 io_pgtable_tlb_add_page(struct io_pgtable *iop,
264 struct iommu_iotlb_gather * gather, unsigned long iova,
265 size_t granule)
266 {
267 if (iop->cfg.tlb && iop->cfg.tlb->tlb_add_page)
268 iop->cfg.tlb->tlb_add_page(gather, iova, granule, iop->cookie);
269 }
270
271 /**
272 * enum io_pgtable_caps - IO page table backend capabilities.
273 */
274 enum io_pgtable_caps {
275 /** @IO_PGTABLE_CAP_CUSTOM_ALLOCATOR: Backend accepts custom page table allocators. */
276 IO_PGTABLE_CAP_CUSTOM_ALLOCATOR = BIT(0),
277 };
278
279 /**
280 * struct io_pgtable_init_fns - Alloc/free a set of page tables for a
281 * particular format.
282 *
283 * @alloc: Allocate a set of page tables described by cfg.
284 * @free: Free the page tables associated with iop.
285 * @caps: Combination of @io_pgtable_caps flags encoding the backend capabilities.
286 */
287 struct io_pgtable_init_fns {
288 struct io_pgtable *(*alloc)(struct io_pgtable_cfg *cfg, void *cookie);
289 void (*free)(struct io_pgtable *iop);
290 u32 caps;
291 };
292
293 extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s1_init_fns;
294 extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s2_init_fns;
295 extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s1_init_fns;
296 extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s2_init_fns;
297 extern struct io_pgtable_init_fns io_pgtable_arm_v7s_init_fns;
298 extern struct io_pgtable_init_fns io_pgtable_arm_mali_lpae_init_fns;
299 extern struct io_pgtable_init_fns io_pgtable_amd_iommu_v1_init_fns;
300 extern struct io_pgtable_init_fns io_pgtable_amd_iommu_v2_init_fns;
301 extern struct io_pgtable_init_fns io_pgtable_apple_dart_init_fns;
302
303 #endif /* __IO_PGTABLE_H */
304
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