1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Functions and registers to access AXP20X power management chip.
4 *
5 * Copyright (C) 2013, Carlo Caione <carlo@caione.org>
6 */
7
8 #ifndef __LINUX_MFD_AXP20X_H
9 #define __LINUX_MFD_AXP20X_H
10
11 #include <linux/regmap.h>
12
13 enum axp20x_variants {
14 AXP152_ID = 0,
15 AXP192_ID,
16 AXP202_ID,
17 AXP209_ID,
18 AXP221_ID,
19 AXP223_ID,
20 AXP288_ID,
21 AXP313A_ID,
22 AXP717_ID,
23 AXP803_ID,
24 AXP806_ID,
25 AXP809_ID,
26 AXP813_ID,
27 AXP15060_ID,
28 NR_AXP20X_VARIANTS,
29 };
30
31 #define AXP192_DATACACHE(m) (0x06 + (m))
32 #define AXP20X_DATACACHE(m) (0x04 + (m))
33
34 /* Power supply */
35 #define AXP152_PWR_OP_MODE 0x01
36 #define AXP152_LDO3456_DC1234_CTRL 0x12
37 #define AXP152_ALDO_OP_MODE 0x13
38 #define AXP152_LDO0_CTRL 0x15
39 #define AXP152_DCDC2_V_OUT 0x23
40 #define AXP152_DCDC2_V_RAMP 0x25
41 #define AXP152_DCDC1_V_OUT 0x26
42 #define AXP152_DCDC3_V_OUT 0x27
43 #define AXP152_ALDO12_V_OUT 0x28
44 #define AXP152_DLDO1_V_OUT 0x29
45 #define AXP152_DLDO2_V_OUT 0x2a
46 #define AXP152_DCDC4_V_OUT 0x2b
47 #define AXP152_V_OFF 0x31
48 #define AXP152_OFF_CTRL 0x32
49 #define AXP152_PEK_KEY 0x36
50 #define AXP152_DCDC_FREQ 0x37
51 #define AXP152_DCDC_MODE 0x80
52
53 #define AXP192_USB_OTG_STATUS 0x04
54 #define AXP192_PWR_OUT_CTRL 0x12
55 #define AXP192_DCDC2_V_OUT 0x23
56 #define AXP192_DCDC1_V_OUT 0x26
57 #define AXP192_DCDC3_V_OUT 0x27
58 #define AXP192_LDO2_3_V_OUT 0x28
59
60 #define AXP20X_PWR_INPUT_STATUS 0x00
61 #define AXP20X_PWR_OP_MODE 0x01
62 #define AXP20X_USB_OTG_STATUS 0x02
63 #define AXP20X_PWR_OUT_CTRL 0x12
64 #define AXP20X_DCDC2_V_OUT 0x23
65 #define AXP20X_DCDC2_LDO3_V_RAMP 0x25
66 #define AXP20X_DCDC3_V_OUT 0x27
67 #define AXP20X_LDO24_V_OUT 0x28
68 #define AXP20X_LDO3_V_OUT 0x29
69 #define AXP20X_VBUS_IPSOUT_MGMT 0x30
70 #define AXP20X_V_OFF 0x31
71 #define AXP20X_OFF_CTRL 0x32
72 #define AXP20X_CHRG_CTRL1 0x33
73 #define AXP20X_CHRG_CTRL2 0x34
74 #define AXP20X_CHRG_BAK_CTRL 0x35
75 #define AXP20X_PEK_KEY 0x36
76 #define AXP20X_DCDC_FREQ 0x37
77 #define AXP20X_V_LTF_CHRG 0x38
78 #define AXP20X_V_HTF_CHRG 0x39
79 #define AXP20X_APS_WARN_L1 0x3a
80 #define AXP20X_APS_WARN_L2 0x3b
81 #define AXP20X_V_LTF_DISCHRG 0x3c
82 #define AXP20X_V_HTF_DISCHRG 0x3d
83
84 #define AXP22X_PWR_OUT_CTRL1 0x10
85 #define AXP22X_PWR_OUT_CTRL2 0x12
86 #define AXP22X_PWR_OUT_CTRL3 0x13
87 #define AXP22X_DLDO1_V_OUT 0x15
88 #define AXP22X_DLDO2_V_OUT 0x16
89 #define AXP22X_DLDO3_V_OUT 0x17
90 #define AXP22X_DLDO4_V_OUT 0x18
91 #define AXP22X_ELDO1_V_OUT 0x19
92 #define AXP22X_ELDO2_V_OUT 0x1a
93 #define AXP22X_ELDO3_V_OUT 0x1b
94 #define AXP22X_DC5LDO_V_OUT 0x1c
95 #define AXP22X_DCDC1_V_OUT 0x21
96 #define AXP22X_DCDC2_V_OUT 0x22
97 #define AXP22X_DCDC3_V_OUT 0x23
98 #define AXP22X_DCDC4_V_OUT 0x24
99 #define AXP22X_DCDC5_V_OUT 0x25
100 #define AXP22X_DCDC23_V_RAMP_CTRL 0x27
101 #define AXP22X_ALDO1_V_OUT 0x28
102 #define AXP22X_ALDO2_V_OUT 0x29
103 #define AXP22X_ALDO3_V_OUT 0x2a
104 #define AXP22X_CHRG_CTRL3 0x35
105
106 #define AXP313A_ON_INDICATE 0x00
107 #define AXP313A_OUTPUT_CONTROL 0x10
108 #define AXP313A_DCDC1_CONTROL 0x13
109 #define AXP313A_DCDC2_CONTROL 0x14
110 #define AXP313A_DCDC3_CONTROL 0x15
111 #define AXP313A_ALDO1_CONTROL 0x16
112 #define AXP313A_DLDO1_CONTROL 0x17
113 #define AXP313A_SHUTDOWN_CTRL 0x1a
114 #define AXP313A_IRQ_EN 0x20
115 #define AXP313A_IRQ_STATE 0x21
116
117 #define AXP717_ON_INDICATE 0x00
118 #define AXP717_IRQ0_EN 0x40
119 #define AXP717_IRQ1_EN 0x41
120 #define AXP717_IRQ2_EN 0x42
121 #define AXP717_IRQ3_EN 0x43
122 #define AXP717_IRQ4_EN 0x44
123 #define AXP717_IRQ0_STATE 0x48
124 #define AXP717_IRQ1_STATE 0x49
125 #define AXP717_IRQ2_STATE 0x4a
126 #define AXP717_IRQ3_STATE 0x4b
127 #define AXP717_IRQ4_STATE 0x4c
128 #define AXP717_DCDC_OUTPUT_CONTROL 0x80
129 #define AXP717_DCDC1_CONTROL 0x83
130 #define AXP717_DCDC2_CONTROL 0x84
131 #define AXP717_DCDC3_CONTROL 0x85
132 #define AXP717_DCDC4_CONTROL 0x86
133 #define AXP717_LDO0_OUTPUT_CONTROL 0x90
134 #define AXP717_LDO1_OUTPUT_CONTROL 0x91
135 #define AXP717_ALDO1_CONTROL 0x93
136 #define AXP717_ALDO2_CONTROL 0x94
137 #define AXP717_ALDO3_CONTROL 0x95
138 #define AXP717_ALDO4_CONTROL 0x96
139 #define AXP717_BLDO1_CONTROL 0x97
140 #define AXP717_BLDO2_CONTROL 0x98
141 #define AXP717_BLDO3_CONTROL 0x99
142 #define AXP717_BLDO4_CONTROL 0x9a
143 #define AXP717_CLDO1_CONTROL 0x9b
144 #define AXP717_CLDO2_CONTROL 0x9c
145 #define AXP717_CLDO3_CONTROL 0x9d
146 #define AXP717_CLDO4_CONTROL 0x9e
147 #define AXP717_CPUSLDO_CONTROL 0x9f
148
149 #define AXP806_STARTUP_SRC 0x00
150 #define AXP806_CHIP_ID 0x03
151 #define AXP806_PWR_OUT_CTRL1 0x10
152 #define AXP806_PWR_OUT_CTRL2 0x11
153 #define AXP806_DCDCA_V_CTRL 0x12
154 #define AXP806_DCDCB_V_CTRL 0x13
155 #define AXP806_DCDCC_V_CTRL 0x14
156 #define AXP806_DCDCD_V_CTRL 0x15
157 #define AXP806_DCDCE_V_CTRL 0x16
158 #define AXP806_ALDO1_V_CTRL 0x17
159 #define AXP806_ALDO2_V_CTRL 0x18
160 #define AXP806_ALDO3_V_CTRL 0x19
161 #define AXP806_DCDC_MODE_CTRL1 0x1a
162 #define AXP806_DCDC_MODE_CTRL2 0x1b
163 #define AXP806_DCDC_FREQ_CTRL 0x1c
164 #define AXP806_BLDO1_V_CTRL 0x20
165 #define AXP806_BLDO2_V_CTRL 0x21
166 #define AXP806_BLDO3_V_CTRL 0x22
167 #define AXP806_BLDO4_V_CTRL 0x23
168 #define AXP806_CLDO1_V_CTRL 0x24
169 #define AXP806_CLDO2_V_CTRL 0x25
170 #define AXP806_CLDO3_V_CTRL 0x26
171 #define AXP806_VREF_TEMP_WARN_L 0xf3
172 #define AXP806_BUS_ADDR_EXT 0xfe
173 #define AXP806_REG_ADDR_EXT 0xff
174
175 #define AXP803_POLYPHASE_CTRL 0x14
176 #define AXP803_FLDO1_V_OUT 0x1c
177 #define AXP803_FLDO2_V_OUT 0x1d
178 #define AXP803_DCDC1_V_OUT 0x20
179 #define AXP803_DCDC2_V_OUT 0x21
180 #define AXP803_DCDC3_V_OUT 0x22
181 #define AXP803_DCDC4_V_OUT 0x23
182 #define AXP803_DCDC5_V_OUT 0x24
183 #define AXP803_DCDC6_V_OUT 0x25
184 #define AXP803_DCDC_FREQ_CTRL 0x3b
185
186 /* Other DCDC regulator control registers are the same as AXP803 */
187 #define AXP813_DCDC7_V_OUT 0x26
188
189 #define AXP15060_STARTUP_SRC 0x00
190 #define AXP15060_PWR_OUT_CTRL1 0x10
191 #define AXP15060_PWR_OUT_CTRL2 0x11
192 #define AXP15060_PWR_OUT_CTRL3 0x12
193 #define AXP15060_DCDC1_V_CTRL 0x13
194 #define AXP15060_DCDC2_V_CTRL 0x14
195 #define AXP15060_DCDC3_V_CTRL 0x15
196 #define AXP15060_DCDC4_V_CTRL 0x16
197 #define AXP15060_DCDC5_V_CTRL 0x17
198 #define AXP15060_DCDC6_V_CTRL 0x18
199 #define AXP15060_ALDO1_V_CTRL 0x19
200 #define AXP15060_DCDC_MODE_CTRL1 0x1a
201 #define AXP15060_DCDC_MODE_CTRL2 0x1b
202 #define AXP15060_OUTPUT_MONITOR_DISCHARGE 0x1e
203 #define AXP15060_IRQ_PWROK_VOFF 0x1f
204 #define AXP15060_ALDO2_V_CTRL 0x20
205 #define AXP15060_ALDO3_V_CTRL 0x21
206 #define AXP15060_ALDO4_V_CTRL 0x22
207 #define AXP15060_ALDO5_V_CTRL 0x23
208 #define AXP15060_BLDO1_V_CTRL 0x24
209 #define AXP15060_BLDO2_V_CTRL 0x25
210 #define AXP15060_BLDO3_V_CTRL 0x26
211 #define AXP15060_BLDO4_V_CTRL 0x27
212 #define AXP15060_BLDO5_V_CTRL 0x28
213 #define AXP15060_CLDO1_V_CTRL 0x29
214 #define AXP15060_CLDO2_V_CTRL 0x2a
215 #define AXP15060_CLDO3_V_CTRL 0x2b
216 #define AXP15060_CLDO4_V_CTRL 0x2d
217 #define AXP15060_CPUSLDO_V_CTRL 0x2e
218 #define AXP15060_PWR_WAKEUP_CTRL 0x31
219 #define AXP15060_PWR_DISABLE_DOWN_SEQ 0x32
220 #define AXP15060_PEK_KEY 0x36
221
222 /* Interrupt */
223 #define AXP152_IRQ1_EN 0x40
224 #define AXP152_IRQ2_EN 0x41
225 #define AXP152_IRQ3_EN 0x42
226 #define AXP152_IRQ1_STATE 0x48
227 #define AXP152_IRQ2_STATE 0x49
228 #define AXP152_IRQ3_STATE 0x4a
229
230 #define AXP192_IRQ1_EN 0x40
231 #define AXP192_IRQ2_EN 0x41
232 #define AXP192_IRQ3_EN 0x42
233 #define AXP192_IRQ4_EN 0x43
234 #define AXP192_IRQ1_STATE 0x44
235 #define AXP192_IRQ2_STATE 0x45
236 #define AXP192_IRQ3_STATE 0x46
237 #define AXP192_IRQ4_STATE 0x47
238 #define AXP192_IRQ5_EN 0x4a
239 #define AXP192_IRQ5_STATE 0x4d
240
241 #define AXP20X_IRQ1_EN 0x40
242 #define AXP20X_IRQ2_EN 0x41
243 #define AXP20X_IRQ3_EN 0x42
244 #define AXP20X_IRQ4_EN 0x43
245 #define AXP20X_IRQ5_EN 0x44
246 #define AXP20X_IRQ6_EN 0x45
247 #define AXP20X_IRQ1_STATE 0x48
248 #define AXP20X_IRQ2_STATE 0x49
249 #define AXP20X_IRQ3_STATE 0x4a
250 #define AXP20X_IRQ4_STATE 0x4b
251 #define AXP20X_IRQ5_STATE 0x4c
252 #define AXP20X_IRQ6_STATE 0x4d
253
254 #define AXP15060_IRQ1_EN 0x40
255 #define AXP15060_IRQ2_EN 0x41
256 #define AXP15060_IRQ1_STATE 0x48
257 #define AXP15060_IRQ2_STATE 0x49
258
259 /* ADC */
260 #define AXP192_GPIO2_V_ADC_H 0x68
261 #define AXP192_GPIO2_V_ADC_L 0x69
262 #define AXP192_GPIO3_V_ADC_H 0x6a
263 #define AXP192_GPIO3_V_ADC_L 0x6b
264
265 #define AXP20X_ACIN_V_ADC_H 0x56
266 #define AXP20X_ACIN_V_ADC_L 0x57
267 #define AXP20X_ACIN_I_ADC_H 0x58
268 #define AXP20X_ACIN_I_ADC_L 0x59
269 #define AXP20X_VBUS_V_ADC_H 0x5a
270 #define AXP20X_VBUS_V_ADC_L 0x5b
271 #define AXP20X_VBUS_I_ADC_H 0x5c
272 #define AXP20X_VBUS_I_ADC_L 0x5d
273 #define AXP20X_TEMP_ADC_H 0x5e
274 #define AXP20X_TEMP_ADC_L 0x5f
275 #define AXP20X_TS_IN_H 0x62
276 #define AXP20X_TS_IN_L 0x63
277 #define AXP20X_GPIO0_V_ADC_H 0x64
278 #define AXP20X_GPIO0_V_ADC_L 0x65
279 #define AXP20X_GPIO1_V_ADC_H 0x66
280 #define AXP20X_GPIO1_V_ADC_L 0x67
281 #define AXP20X_PWR_BATT_H 0x70
282 #define AXP20X_PWR_BATT_M 0x71
283 #define AXP20X_PWR_BATT_L 0x72
284 #define AXP20X_BATT_V_H 0x78
285 #define AXP20X_BATT_V_L 0x79
286 #define AXP20X_BATT_CHRG_I_H 0x7a
287 #define AXP20X_BATT_CHRG_I_L 0x7b
288 #define AXP20X_BATT_DISCHRG_I_H 0x7c
289 #define AXP20X_BATT_DISCHRG_I_L 0x7d
290 #define AXP20X_IPSOUT_V_HIGH_H 0x7e
291 #define AXP20X_IPSOUT_V_HIGH_L 0x7f
292
293 /* Power supply */
294 #define AXP192_GPIO30_IN_RANGE 0x85
295
296 #define AXP20X_DCDC_MODE 0x80
297 #define AXP20X_ADC_EN1 0x82
298 #define AXP20X_ADC_EN2 0x83
299 #define AXP20X_ADC_RATE 0x84
300 #define AXP20X_GPIO10_IN_RANGE 0x85
301 #define AXP20X_GPIO1_ADC_IRQ_RIS 0x86
302 #define AXP20X_GPIO1_ADC_IRQ_FAL 0x87
303 #define AXP20X_TIMER_CTRL 0x8a
304 #define AXP20X_VBUS_MON 0x8b
305 #define AXP20X_OVER_TMP 0x8f
306
307 #define AXP22X_PWREN_CTRL1 0x8c
308 #define AXP22X_PWREN_CTRL2 0x8d
309
310 /* GPIO */
311 #define AXP152_GPIO0_CTRL 0x90
312 #define AXP152_GPIO1_CTRL 0x91
313 #define AXP152_GPIO2_CTRL 0x92
314 #define AXP152_GPIO3_CTRL 0x93
315 #define AXP152_LDOGPIO2_V_OUT 0x96
316 #define AXP152_GPIO_INPUT 0x97
317 #define AXP152_PWM0_FREQ_X 0x98
318 #define AXP152_PWM0_FREQ_Y 0x99
319 #define AXP152_PWM0_DUTY_CYCLE 0x9a
320 #define AXP152_PWM1_FREQ_X 0x9b
321 #define AXP152_PWM1_FREQ_Y 0x9c
322 #define AXP152_PWM1_DUTY_CYCLE 0x9d
323
324 #define AXP192_GPIO0_CTRL 0x90
325 #define AXP192_LDO_IO0_V_OUT 0x91
326 #define AXP192_GPIO1_CTRL 0x92
327 #define AXP192_GPIO2_CTRL 0x93
328 #define AXP192_GPIO2_0_STATE 0x94
329 #define AXP192_GPIO4_3_CTRL 0x95
330 #define AXP192_GPIO4_3_STATE 0x96
331 #define AXP192_GPIO2_0_PULL 0x97
332 #define AXP192_N_RSTO_CTRL 0x9e
333
334 #define AXP20X_GPIO0_CTRL 0x90
335 #define AXP20X_LDO5_V_OUT 0x91
336 #define AXP20X_GPIO1_CTRL 0x92
337 #define AXP20X_GPIO2_CTRL 0x93
338 #define AXP20X_GPIO20_SS 0x94
339 #define AXP20X_GPIO3_CTRL 0x95
340
341 #define AXP22X_LDO_IO0_V_OUT 0x91
342 #define AXP22X_LDO_IO1_V_OUT 0x93
343 #define AXP22X_GPIO_STATE 0x94
344 #define AXP22X_GPIO_PULL_DOWN 0x95
345
346 #define AXP15060_CLDO4_GPIO2_MODESET 0x2c
347
348 /* Battery */
349 #define AXP20X_CHRG_CC_31_24 0xb0
350 #define AXP20X_CHRG_CC_23_16 0xb1
351 #define AXP20X_CHRG_CC_15_8 0xb2
352 #define AXP20X_CHRG_CC_7_0 0xb3
353 #define AXP20X_DISCHRG_CC_31_24 0xb4
354 #define AXP20X_DISCHRG_CC_23_16 0xb5
355 #define AXP20X_DISCHRG_CC_15_8 0xb6
356 #define AXP20X_DISCHRG_CC_7_0 0xb7
357 #define AXP20X_CC_CTRL 0xb8
358 #define AXP20X_FG_RES 0xb9
359
360 /* OCV */
361 #define AXP20X_RDC_H 0xba
362 #define AXP20X_RDC_L 0xbb
363 #define AXP20X_OCV(m) (0xc0 + (m))
364 #define AXP20X_OCV_MAX 0xf
365
366 /* AXP22X specific registers */
367 #define AXP22X_PMIC_TEMP_H 0x56
368 #define AXP22X_PMIC_TEMP_L 0x57
369 #define AXP22X_TS_ADC_H 0x58
370 #define AXP22X_TS_ADC_L 0x59
371 #define AXP22X_BATLOW_THRES1 0xe6
372
373 /* AXP288/AXP803 specific registers */
374 #define AXP288_POWER_REASON 0x02
375 #define AXP288_BC_GLOBAL 0x2c
376 #define AXP288_BC_VBUS_CNTL 0x2d
377 #define AXP288_BC_USB_STAT 0x2e
378 #define AXP288_BC_DET_STAT 0x2f
379 #define AXP288_PMIC_ADC_H 0x56
380 #define AXP288_PMIC_ADC_L 0x57
381 #define AXP288_TS_ADC_H 0x58
382 #define AXP288_TS_ADC_L 0x59
383 #define AXP288_GP_ADC_H 0x5a
384 #define AXP288_GP_ADC_L 0x5b
385 #define AXP288_ADC_TS_PIN_CTRL 0x84
386 #define AXP288_RT_BATT_V_H 0xa0
387 #define AXP288_RT_BATT_V_L 0xa1
388
389 #define AXP813_ACIN_PATH_CTRL 0x3a
390 #define AXP813_ADC_RATE 0x85
391
392 /* Fuel Gauge */
393 #define AXP288_FG_RDC1_REG 0xba
394 #define AXP288_FG_RDC0_REG 0xbb
395 #define AXP288_FG_OCVH_REG 0xbc
396 #define AXP288_FG_OCVL_REG 0xbd
397 #define AXP288_FG_OCV_CURVE_REG 0xc0
398 #define AXP288_FG_DES_CAP1_REG 0xe0
399 #define AXP288_FG_DES_CAP0_REG 0xe1
400 #define AXP288_FG_CC_MTR1_REG 0xe2
401 #define AXP288_FG_CC_MTR0_REG 0xe3
402 #define AXP288_FG_OCV_CAP_REG 0xe4
403 #define AXP288_FG_CC_CAP_REG 0xe5
404 #define AXP288_FG_LOW_CAP_REG 0xe6
405 #define AXP288_FG_TUNE0 0xe8
406 #define AXP288_FG_TUNE1 0xe9
407 #define AXP288_FG_TUNE2 0xea
408 #define AXP288_FG_TUNE3 0xeb
409 #define AXP288_FG_TUNE4 0xec
410 #define AXP288_FG_TUNE5 0xed
411
412 /* Regulators IDs */
413 enum {
414 AXP192_DCDC1 = 0,
415 AXP192_DCDC2,
416 AXP192_DCDC3,
417 AXP192_LDO1,
418 AXP192_LDO2,
419 AXP192_LDO3,
420 AXP192_LDO_IO0,
421 AXP192_REG_ID_MAX
422 };
423
424 enum {
425 AXP20X_LDO1 = 0,
426 AXP20X_LDO2,
427 AXP20X_LDO3,
428 AXP20X_LDO4,
429 AXP20X_LDO5,
430 AXP20X_DCDC2,
431 AXP20X_DCDC3,
432 AXP20X_REG_ID_MAX,
433 };
434
435 enum {
436 AXP22X_DCDC1 = 0,
437 AXP22X_DCDC2,
438 AXP22X_DCDC3,
439 AXP22X_DCDC4,
440 AXP22X_DCDC5,
441 AXP22X_DC1SW,
442 AXP22X_DC5LDO,
443 AXP22X_ALDO1,
444 AXP22X_ALDO2,
445 AXP22X_ALDO3,
446 AXP22X_ELDO1,
447 AXP22X_ELDO2,
448 AXP22X_ELDO3,
449 AXP22X_DLDO1,
450 AXP22X_DLDO2,
451 AXP22X_DLDO3,
452 AXP22X_DLDO4,
453 AXP22X_RTC_LDO,
454 AXP22X_LDO_IO0,
455 AXP22X_LDO_IO1,
456 AXP22X_REG_ID_MAX,
457 };
458
459 enum {
460 AXP313A_DCDC1 = 0,
461 AXP313A_DCDC2,
462 AXP313A_DCDC3,
463 AXP313A_ALDO1,
464 AXP313A_DLDO1,
465 AXP313A_RTC_LDO,
466 AXP313A_REG_ID_MAX,
467 };
468
469 enum {
470 AXP717_DCDC1 = 0,
471 AXP717_DCDC2,
472 AXP717_DCDC3,
473 AXP717_DCDC4,
474 AXP717_ALDO1,
475 AXP717_ALDO2,
476 AXP717_ALDO3,
477 AXP717_ALDO4,
478 AXP717_BLDO1,
479 AXP717_BLDO2,
480 AXP717_BLDO3,
481 AXP717_BLDO4,
482 AXP717_CLDO1,
483 AXP717_CLDO2,
484 AXP717_CLDO3,
485 AXP717_CLDO4,
486 AXP717_CPUSLDO,
487 AXP717_REG_ID_MAX,
488 };
489
490 enum {
491 AXP806_DCDCA = 0,
492 AXP806_DCDCB,
493 AXP806_DCDCC,
494 AXP806_DCDCD,
495 AXP806_DCDCE,
496 AXP806_ALDO1,
497 AXP806_ALDO2,
498 AXP806_ALDO3,
499 AXP806_BLDO1,
500 AXP806_BLDO2,
501 AXP806_BLDO3,
502 AXP806_BLDO4,
503 AXP806_CLDO1,
504 AXP806_CLDO2,
505 AXP806_CLDO3,
506 AXP806_SW,
507 AXP806_REG_ID_MAX,
508 };
509
510 enum {
511 AXP809_DCDC1 = 0,
512 AXP809_DCDC2,
513 AXP809_DCDC3,
514 AXP809_DCDC4,
515 AXP809_DCDC5,
516 AXP809_DC1SW,
517 AXP809_DC5LDO,
518 AXP809_ALDO1,
519 AXP809_ALDO2,
520 AXP809_ALDO3,
521 AXP809_ELDO1,
522 AXP809_ELDO2,
523 AXP809_ELDO3,
524 AXP809_DLDO1,
525 AXP809_DLDO2,
526 AXP809_RTC_LDO,
527 AXP809_LDO_IO0,
528 AXP809_LDO_IO1,
529 AXP809_SW,
530 AXP809_REG_ID_MAX,
531 };
532
533 enum {
534 AXP803_DCDC1 = 0,
535 AXP803_DCDC2,
536 AXP803_DCDC3,
537 AXP803_DCDC4,
538 AXP803_DCDC5,
539 AXP803_DCDC6,
540 AXP803_DC1SW,
541 AXP803_ALDO1,
542 AXP803_ALDO2,
543 AXP803_ALDO3,
544 AXP803_DLDO1,
545 AXP803_DLDO2,
546 AXP803_DLDO3,
547 AXP803_DLDO4,
548 AXP803_ELDO1,
549 AXP803_ELDO2,
550 AXP803_ELDO3,
551 AXP803_FLDO1,
552 AXP803_FLDO2,
553 AXP803_RTC_LDO,
554 AXP803_LDO_IO0,
555 AXP803_LDO_IO1,
556 AXP803_REG_ID_MAX,
557 };
558
559 enum {
560 AXP813_DCDC1 = 0,
561 AXP813_DCDC2,
562 AXP813_DCDC3,
563 AXP813_DCDC4,
564 AXP813_DCDC5,
565 AXP813_DCDC6,
566 AXP813_DCDC7,
567 AXP813_ALDO1,
568 AXP813_ALDO2,
569 AXP813_ALDO3,
570 AXP813_DLDO1,
571 AXP813_DLDO2,
572 AXP813_DLDO3,
573 AXP813_DLDO4,
574 AXP813_ELDO1,
575 AXP813_ELDO2,
576 AXP813_ELDO3,
577 AXP813_FLDO1,
578 AXP813_FLDO2,
579 AXP813_FLDO3,
580 AXP813_RTC_LDO,
581 AXP813_LDO_IO0,
582 AXP813_LDO_IO1,
583 AXP813_SW,
584 AXP813_REG_ID_MAX,
585 };
586
587 enum {
588 AXP15060_DCDC1 = 0,
589 AXP15060_DCDC2,
590 AXP15060_DCDC3,
591 AXP15060_DCDC4,
592 AXP15060_DCDC5,
593 AXP15060_DCDC6,
594 AXP15060_ALDO1,
595 AXP15060_ALDO2,
596 AXP15060_ALDO3,
597 AXP15060_ALDO4,
598 AXP15060_ALDO5,
599 AXP15060_BLDO1,
600 AXP15060_BLDO2,
601 AXP15060_BLDO3,
602 AXP15060_BLDO4,
603 AXP15060_BLDO5,
604 AXP15060_CLDO1,
605 AXP15060_CLDO2,
606 AXP15060_CLDO3,
607 AXP15060_CLDO4,
608 AXP15060_CPUSLDO,
609 AXP15060_SW,
610 AXP15060_RTC_LDO,
611 AXP15060_REG_ID_MAX,
612 };
613
614 /* IRQs */
615 enum {
616 AXP152_IRQ_LDO0IN_CONNECT = 1,
617 AXP152_IRQ_LDO0IN_REMOVAL,
618 AXP152_IRQ_ALDO0IN_CONNECT,
619 AXP152_IRQ_ALDO0IN_REMOVAL,
620 AXP152_IRQ_DCDC1_V_LOW,
621 AXP152_IRQ_DCDC2_V_LOW,
622 AXP152_IRQ_DCDC3_V_LOW,
623 AXP152_IRQ_DCDC4_V_LOW,
624 AXP152_IRQ_PEK_SHORT,
625 AXP152_IRQ_PEK_LONG,
626 AXP152_IRQ_TIMER,
627 /* out of bit order to make sure the press event is handled first */
628 AXP152_IRQ_PEK_FAL_EDGE,
629 AXP152_IRQ_PEK_RIS_EDGE,
630 AXP152_IRQ_GPIO3_INPUT,
631 AXP152_IRQ_GPIO2_INPUT,
632 AXP152_IRQ_GPIO1_INPUT,
633 AXP152_IRQ_GPIO0_INPUT,
634 };
635
636 enum axp192_irqs {
637 AXP192_IRQ_ACIN_OVER_V = 1,
638 AXP192_IRQ_ACIN_PLUGIN,
639 AXP192_IRQ_ACIN_REMOVAL,
640 AXP192_IRQ_VBUS_OVER_V,
641 AXP192_IRQ_VBUS_PLUGIN,
642 AXP192_IRQ_VBUS_REMOVAL,
643 AXP192_IRQ_VBUS_V_LOW,
644 AXP192_IRQ_BATT_PLUGIN,
645 AXP192_IRQ_BATT_REMOVAL,
646 AXP192_IRQ_BATT_ENT_ACT_MODE,
647 AXP192_IRQ_BATT_EXIT_ACT_MODE,
648 AXP192_IRQ_CHARG,
649 AXP192_IRQ_CHARG_DONE,
650 AXP192_IRQ_BATT_TEMP_HIGH,
651 AXP192_IRQ_BATT_TEMP_LOW,
652 AXP192_IRQ_DIE_TEMP_HIGH,
653 AXP192_IRQ_CHARG_I_LOW,
654 AXP192_IRQ_DCDC1_V_LONG,
655 AXP192_IRQ_DCDC2_V_LONG,
656 AXP192_IRQ_DCDC3_V_LONG,
657 AXP192_IRQ_PEK_SHORT = 22,
658 AXP192_IRQ_PEK_LONG,
659 AXP192_IRQ_N_OE_PWR_ON,
660 AXP192_IRQ_N_OE_PWR_OFF,
661 AXP192_IRQ_VBUS_VALID,
662 AXP192_IRQ_VBUS_NOT_VALID,
663 AXP192_IRQ_VBUS_SESS_VALID,
664 AXP192_IRQ_VBUS_SESS_END,
665 AXP192_IRQ_LOW_PWR_LVL = 31,
666 AXP192_IRQ_TIMER,
667 AXP192_IRQ_GPIO2_INPUT = 37,
668 AXP192_IRQ_GPIO1_INPUT,
669 AXP192_IRQ_GPIO0_INPUT,
670 };
671
672 enum {
673 AXP20X_IRQ_ACIN_OVER_V = 1,
674 AXP20X_IRQ_ACIN_PLUGIN,
675 AXP20X_IRQ_ACIN_REMOVAL,
676 AXP20X_IRQ_VBUS_OVER_V,
677 AXP20X_IRQ_VBUS_PLUGIN,
678 AXP20X_IRQ_VBUS_REMOVAL,
679 AXP20X_IRQ_VBUS_V_LOW,
680 AXP20X_IRQ_BATT_PLUGIN,
681 AXP20X_IRQ_BATT_REMOVAL,
682 AXP20X_IRQ_BATT_ENT_ACT_MODE,
683 AXP20X_IRQ_BATT_EXIT_ACT_MODE,
684 AXP20X_IRQ_CHARG,
685 AXP20X_IRQ_CHARG_DONE,
686 AXP20X_IRQ_BATT_TEMP_HIGH,
687 AXP20X_IRQ_BATT_TEMP_LOW,
688 AXP20X_IRQ_DIE_TEMP_HIGH,
689 AXP20X_IRQ_CHARG_I_LOW,
690 AXP20X_IRQ_DCDC1_V_LONG,
691 AXP20X_IRQ_DCDC2_V_LONG,
692 AXP20X_IRQ_DCDC3_V_LONG,
693 AXP20X_IRQ_PEK_SHORT = 22,
694 AXP20X_IRQ_PEK_LONG,
695 AXP20X_IRQ_N_OE_PWR_ON,
696 AXP20X_IRQ_N_OE_PWR_OFF,
697 AXP20X_IRQ_VBUS_VALID,
698 AXP20X_IRQ_VBUS_NOT_VALID,
699 AXP20X_IRQ_VBUS_SESS_VALID,
700 AXP20X_IRQ_VBUS_SESS_END,
701 AXP20X_IRQ_LOW_PWR_LVL1,
702 AXP20X_IRQ_LOW_PWR_LVL2,
703 AXP20X_IRQ_TIMER,
704 /* out of bit order to make sure the press event is handled first */
705 AXP20X_IRQ_PEK_FAL_EDGE,
706 AXP20X_IRQ_PEK_RIS_EDGE,
707 AXP20X_IRQ_GPIO3_INPUT,
708 AXP20X_IRQ_GPIO2_INPUT,
709 AXP20X_IRQ_GPIO1_INPUT,
710 AXP20X_IRQ_GPIO0_INPUT,
711 };
712
713 enum axp22x_irqs {
714 AXP22X_IRQ_ACIN_OVER_V = 1,
715 AXP22X_IRQ_ACIN_PLUGIN,
716 AXP22X_IRQ_ACIN_REMOVAL,
717 AXP22X_IRQ_VBUS_OVER_V,
718 AXP22X_IRQ_VBUS_PLUGIN,
719 AXP22X_IRQ_VBUS_REMOVAL,
720 AXP22X_IRQ_VBUS_V_LOW,
721 AXP22X_IRQ_BATT_PLUGIN,
722 AXP22X_IRQ_BATT_REMOVAL,
723 AXP22X_IRQ_BATT_ENT_ACT_MODE,
724 AXP22X_IRQ_BATT_EXIT_ACT_MODE,
725 AXP22X_IRQ_CHARG,
726 AXP22X_IRQ_CHARG_DONE,
727 AXP22X_IRQ_BATT_TEMP_HIGH,
728 AXP22X_IRQ_BATT_TEMP_LOW,
729 AXP22X_IRQ_DIE_TEMP_HIGH,
730 AXP22X_IRQ_PEK_SHORT,
731 AXP22X_IRQ_PEK_LONG,
732 AXP22X_IRQ_LOW_PWR_LVL1,
733 AXP22X_IRQ_LOW_PWR_LVL2,
734 AXP22X_IRQ_TIMER,
735 /* out of bit order to make sure the press event is handled first */
736 AXP22X_IRQ_PEK_FAL_EDGE,
737 AXP22X_IRQ_PEK_RIS_EDGE,
738 AXP22X_IRQ_GPIO1_INPUT,
739 AXP22X_IRQ_GPIO0_INPUT,
740 };
741
742 enum axp288_irqs {
743 AXP288_IRQ_VBUS_FALL = 2,
744 AXP288_IRQ_VBUS_RISE,
745 AXP288_IRQ_OV,
746 AXP288_IRQ_FALLING_ALT,
747 AXP288_IRQ_RISING_ALT,
748 AXP288_IRQ_OV_ALT,
749 AXP288_IRQ_DONE = 10,
750 AXP288_IRQ_CHARGING,
751 AXP288_IRQ_SAFE_QUIT,
752 AXP288_IRQ_SAFE_ENTER,
753 AXP288_IRQ_ABSENT,
754 AXP288_IRQ_APPEND,
755 AXP288_IRQ_QWBTU,
756 AXP288_IRQ_WBTU,
757 AXP288_IRQ_QWBTO,
758 AXP288_IRQ_WBTO,
759 AXP288_IRQ_QCBTU,
760 AXP288_IRQ_CBTU,
761 AXP288_IRQ_QCBTO,
762 AXP288_IRQ_CBTO,
763 AXP288_IRQ_WL2,
764 AXP288_IRQ_WL1,
765 AXP288_IRQ_GPADC,
766 AXP288_IRQ_OT = 31,
767 AXP288_IRQ_GPIO0,
768 AXP288_IRQ_GPIO1,
769 AXP288_IRQ_POKO,
770 AXP288_IRQ_POKL,
771 AXP288_IRQ_POKS,
772 AXP288_IRQ_POKN,
773 AXP288_IRQ_POKP,
774 AXP288_IRQ_TIMER,
775 AXP288_IRQ_MV_CHNG,
776 AXP288_IRQ_BC_USB_CHNG,
777 };
778
779 enum axp313a_irqs {
780 AXP313A_IRQ_DIE_TEMP_HIGH,
781 AXP313A_IRQ_DCDC2_V_LOW = 2,
782 AXP313A_IRQ_DCDC3_V_LOW,
783 AXP313A_IRQ_PEK_LONG,
784 AXP313A_IRQ_PEK_SHORT,
785 AXP313A_IRQ_PEK_FAL_EDGE,
786 AXP313A_IRQ_PEK_RIS_EDGE,
787 };
788
789 enum axp717_irqs {
790 AXP717_IRQ_VBUS_FAULT,
791 AXP717_IRQ_VBUS_OVER_V,
792 AXP717_IRQ_BOOST_OVER_V,
793 AXP717_IRQ_GAUGE_NEW_SOC = 4,
794 AXP717_IRQ_SOC_DROP_LVL1 = 6,
795 AXP717_IRQ_SOC_DROP_LVL2,
796 AXP717_IRQ_PEK_RIS_EDGE,
797 AXP717_IRQ_PEK_FAL_EDGE,
798 AXP717_IRQ_PEK_LONG,
799 AXP717_IRQ_PEK_SHORT,
800 AXP717_IRQ_BATT_REMOVAL,
801 AXP717_IRQ_BATT_PLUGIN,
802 AXP717_IRQ_VBUS_REMOVAL,
803 AXP717_IRQ_VBUS_PLUGIN,
804 AXP717_IRQ_BATT_OVER_V,
805 AXP717_IRQ_CHARG_TIMER,
806 AXP717_IRQ_DIE_TEMP_HIGH,
807 AXP717_IRQ_CHARG,
808 AXP717_IRQ_CHARG_DONE,
809 AXP717_IRQ_BATT_OVER_CURR,
810 AXP717_IRQ_LDO_OVER_CURR,
811 AXP717_IRQ_WDOG_EXPIRE,
812 AXP717_IRQ_BATT_ACT_TEMP_LOW,
813 AXP717_IRQ_BATT_ACT_TEMP_HIGH,
814 AXP717_IRQ_BATT_CHG_TEMP_LOW,
815 AXP717_IRQ_BATT_CHG_TEMP_HIGH,
816 AXP717_IRQ_BATT_QUIT_TEMP_HIGH,
817 AXP717_IRQ_BC_USB_CHNG = 30,
818 AXP717_IRQ_BC_USB_DONE,
819 AXP717_IRQ_TYPEC_PLUGIN = 37,
820 AXP717_IRQ_TYPEC_REMOVE,
821 };
822
823 enum axp803_irqs {
824 AXP803_IRQ_ACIN_OVER_V = 1,
825 AXP803_IRQ_ACIN_PLUGIN,
826 AXP803_IRQ_ACIN_REMOVAL,
827 AXP803_IRQ_VBUS_OVER_V,
828 AXP803_IRQ_VBUS_PLUGIN,
829 AXP803_IRQ_VBUS_REMOVAL,
830 AXP803_IRQ_BATT_PLUGIN,
831 AXP803_IRQ_BATT_REMOVAL,
832 AXP803_IRQ_BATT_ENT_ACT_MODE,
833 AXP803_IRQ_BATT_EXIT_ACT_MODE,
834 AXP803_IRQ_CHARG,
835 AXP803_IRQ_CHARG_DONE,
836 AXP803_IRQ_BATT_CHG_TEMP_HIGH,
837 AXP803_IRQ_BATT_CHG_TEMP_HIGH_END,
838 AXP803_IRQ_BATT_CHG_TEMP_LOW,
839 AXP803_IRQ_BATT_CHG_TEMP_LOW_END,
840 AXP803_IRQ_BATT_ACT_TEMP_HIGH,
841 AXP803_IRQ_BATT_ACT_TEMP_HIGH_END,
842 AXP803_IRQ_BATT_ACT_TEMP_LOW,
843 AXP803_IRQ_BATT_ACT_TEMP_LOW_END,
844 AXP803_IRQ_DIE_TEMP_HIGH,
845 AXP803_IRQ_GPADC,
846 AXP803_IRQ_LOW_PWR_LVL1,
847 AXP803_IRQ_LOW_PWR_LVL2,
848 AXP803_IRQ_TIMER,
849 /* out of bit order to make sure the press event is handled first */
850 AXP803_IRQ_PEK_FAL_EDGE,
851 AXP803_IRQ_PEK_RIS_EDGE,
852 AXP803_IRQ_PEK_SHORT,
853 AXP803_IRQ_PEK_LONG,
854 AXP803_IRQ_PEK_OVER_OFF,
855 AXP803_IRQ_GPIO1_INPUT,
856 AXP803_IRQ_GPIO0_INPUT,
857 AXP803_IRQ_BC_USB_CHNG,
858 AXP803_IRQ_MV_CHNG,
859 };
860
861 enum axp806_irqs {
862 AXP806_IRQ_DIE_TEMP_HIGH_LV1,
863 AXP806_IRQ_DIE_TEMP_HIGH_LV2,
864 AXP806_IRQ_DCDCA_V_LOW,
865 AXP806_IRQ_DCDCB_V_LOW,
866 AXP806_IRQ_DCDCC_V_LOW,
867 AXP806_IRQ_DCDCD_V_LOW,
868 AXP806_IRQ_DCDCE_V_LOW,
869 AXP806_IRQ_POK_LONG,
870 AXP806_IRQ_POK_SHORT,
871 AXP806_IRQ_WAKEUP,
872 AXP806_IRQ_POK_FALL,
873 AXP806_IRQ_POK_RISE,
874 };
875
876 enum axp809_irqs {
877 AXP809_IRQ_ACIN_OVER_V = 1,
878 AXP809_IRQ_ACIN_PLUGIN,
879 AXP809_IRQ_ACIN_REMOVAL,
880 AXP809_IRQ_VBUS_OVER_V,
881 AXP809_IRQ_VBUS_PLUGIN,
882 AXP809_IRQ_VBUS_REMOVAL,
883 AXP809_IRQ_VBUS_V_LOW,
884 AXP809_IRQ_BATT_PLUGIN,
885 AXP809_IRQ_BATT_REMOVAL,
886 AXP809_IRQ_BATT_ENT_ACT_MODE,
887 AXP809_IRQ_BATT_EXIT_ACT_MODE,
888 AXP809_IRQ_CHARG,
889 AXP809_IRQ_CHARG_DONE,
890 AXP809_IRQ_BATT_CHG_TEMP_HIGH,
891 AXP809_IRQ_BATT_CHG_TEMP_HIGH_END,
892 AXP809_IRQ_BATT_CHG_TEMP_LOW,
893 AXP809_IRQ_BATT_CHG_TEMP_LOW_END,
894 AXP809_IRQ_BATT_ACT_TEMP_HIGH,
895 AXP809_IRQ_BATT_ACT_TEMP_HIGH_END,
896 AXP809_IRQ_BATT_ACT_TEMP_LOW,
897 AXP809_IRQ_BATT_ACT_TEMP_LOW_END,
898 AXP809_IRQ_DIE_TEMP_HIGH,
899 AXP809_IRQ_LOW_PWR_LVL1,
900 AXP809_IRQ_LOW_PWR_LVL2,
901 AXP809_IRQ_TIMER,
902 /* out of bit order to make sure the press event is handled first */
903 AXP809_IRQ_PEK_FAL_EDGE,
904 AXP809_IRQ_PEK_RIS_EDGE,
905 AXP809_IRQ_PEK_SHORT,
906 AXP809_IRQ_PEK_LONG,
907 AXP809_IRQ_PEK_OVER_OFF,
908 AXP809_IRQ_GPIO1_INPUT,
909 AXP809_IRQ_GPIO0_INPUT,
910 };
911
912 enum axp15060_irqs {
913 AXP15060_IRQ_DIE_TEMP_HIGH_LV1 = 1,
914 AXP15060_IRQ_DIE_TEMP_HIGH_LV2,
915 AXP15060_IRQ_DCDC1_V_LOW,
916 AXP15060_IRQ_DCDC2_V_LOW,
917 AXP15060_IRQ_DCDC3_V_LOW,
918 AXP15060_IRQ_DCDC4_V_LOW,
919 AXP15060_IRQ_DCDC5_V_LOW,
920 AXP15060_IRQ_DCDC6_V_LOW,
921 AXP15060_IRQ_PEK_LONG,
922 AXP15060_IRQ_PEK_SHORT,
923 AXP15060_IRQ_GPIO1_INPUT,
924 AXP15060_IRQ_PEK_FAL_EDGE,
925 AXP15060_IRQ_PEK_RIS_EDGE,
926 AXP15060_IRQ_GPIO2_INPUT,
927 };
928
929 struct axp20x_dev {
930 struct device *dev;
931 int irq;
932 unsigned long irq_flags;
933 struct regmap *regmap;
934 struct regmap_irq_chip_data *regmap_irqc;
935 long variant;
936 int nr_cells;
937 const struct mfd_cell *cells;
938 const struct regmap_config *regmap_cfg;
939 const struct regmap_irq_chip *regmap_irq_chip;
940 };
941
942 /* generic helper function for reading 9-16 bit wide regs */
943 static inline int axp20x_read_variable_width(struct regmap *regmap,
944 unsigned int reg, unsigned int width)
945 {
946 unsigned int reg_val, result;
947 int err;
948
949 err = regmap_read(regmap, reg, ®_val);
950 if (err)
951 return err;
952
953 result = reg_val << (width - 8);
954
955 err = regmap_read(regmap, reg + 1, ®_val);
956 if (err)
957 return err;
958
959 result |= reg_val;
960
961 return result;
962 }
963
964 /**
965 * axp20x_match_device(): Setup axp20x variant related fields
966 *
967 * @axp20x: axp20x device to setup (.dev field must be set)
968 * @dev: device associated with this axp20x device
969 *
970 * This lets the axp20x core configure the mfd cells and register maps
971 * for later use.
972 */
973 int axp20x_match_device(struct axp20x_dev *axp20x);
974
975 /**
976 * axp20x_device_probe(): Probe a configured axp20x device
977 *
978 * @axp20x: axp20x device to probe (must be configured)
979 *
980 * This function lets the axp20x core register the axp20x mfd devices
981 * and irqchip. The axp20x device passed in must be fully configured
982 * with axp20x_match_device, its irq set, and regmap created.
983 */
984 int axp20x_device_probe(struct axp20x_dev *axp20x);
985
986 /**
987 * axp20x_device_remove(): Remove a axp20x device
988 *
989 * @axp20x: axp20x device to remove
990 *
991 * This tells the axp20x core to remove the associated mfd devices
992 */
993 void axp20x_device_remove(struct axp20x_dev *axp20x);
994
995 #endif /* __LINUX_MFD_AXP20X_H */
996
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