1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Khadas System control Microcontroller Register map
4 *
5 * Copyright (C) 2020 BayLibre SAS
6 *
7 * Author(s): Neil Armstrong <narmstrong@baylibre.com>
8 */
9
10 #ifndef MFD_KHADAS_MCU_H
11 #define MFD_KHADAS_MCU_H
12
13 #define KHADAS_MCU_PASSWD_VEN_0_REG 0x00 /* RO */
14 #define KHADAS_MCU_PASSWD_VEN_1_REG 0x01 /* RO */
15 #define KHADAS_MCU_PASSWD_VEN_2_REG 0x02 /* RO */
16 #define KHADAS_MCU_PASSWD_VEN_3_REG 0x03 /* RO */
17 #define KHADAS_MCU_PASSWD_VEN_4_REG 0x04 /* RO */
18 #define KHADAS_MCU_PASSWD_VEN_5_REG 0x05 /* RO */
19 #define KHADAS_MCU_MAC_0_REG 0x06 /* RO */
20 #define KHADAS_MCU_MAC_1_REG 0x07 /* RO */
21 #define KHADAS_MCU_MAC_2_REG 0x08 /* RO */
22 #define KHADAS_MCU_MAC_3_REG 0x09 /* RO */
23 #define KHADAS_MCU_MAC_4_REG 0x0a /* RO */
24 #define KHADAS_MCU_MAC_5_REG 0x0b /* RO */
25 #define KHADAS_MCU_USID_0_REG 0x0c /* RO */
26 #define KHADAS_MCU_USID_1_REG 0x0d /* RO */
27 #define KHADAS_MCU_USID_2_REG 0x0e /* RO */
28 #define KHADAS_MCU_USID_3_REG 0x0f /* RO */
29 #define KHADAS_MCU_USID_4_REG 0x10 /* RO */
30 #define KHADAS_MCU_USID_5_REG 0x11 /* RO */
31 #define KHADAS_MCU_VERSION_0_REG 0x12 /* RO */
32 #define KHADAS_MCU_VERSION_1_REG 0x13 /* RO */
33 #define KHADAS_MCU_DEVICE_NO_0_REG 0x14 /* RO */
34 #define KHADAS_MCU_DEVICE_NO_1_REG 0x15 /* RO */
35 #define KHADAS_MCU_FACTORY_TEST_REG 0x16 /* R */
36 #define KHADAS_MCU_BOOT_MODE_REG 0x20 /* RW */
37 #define KHADAS_MCU_BOOT_EN_WOL_REG 0x21 /* RW */
38 #define KHADAS_MCU_BOOT_EN_RTC_REG 0x22 /* RW */
39 #define KHADAS_MCU_BOOT_EN_EXP_REG 0x23 /* RW */
40 #define KHADAS_MCU_BOOT_EN_IR_REG 0x24 /* RW */
41 #define KHADAS_MCU_BOOT_EN_DCIN_REG 0x25 /* RW */
42 #define KHADAS_MCU_BOOT_EN_KEY_REG 0x26 /* RW */
43 #define KHADAS_MCU_KEY_MODE_REG 0x27 /* RW */
44 #define KHADAS_MCU_LED_MODE_ON_REG 0x28 /* RW */
45 #define KHADAS_MCU_LED_MODE_OFF_REG 0x29 /* RW */
46 #define KHADAS_MCU_SHUTDOWN_NORMAL_REG 0x2c /* RW */
47 #define KHADAS_MCU_MAC_SWITCH_REG 0x2d /* RW */
48 #define KHADAS_MCU_MCU_SLEEP_MODE_REG 0x2e /* RW */
49 #define KHADAS_MCU_IR_CODE1_0_REG 0x2f /* RW */
50 #define KHADAS_MCU_IR_CODE1_1_REG 0x30 /* RW */
51 #define KHADAS_MCU_IR_CODE1_2_REG 0x31 /* RW */
52 #define KHADAS_MCU_IR_CODE1_3_REG 0x32 /* RW */
53 #define KHADAS_MCU_USB_PCIE_SWITCH_REG 0x33 /* RW */
54 #define KHADAS_MCU_IR_CODE2_0_REG 0x34 /* RW */
55 #define KHADAS_MCU_IR_CODE2_1_REG 0x35 /* RW */
56 #define KHADAS_MCU_IR_CODE2_2_REG 0x36 /* RW */
57 #define KHADAS_MCU_IR_CODE2_3_REG 0x37 /* RW */
58 #define KHADAS_MCU_PASSWD_USER_0_REG 0x40 /* RW */
59 #define KHADAS_MCU_PASSWD_USER_1_REG 0x41 /* RW */
60 #define KHADAS_MCU_PASSWD_USER_2_REG 0x42 /* RW */
61 #define KHADAS_MCU_PASSWD_USER_3_REG 0x43 /* RW */
62 #define KHADAS_MCU_PASSWD_USER_4_REG 0x44 /* RW */
63 #define KHADAS_MCU_PASSWD_USER_5_REG 0x45 /* RW */
64 #define KHADAS_MCU_USER_DATA_0_REG 0x46 /* RW 56 bytes */
65 #define KHADAS_MCU_PWR_OFF_CMD_REG 0x80 /* WO */
66 #define KHADAS_MCU_PASSWD_START_REG 0x81 /* WO */
67 #define KHADAS_MCU_CHECK_VEN_PASSWD_REG 0x82 /* WO */
68 #define KHADAS_MCU_CHECK_USER_PASSWD_REG 0x83 /* WO */
69 #define KHADAS_MCU_SHUTDOWN_NORMAL_STATUS_REG 0x86 /* RO */
70 #define KHADAS_MCU_WOL_INIT_START_REG 0x87 /* WO */
71 #define KHADAS_MCU_CMD_FAN_STATUS_CTRL_REG 0x88 /* WO */
72
73 enum {
74 KHADAS_BOARD_VIM1 = 0x1,
75 KHADAS_BOARD_VIM2,
76 KHADAS_BOARD_VIM3,
77 KHADAS_BOARD_EDGE = 0x11,
78 KHADAS_BOARD_EDGE_V,
79 };
80
81 /**
82 * struct khadas_mcu - Khadas MCU structure
83 * @device: device reference used for logs
84 * @regmap: register map
85 */
86 struct khadas_mcu {
87 struct device *dev;
88 struct regmap *regmap;
89 };
90
91 #endif /* MFD_KHADAS_MCU_H */
92
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