1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2022 AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> 4 */ 5 6 #ifndef __MFD_MT6331_REGISTERS_H__ 7 #define __MFD_MT6331_REGISTERS_H__ 8 9 /* PMIC Registers */ 10 #define MT6331_STRUP_CON0 0x0 11 #define MT6331_STRUP_CON2 0x2 12 #define MT6331_STRUP_CON3 0x4 13 #define MT6331_STRUP_CON4 0x6 14 #define MT6331_STRUP_CON5 0x8 15 #define MT6331_STRUP_CON6 0xA 16 #define MT6331_STRUP_CON7 0xC 17 #define MT6331_STRUP_CON8 0xE 18 #define MT6331_STRUP_CON9 0x10 19 #define MT6331_STRUP_CON10 0x12 20 #define MT6331_STRUP_CON11 0x14 21 #define MT6331_STRUP_CON12 0x16 22 #define MT6331_STRUP_CON13 0x18 23 #define MT6331_STRUP_CON14 0x1A 24 #define MT6331_STRUP_CON15 0x1C 25 #define MT6331_STRUP_CON16 0x1E 26 #define MT6331_STRUP_CON17 0x20 27 #define MT6331_STRUP_CON18 0x22 28 #define MT6331_HWCID 0x100 29 #define MT6331_SWCID 0x102 30 #define MT6331_EXT_PMIC_STATUS 0x104 31 #define MT6331_TOP_CON 0x106 32 #define MT6331_TEST_OUT 0x108 33 #define MT6331_TEST_CON0 0x10A 34 #define MT6331_TEST_CON1 0x10C 35 #define MT6331_TESTMODE_SW 0x10E 36 #define MT6331_EN_STATUS0 0x110 37 #define MT6331_EN_STATUS1 0x112 38 #define MT6331_EN_STATUS2 0x114 39 #define MT6331_OCSTATUS0 0x116 40 #define MT6331_OCSTATUS1 0x118 41 #define MT6331_OCSTATUS2 0x11A 42 #define MT6331_PGSTATUS 0x11C 43 #define MT6331_TOPSTATUS 0x11E 44 #define MT6331_TDSEL_CON 0x120 45 #define MT6331_RDSEL_CON 0x122 46 #define MT6331_SMT_CON0 0x124 47 #define MT6331_SMT_CON1 0x126 48 #define MT6331_SMT_CON2 0x128 49 #define MT6331_DRV_CON0 0x12A 50 #define MT6331_DRV_CON1 0x12C 51 #define MT6331_DRV_CON2 0x12E 52 #define MT6331_DRV_CON3 0x130 53 #define MT6331_TOP_STATUS 0x132 54 #define MT6331_TOP_STATUS_SET 0x134 55 #define MT6331_TOP_STATUS_CLR 0x136 56 #define MT6331_TOP_CKPDN_CON0 0x138 57 #define MT6331_TOP_CKPDN_CON0_SET 0x13A 58 #define MT6331_TOP_CKPDN_CON0_CLR 0x13C 59 #define MT6331_TOP_CKPDN_CON1 0x13E 60 #define MT6331_TOP_CKPDN_CON1_SET 0x140 61 #define MT6331_TOP_CKPDN_CON1_CLR 0x142 62 #define MT6331_TOP_CKPDN_CON2 0x144 63 #define MT6331_TOP_CKPDN_CON2_SET 0x146 64 #define MT6331_TOP_CKPDN_CON2_CLR 0x148 65 #define MT6331_TOP_CKSEL_CON 0x14A 66 #define MT6331_TOP_CKSEL_CON_SET 0x14C 67 #define MT6331_TOP_CKSEL_CON_CLR 0x14E 68 #define MT6331_TOP_CKHWEN_CON 0x150 69 #define MT6331_TOP_CKHWEN_CON_SET 0x152 70 #define MT6331_TOP_CKHWEN_CON_CLR 0x154 71 #define MT6331_TOP_CKTST_CON0 0x156 72 #define MT6331_TOP_CKTST_CON1 0x158 73 #define MT6331_TOP_CLKSQ 0x15A 74 #define MT6331_TOP_CLKSQ_SET 0x15C 75 #define MT6331_TOP_CLKSQ_CLR 0x15E 76 #define MT6331_TOP_RST_CON 0x160 77 #define MT6331_TOP_RST_CON_SET 0x162 78 #define MT6331_TOP_RST_CON_CLR 0x164 79 #define MT6331_TOP_RST_MISC 0x166 80 #define MT6331_TOP_RST_MISC_SET 0x168 81 #define MT6331_TOP_RST_MISC_CLR 0x16A 82 #define MT6331_INT_CON0 0x16C 83 #define MT6331_INT_CON0_SET 0x16E 84 #define MT6331_INT_CON0_CLR 0x170 85 #define MT6331_INT_CON1 0x172 86 #define MT6331_INT_CON1_SET 0x174 87 #define MT6331_INT_CON1_CLR 0x176 88 #define MT6331_INT_MISC_CON 0x178 89 #define MT6331_INT_MISC_CON_SET 0x17A 90 #define MT6331_INT_MISC_CON_CLR 0x17C 91 #define MT6331_INT_STATUS_CON0 0x17E 92 #define MT6331_INT_STATUS_CON1 0x180 93 #define MT6331_OC_GEAR_0 0x182 94 #define MT6331_FQMTR_CON0 0x184 95 #define MT6331_FQMTR_CON1 0x186 96 #define MT6331_FQMTR_CON2 0x188 97 #define MT6331_RG_SPI_CON 0x18A 98 #define MT6331_DEW_DIO_EN 0x18C 99 #define MT6331_DEW_READ_TEST 0x18E 100 #define MT6331_DEW_WRITE_TEST 0x190 101 #define MT6331_DEW_CRC_SWRST 0x192 102 #define MT6331_DEW_CRC_EN 0x194 103 #define MT6331_DEW_CRC_VAL 0x196 104 #define MT6331_DEW_DBG_MON_SEL 0x198 105 #define MT6331_DEW_CIPHER_KEY_SEL 0x19A 106 #define MT6331_DEW_CIPHER_IV_SEL 0x19C 107 #define MT6331_DEW_CIPHER_EN 0x19E 108 #define MT6331_DEW_CIPHER_RDY 0x1A0 109 #define MT6331_DEW_CIPHER_MODE 0x1A2 110 #define MT6331_DEW_CIPHER_SWRST 0x1A4 111 #define MT6331_DEW_RDDMY_NO 0x1A6 112 #define MT6331_INT_TYPE_CON0 0x1A8 113 #define MT6331_INT_TYPE_CON0_SET 0x1AA 114 #define MT6331_INT_TYPE_CON0_CLR 0x1AC 115 #define MT6331_INT_TYPE_CON1 0x1AE 116 #define MT6331_INT_TYPE_CON1_SET 0x1B0 117 #define MT6331_INT_TYPE_CON1_CLR 0x1B2 118 #define MT6331_INT_STA 0x1B4 119 #define MT6331_BUCK_ALL_CON0 0x200 120 #define MT6331_BUCK_ALL_CON1 0x202 121 #define MT6331_BUCK_ALL_CON2 0x204 122 #define MT6331_BUCK_ALL_CON3 0x206 123 #define MT6331_BUCK_ALL_CON4 0x208 124 #define MT6331_BUCK_ALL_CON5 0x20A 125 #define MT6331_BUCK_ALL_CON6 0x20C 126 #define MT6331_BUCK_ALL_CON7 0x20E 127 #define MT6331_BUCK_ALL_CON8 0x210 128 #define MT6331_BUCK_ALL_CON9 0x212 129 #define MT6331_BUCK_ALL_CON10 0x214 130 #define MT6331_BUCK_ALL_CON11 0x216 131 #define MT6331_BUCK_ALL_CON12 0x218 132 #define MT6331_BUCK_ALL_CON13 0x21A 133 #define MT6331_BUCK_ALL_CON14 0x21C 134 #define MT6331_BUCK_ALL_CON15 0x21E 135 #define MT6331_BUCK_ALL_CON16 0x220 136 #define MT6331_BUCK_ALL_CON17 0x222 137 #define MT6331_BUCK_ALL_CON18 0x224 138 #define MT6331_BUCK_ALL_CON19 0x226 139 #define MT6331_BUCK_ALL_CON20 0x228 140 #define MT6331_BUCK_ALL_CON21 0x22A 141 #define MT6331_BUCK_ALL_CON22 0x22C 142 #define MT6331_BUCK_ALL_CON23 0x22E 143 #define MT6331_BUCK_ALL_CON24 0x230 144 #define MT6331_BUCK_ALL_CON25 0x232 145 #define MT6331_BUCK_ALL_CON26 0x234 146 #define MT6331_VDVFS11_CON0 0x236 147 #define MT6331_VDVFS11_CON1 0x238 148 #define MT6331_VDVFS11_CON2 0x23A 149 #define MT6331_VDVFS11_CON3 0x23C 150 #define MT6331_VDVFS11_CON4 0x23E 151 #define MT6331_VDVFS11_CON5 0x240 152 #define MT6331_VDVFS11_CON6 0x242 153 #define MT6331_VDVFS11_CON7 0x244 154 #define MT6331_VDVFS11_CON8 0x246 155 #define MT6331_VDVFS11_CON9 0x248 156 #define MT6331_VDVFS11_CON10 0x24A 157 #define MT6331_VDVFS11_CON11 0x24C 158 #define MT6331_VDVFS11_CON12 0x24E 159 #define MT6331_VDVFS11_CON13 0x250 160 #define MT6331_VDVFS11_CON14 0x252 161 #define MT6331_VDVFS11_CON18 0x25A 162 #define MT6331_VDVFS11_CON19 0x25C 163 #define MT6331_VDVFS11_CON20 0x25E 164 #define MT6331_VDVFS11_CON21 0x260 165 #define MT6331_VDVFS11_CON22 0x262 166 #define MT6331_VDVFS11_CON23 0x264 167 #define MT6331_VDVFS11_CON24 0x266 168 #define MT6331_VDVFS11_CON25 0x268 169 #define MT6331_VDVFS11_CON26 0x26A 170 #define MT6331_VDVFS11_CON27 0x26C 171 #define MT6331_VDVFS12_CON0 0x26E 172 #define MT6331_VDVFS12_CON1 0x270 173 #define MT6331_VDVFS12_CON2 0x272 174 #define MT6331_VDVFS12_CON3 0x274 175 #define MT6331_VDVFS12_CON4 0x276 176 #define MT6331_VDVFS12_CON5 0x278 177 #define MT6331_VDVFS12_CON6 0x27A 178 #define MT6331_VDVFS12_CON7 0x27C 179 #define MT6331_VDVFS12_CON8 0x27E 180 #define MT6331_VDVFS12_CON9 0x280 181 #define MT6331_VDVFS12_CON10 0x282 182 #define MT6331_VDVFS12_CON11 0x284 183 #define MT6331_VDVFS12_CON12 0x286 184 #define MT6331_VDVFS12_CON13 0x288 185 #define MT6331_VDVFS12_CON14 0x28A 186 #define MT6331_VDVFS12_CON18 0x292 187 #define MT6331_VDVFS12_CON19 0x294 188 #define MT6331_VDVFS12_CON20 0x296 189 #define MT6331_VDVFS13_CON0 0x298 190 #define MT6331_VDVFS13_CON1 0x29A 191 #define MT6331_VDVFS13_CON2 0x29C 192 #define MT6331_VDVFS13_CON3 0x29E 193 #define MT6331_VDVFS13_CON4 0x2A0 194 #define MT6331_VDVFS13_CON5 0x2A2 195 #define MT6331_VDVFS13_CON6 0x2A4 196 #define MT6331_VDVFS13_CON7 0x2A6 197 #define MT6331_VDVFS13_CON8 0x2A8 198 #define MT6331_VDVFS13_CON9 0x2AA 199 #define MT6331_VDVFS13_CON10 0x2AC 200 #define MT6331_VDVFS13_CON11 0x2AE 201 #define MT6331_VDVFS13_CON12 0x2B0 202 #define MT6331_VDVFS13_CON13 0x2B2 203 #define MT6331_VDVFS13_CON14 0x2B4 204 #define MT6331_VDVFS13_CON18 0x2BC 205 #define MT6331_VDVFS13_CON19 0x2BE 206 #define MT6331_VDVFS13_CON20 0x2C0 207 #define MT6331_VDVFS14_CON0 0x2C2 208 #define MT6331_VDVFS14_CON1 0x2C4 209 #define MT6331_VDVFS14_CON2 0x2C6 210 #define MT6331_VDVFS14_CON3 0x2C8 211 #define MT6331_VDVFS14_CON4 0x2CA 212 #define MT6331_VDVFS14_CON5 0x2CC 213 #define MT6331_VDVFS14_CON6 0x2CE 214 #define MT6331_VDVFS14_CON7 0x2D0 215 #define MT6331_VDVFS14_CON8 0x2D2 216 #define MT6331_VDVFS14_CON9 0x2D4 217 #define MT6331_VDVFS14_CON10 0x2D6 218 #define MT6331_VDVFS14_CON11 0x2D8 219 #define MT6331_VDVFS14_CON12 0x2DA 220 #define MT6331_VDVFS14_CON13 0x2DC 221 #define MT6331_VDVFS14_CON14 0x2DE 222 #define MT6331_VDVFS14_CON18 0x2E6 223 #define MT6331_VDVFS14_CON19 0x2E8 224 #define MT6331_VDVFS14_CON20 0x2EA 225 #define MT6331_VGPU_CON0 0x300 226 #define MT6331_VGPU_CON1 0x302 227 #define MT6331_VGPU_CON2 0x304 228 #define MT6331_VGPU_CON3 0x306 229 #define MT6331_VGPU_CON4 0x308 230 #define MT6331_VGPU_CON5 0x30A 231 #define MT6331_VGPU_CON6 0x30C 232 #define MT6331_VGPU_CON7 0x30E 233 #define MT6331_VGPU_CON8 0x310 234 #define MT6331_VGPU_CON9 0x312 235 #define MT6331_VGPU_CON10 0x314 236 #define MT6331_VGPU_CON11 0x316 237 #define MT6331_VGPU_CON12 0x318 238 #define MT6331_VGPU_CON13 0x31A 239 #define MT6331_VGPU_CON14 0x31C 240 #define MT6331_VGPU_CON15 0x31E 241 #define MT6331_VGPU_CON16 0x320 242 #define MT6331_VGPU_CON17 0x322 243 #define MT6331_VGPU_CON18 0x324 244 #define MT6331_VGPU_CON19 0x326 245 #define MT6331_VGPU_CON20 0x328 246 #define MT6331_VCORE1_CON0 0x32A 247 #define MT6331_VCORE1_CON1 0x32C 248 #define MT6331_VCORE1_CON2 0x32E 249 #define MT6331_VCORE1_CON3 0x330 250 #define MT6331_VCORE1_CON4 0x332 251 #define MT6331_VCORE1_CON5 0x334 252 #define MT6331_VCORE1_CON6 0x336 253 #define MT6331_VCORE1_CON7 0x338 254 #define MT6331_VCORE1_CON8 0x33A 255 #define MT6331_VCORE1_CON9 0x33C 256 #define MT6331_VCORE1_CON10 0x33E 257 #define MT6331_VCORE1_CON11 0x340 258 #define MT6331_VCORE1_CON12 0x342 259 #define MT6331_VCORE1_CON13 0x344 260 #define MT6331_VCORE1_CON14 0x346 261 #define MT6331_VCORE1_CON15 0x348 262 #define MT6331_VCORE1_CON16 0x34A 263 #define MT6331_VCORE1_CON17 0x34C 264 #define MT6331_VCORE1_CON18 0x34E 265 #define MT6331_VCORE1_CON19 0x350 266 #define MT6331_VCORE1_CON20 0x352 267 #define MT6331_VCORE2_CON0 0x354 268 #define MT6331_VCORE2_CON1 0x356 269 #define MT6331_VCORE2_CON2 0x358 270 #define MT6331_VCORE2_CON3 0x35A 271 #define MT6331_VCORE2_CON4 0x35C 272 #define MT6331_VCORE2_CON5 0x35E 273 #define MT6331_VCORE2_CON6 0x360 274 #define MT6331_VCORE2_CON7 0x362 275 #define MT6331_VCORE2_CON8 0x364 276 #define MT6331_VCORE2_CON9 0x366 277 #define MT6331_VCORE2_CON10 0x368 278 #define MT6331_VCORE2_CON11 0x36A 279 #define MT6331_VCORE2_CON12 0x36C 280 #define MT6331_VCORE2_CON13 0x36E 281 #define MT6331_VCORE2_CON14 0x370 282 #define MT6331_VCORE2_CON15 0x372 283 #define MT6331_VCORE2_CON16 0x374 284 #define MT6331_VCORE2_CON17 0x376 285 #define MT6331_VCORE2_CON18 0x378 286 #define MT6331_VCORE2_CON19 0x37A 287 #define MT6331_VCORE2_CON20 0x37C 288 #define MT6331_VCORE2_CON21 0x37E 289 #define MT6331_VIO18_CON0 0x380 290 #define MT6331_VIO18_CON1 0x382 291 #define MT6331_VIO18_CON2 0x384 292 #define MT6331_VIO18_CON3 0x386 293 #define MT6331_VIO18_CON4 0x388 294 #define MT6331_VIO18_CON5 0x38A 295 #define MT6331_VIO18_CON6 0x38C 296 #define MT6331_VIO18_CON7 0x38E 297 #define MT6331_VIO18_CON8 0x390 298 #define MT6331_VIO18_CON9 0x392 299 #define MT6331_VIO18_CON10 0x394 300 #define MT6331_VIO18_CON11 0x396 301 #define MT6331_VIO18_CON12 0x398 302 #define MT6331_VIO18_CON13 0x39A 303 #define MT6331_VIO18_CON14 0x39C 304 #define MT6331_VIO18_CON15 0x39E 305 #define MT6331_VIO18_CON16 0x3A0 306 #define MT6331_VIO18_CON17 0x3A2 307 #define MT6331_VIO18_CON18 0x3A4 308 #define MT6331_VIO18_CON19 0x3A6 309 #define MT6331_VIO18_CON20 0x3A8 310 #define MT6331_BUCK_K_CON0 0x3AA 311 #define MT6331_BUCK_K_CON1 0x3AC 312 #define MT6331_BUCK_K_CON2 0x3AE 313 #define MT6331_BUCK_K_CON3 0x3B0 314 #define MT6331_ZCD_CON0 0x400 315 #define MT6331_ZCD_CON1 0x402 316 #define MT6331_ZCD_CON2 0x404 317 #define MT6331_ZCD_CON3 0x406 318 #define MT6331_ZCD_CON4 0x408 319 #define MT6331_ZCD_CON5 0x40A 320 #define MT6331_ISINK0_CON0 0x40C 321 #define MT6331_ISINK0_CON1 0x40E 322 #define MT6331_ISINK0_CON2 0x410 323 #define MT6331_ISINK0_CON3 0x412 324 #define MT6331_ISINK0_CON4 0x414 325 #define MT6331_ISINK1_CON0 0x416 326 #define MT6331_ISINK1_CON1 0x418 327 #define MT6331_ISINK1_CON2 0x41A 328 #define MT6331_ISINK1_CON3 0x41C 329 #define MT6331_ISINK1_CON4 0x41E 330 #define MT6331_ISINK2_CON0 0x420 331 #define MT6331_ISINK2_CON1 0x422 332 #define MT6331_ISINK2_CON2 0x424 333 #define MT6331_ISINK2_CON3 0x426 334 #define MT6331_ISINK2_CON4 0x428 335 #define MT6331_ISINK3_CON0 0x42A 336 #define MT6331_ISINK3_CON1 0x42C 337 #define MT6331_ISINK3_CON2 0x42E 338 #define MT6331_ISINK3_CON3 0x430 339 #define MT6331_ISINK3_CON4 0x432 340 #define MT6331_ISINK_ANA0 0x434 341 #define MT6331_ISINK_ANA1 0x436 342 #define MT6331_ISINK_PHASE_DLY 0x438 343 #define MT6331_ISINK_EN_CTRL 0x43A 344 #define MT6331_ANALDO_CON0 0x500 345 #define MT6331_ANALDO_CON1 0x502 346 #define MT6331_ANALDO_CON2 0x504 347 #define MT6331_ANALDO_CON3 0x506 348 #define MT6331_ANALDO_CON4 0x508 349 #define MT6331_ANALDO_CON5 0x50A 350 #define MT6331_ANALDO_CON6 0x50C 351 #define MT6331_ANALDO_CON7 0x50E 352 #define MT6331_ANALDO_CON8 0x510 353 #define MT6331_ANALDO_CON9 0x512 354 #define MT6331_ANALDO_CON10 0x514 355 #define MT6331_ANALDO_CON11 0x516 356 #define MT6331_ANALDO_CON12 0x518 357 #define MT6331_ANALDO_CON13 0x51A 358 #define MT6331_SYSLDO_CON0 0x51C 359 #define MT6331_SYSLDO_CON1 0x51E 360 #define MT6331_SYSLDO_CON2 0x520 361 #define MT6331_SYSLDO_CON3 0x522 362 #define MT6331_SYSLDO_CON4 0x524 363 #define MT6331_SYSLDO_CON5 0x526 364 #define MT6331_SYSLDO_CON6 0x528 365 #define MT6331_SYSLDO_CON7 0x52A 366 #define MT6331_SYSLDO_CON8 0x52C 367 #define MT6331_SYSLDO_CON9 0x52E 368 #define MT6331_SYSLDO_CON10 0x530 369 #define MT6331_SYSLDO_CON11 0x532 370 #define MT6331_SYSLDO_CON12 0x534 371 #define MT6331_SYSLDO_CON13 0x536 372 #define MT6331_SYSLDO_CON14 0x538 373 #define MT6331_SYSLDO_CON15 0x53A 374 #define MT6331_SYSLDO_CON16 0x53C 375 #define MT6331_SYSLDO_CON17 0x53E 376 #define MT6331_SYSLDO_CON18 0x540 377 #define MT6331_SYSLDO_CON19 0x542 378 #define MT6331_SYSLDO_CON20 0x544 379 #define MT6331_SYSLDO_CON21 0x546 380 #define MT6331_DIGLDO_CON0 0x548 381 #define MT6331_DIGLDO_CON1 0x54A 382 #define MT6331_DIGLDO_CON2 0x54C 383 #define MT6331_DIGLDO_CON3 0x54E 384 #define MT6331_DIGLDO_CON4 0x550 385 #define MT6331_DIGLDO_CON5 0x552 386 #define MT6331_DIGLDO_CON6 0x554 387 #define MT6331_DIGLDO_CON7 0x556 388 #define MT6331_DIGLDO_CON8 0x558 389 #define MT6331_DIGLDO_CON9 0x55A 390 #define MT6331_DIGLDO_CON10 0x55C 391 #define MT6331_DIGLDO_CON11 0x55E 392 #define MT6331_DIGLDO_CON12 0x560 393 #define MT6331_DIGLDO_CON13 0x562 394 #define MT6331_DIGLDO_CON14 0x564 395 #define MT6331_DIGLDO_CON15 0x566 396 #define MT6331_DIGLDO_CON16 0x568 397 #define MT6331_DIGLDO_CON17 0x56A 398 #define MT6331_DIGLDO_CON18 0x56C 399 #define MT6331_DIGLDO_CON19 0x56E 400 #define MT6331_DIGLDO_CON20 0x570 401 #define MT6331_DIGLDO_CON21 0x572 402 #define MT6331_DIGLDO_CON22 0x574 403 #define MT6331_DIGLDO_CON23 0x576 404 #define MT6331_DIGLDO_CON24 0x578 405 #define MT6331_DIGLDO_CON25 0x57A 406 #define MT6331_DIGLDO_CON26 0x57C 407 #define MT6331_DIGLDO_CON27 0x57E 408 #define MT6331_DIGLDO_CON28 0x580 409 #define MT6331_OTP_CON0 0x600 410 #define MT6331_OTP_CON1 0x602 411 #define MT6331_OTP_CON2 0x604 412 #define MT6331_OTP_CON3 0x606 413 #define MT6331_OTP_CON4 0x608 414 #define MT6331_OTP_CON5 0x60A 415 #define MT6331_OTP_CON6 0x60C 416 #define MT6331_OTP_CON7 0x60E 417 #define MT6331_OTP_CON8 0x610 418 #define MT6331_OTP_CON9 0x612 419 #define MT6331_OTP_CON10 0x614 420 #define MT6331_OTP_CON11 0x616 421 #define MT6331_OTP_CON12 0x618 422 #define MT6331_OTP_CON13 0x61A 423 #define MT6331_OTP_CON14 0x61C 424 #define MT6331_OTP_DOUT_0_15 0x61E 425 #define MT6331_OTP_DOUT_16_31 0x620 426 #define MT6331_OTP_DOUT_32_47 0x622 427 #define MT6331_OTP_DOUT_48_63 0x624 428 #define MT6331_OTP_DOUT_64_79 0x626 429 #define MT6331_OTP_DOUT_80_95 0x628 430 #define MT6331_OTP_DOUT_96_111 0x62A 431 #define MT6331_OTP_DOUT_112_127 0x62C 432 #define MT6331_OTP_DOUT_128_143 0x62E 433 #define MT6331_OTP_DOUT_144_159 0x630 434 #define MT6331_OTP_DOUT_160_175 0x632 435 #define MT6331_OTP_DOUT_176_191 0x634 436 #define MT6331_OTP_DOUT_192_207 0x636 437 #define MT6331_OTP_DOUT_208_223 0x638 438 #define MT6331_OTP_DOUT_224_239 0x63A 439 #define MT6331_OTP_DOUT_240_255 0x63C 440 #define MT6331_OTP_VAL_0_15 0x63E 441 #define MT6331_OTP_VAL_16_31 0x640 442 #define MT6331_OTP_VAL_32_47 0x642 443 #define MT6331_OTP_VAL_48_63 0x644 444 #define MT6331_OTP_VAL_64_79 0x646 445 #define MT6331_OTP_VAL_80_95 0x648 446 #define MT6331_OTP_VAL_96_111 0x64A 447 #define MT6331_OTP_VAL_112_127 0x64C 448 #define MT6331_OTP_VAL_128_143 0x64E 449 #define MT6331_OTP_VAL_144_159 0x650 450 #define MT6331_OTP_VAL_160_175 0x652 451 #define MT6331_OTP_VAL_176_191 0x654 452 #define MT6331_OTP_VAL_192_207 0x656 453 #define MT6331_OTP_VAL_208_223 0x658 454 #define MT6331_OTP_VAL_224_239 0x65A 455 #define MT6331_OTP_VAL_240_255 0x65C 456 #define MT6331_RTC_MIX_CON0 0x65E 457 #define MT6331_RTC_MIX_CON1 0x660 458 #define MT6331_AUDDAC_CFG0 0x662 459 #define MT6331_AUDBUF_CFG0 0x664 460 #define MT6331_AUDBUF_CFG1 0x666 461 #define MT6331_AUDBUF_CFG2 0x668 462 #define MT6331_AUDBUF_CFG3 0x66A 463 #define MT6331_AUDBUF_CFG4 0x66C 464 #define MT6331_AUDBUF_CFG5 0x66E 465 #define MT6331_AUDBUF_CFG6 0x670 466 #define MT6331_AUDBUF_CFG7 0x672 467 #define MT6331_AUDBUF_CFG8 0x674 468 #define MT6331_IBIASDIST_CFG0 0x676 469 #define MT6331_AUDCLKGEN_CFG0 0x678 470 #define MT6331_AUDLDO_CFG0 0x67A 471 #define MT6331_AUDDCDC_CFG0 0x67C 472 #define MT6331_AUDDCDC_CFG1 0x67E 473 #define MT6331_AUDNVREGGLB_CFG0 0x680 474 #define MT6331_AUD_NCP0 0x682 475 #define MT6331_AUD_ZCD_CFG0 0x684 476 #define MT6331_AUDPREAMP_CFG0 0x686 477 #define MT6331_AUDPREAMP_CFG1 0x688 478 #define MT6331_AUDPREAMP_CFG2 0x68A 479 #define MT6331_AUDADC_CFG0 0x68C 480 #define MT6331_AUDADC_CFG1 0x68E 481 #define MT6331_AUDADC_CFG2 0x690 482 #define MT6331_AUDADC_CFG3 0x692 483 #define MT6331_AUDADC_CFG4 0x694 484 #define MT6331_AUDADC_CFG5 0x696 485 #define MT6331_AUDDIGMI_CFG0 0x698 486 #define MT6331_AUDDIGMI_CFG1 0x69A 487 #define MT6331_AUDMICBIAS_CFG0 0x69C 488 #define MT6331_AUDMICBIAS_CFG1 0x69E 489 #define MT6331_AUDENCSPARE_CFG0 0x6A0 490 #define MT6331_AUDPREAMPGAIN_CFG0 0x6A2 491 #define MT6331_AUDMADPLL_CFG0 0x6A4 492 #define MT6331_AUDMADPLL_CFG1 0x6A6 493 #define MT6331_AUDMADPLL_CFG2 0x6A8 494 #define MT6331_AUDLDO_NVREG_CFG0 0x6AA 495 #define MT6331_AUDLDO_NVREG_CFG1 0x6AC 496 #define MT6331_AUDLDO_NVREG_CFG2 0x6AE 497 #define MT6331_AUXADC_ADC0 0x700 498 #define MT6331_AUXADC_ADC1 0x702 499 #define MT6331_AUXADC_ADC2 0x704 500 #define MT6331_AUXADC_ADC3 0x706 501 #define MT6331_AUXADC_ADC4 0x708 502 #define MT6331_AUXADC_ADC5 0x70A 503 #define MT6331_AUXADC_ADC6 0x70C 504 #define MT6331_AUXADC_ADC7 0x70E 505 #define MT6331_AUXADC_ADC8 0x710 506 #define MT6331_AUXADC_ADC9 0x712 507 #define MT6331_AUXADC_ADC10 0x714 508 #define MT6331_AUXADC_ADC11 0x716 509 #define MT6331_AUXADC_ADC12 0x718 510 #define MT6331_AUXADC_ADC13 0x71A 511 #define MT6331_AUXADC_ADC14 0x71C 512 #define MT6331_AUXADC_ADC15 0x71E 513 #define MT6331_AUXADC_ADC16 0x720 514 #define MT6331_AUXADC_ADC17 0x722 515 #define MT6331_AUXADC_ADC18 0x724 516 #define MT6331_AUXADC_ADC19 0x726 517 #define MT6331_AUXADC_STA0 0x728 518 #define MT6331_AUXADC_STA1 0x72A 519 #define MT6331_AUXADC_RQST0 0x72C 520 #define MT6331_AUXADC_RQST0_SET 0x72E 521 #define MT6331_AUXADC_RQST0_CLR 0x730 522 #define MT6331_AUXADC_RQST1 0x732 523 #define MT6331_AUXADC_RQST1_SET 0x734 524 #define MT6331_AUXADC_RQST1_CLR 0x736 525 #define MT6331_AUXADC_CON0 0x738 526 #define MT6331_AUXADC_CON1 0x73A 527 #define MT6331_AUXADC_CON2 0x73C 528 #define MT6331_AUXADC_CON3 0x73E 529 #define MT6331_AUXADC_CON4 0x740 530 #define MT6331_AUXADC_CON5 0x742 531 #define MT6331_AUXADC_CON6 0x744 532 #define MT6331_AUXADC_CON7 0x746 533 #define MT6331_AUXADC_CON8 0x748 534 #define MT6331_AUXADC_CON9 0x74A 535 #define MT6331_AUXADC_CON10 0x74C 536 #define MT6331_AUXADC_CON11 0x74E 537 #define MT6331_AUXADC_CON12 0x750 538 #define MT6331_AUXADC_CON13 0x752 539 #define MT6331_AUXADC_CON14 0x754 540 #define MT6331_AUXADC_CON15 0x756 541 #define MT6331_AUXADC_CON16 0x758 542 #define MT6331_AUXADC_CON17 0x75A 543 #define MT6331_AUXADC_CON18 0x75C 544 #define MT6331_AUXADC_CON19 0x75E 545 #define MT6331_AUXADC_CON20 0x760 546 #define MT6331_AUXADC_CON21 0x762 547 #define MT6331_AUXADC_CON22 0x764 548 #define MT6331_AUXADC_CON23 0x766 549 #define MT6331_AUXADC_CON24 0x768 550 #define MT6331_AUXADC_CON25 0x76A 551 #define MT6331_AUXADC_CON26 0x76C 552 #define MT6331_AUXADC_CON27 0x76E 553 #define MT6331_AUXADC_CON28 0x770 554 #define MT6331_AUXADC_CON29 0x772 555 #define MT6331_AUXADC_CON30 0x774 556 #define MT6331_AUXADC_CON31 0x776 557 #define MT6331_AUXADC_CON32 0x778 558 #define MT6331_ACCDET_CON0 0x77A 559 #define MT6331_ACCDET_CON1 0x77C 560 #define MT6331_ACCDET_CON2 0x77E 561 #define MT6331_ACCDET_CON3 0x780 562 #define MT6331_ACCDET_CON4 0x782 563 #define MT6331_ACCDET_CON5 0x784 564 #define MT6331_ACCDET_CON6 0x786 565 #define MT6331_ACCDET_CON7 0x788 566 #define MT6331_ACCDET_CON8 0x78A 567 #define MT6331_ACCDET_CON9 0x78C 568 #define MT6331_ACCDET_CON10 0x78E 569 #define MT6331_ACCDET_CON11 0x790 570 #define MT6331_ACCDET_CON12 0x792 571 #define MT6331_ACCDET_CON13 0x794 572 #define MT6331_ACCDET_CON14 0x796 573 #define MT6331_ACCDET_CON15 0x798 574 #define MT6331_ACCDET_CON16 0x79A 575 #define MT6331_ACCDET_CON17 0x79C 576 #define MT6331_ACCDET_CON18 0x79E 577 #define MT6331_ACCDET_CON19 0x7A0 578 #define MT6331_ACCDET_CON20 0x7A2 579 #define MT6331_ACCDET_CON21 0x7A4 580 #define MT6331_ACCDET_CON22 0x7A6 581 #define MT6331_ACCDET_CON23 0x7A8 582 #define MT6331_ACCDET_CON24 0x7AA 583 584 #endif /* __MFD_MT6331_REGISTERS_H__ */ 585
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