1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (C) 2018-2019, Intel Corporation. */
3
4 #ifndef _PLDMFW_H_
5 #define _PLDMFW_H_
6
7 #include <linux/list.h>
8 #include <linux/firmware.h>
9
10 #define PLDM_DEVICE_UPDATE_CONTINUE_AFTER_FAIL BIT(0)
11
12 #define PLDM_STRING_TYPE_UNKNOWN 0
13 #define PLDM_STRING_TYPE_ASCII 1
14 #define PLDM_STRING_TYPE_UTF8 2
15 #define PLDM_STRING_TYPE_UTF16 3
16 #define PLDM_STRING_TYPE_UTF16LE 4
17 #define PLDM_STRING_TYPE_UTF16BE 5
18
19 struct pldmfw_record {
20 struct list_head entry;
21
22 /* List of descriptor TLVs */
23 struct list_head descs;
24
25 /* Component Set version string*/
26 const u8 *version_string;
27 u8 version_type;
28 u8 version_len;
29
30 /* Package Data length */
31 u16 package_data_len;
32
33 /* Bitfield of Device Update Flags */
34 u32 device_update_flags;
35
36 /* Package Data block */
37 const u8 *package_data;
38
39 /* Bitmap of components applicable to this record */
40 unsigned long *component_bitmap;
41 u16 component_bitmap_len;
42 };
43
44 /* Standard descriptor TLV identifiers */
45 #define PLDM_DESC_ID_PCI_VENDOR_ID 0x0000
46 #define PLDM_DESC_ID_IANA_ENTERPRISE_ID 0x0001
47 #define PLDM_DESC_ID_UUID 0x0002
48 #define PLDM_DESC_ID_PNP_VENDOR_ID 0x0003
49 #define PLDM_DESC_ID_ACPI_VENDOR_ID 0x0004
50 #define PLDM_DESC_ID_PCI_DEVICE_ID 0x0100
51 #define PLDM_DESC_ID_PCI_SUBVENDOR_ID 0x0101
52 #define PLDM_DESC_ID_PCI_SUBDEV_ID 0x0102
53 #define PLDM_DESC_ID_PCI_REVISION_ID 0x0103
54 #define PLDM_DESC_ID_PNP_PRODUCT_ID 0x0104
55 #define PLDM_DESC_ID_ACPI_PRODUCT_ID 0x0105
56 #define PLDM_DESC_ID_VENDOR_DEFINED 0xFFFF
57
58 struct pldmfw_desc_tlv {
59 struct list_head entry;
60
61 const u8 *data;
62 u16 type;
63 u16 size;
64 };
65
66 #define PLDM_CLASSIFICATION_UNKNOWN 0x0000
67 #define PLDM_CLASSIFICATION_OTHER 0x0001
68 #define PLDM_CLASSIFICATION_DRIVER 0x0002
69 #define PLDM_CLASSIFICATION_CONFIG_SW 0x0003
70 #define PLDM_CLASSIFICATION_APP_SW 0x0004
71 #define PLDM_CLASSIFICATION_INSTRUMENTATION 0x0005
72 #define PLDM_CLASSIFICATION_BIOS 0x0006
73 #define PLDM_CLASSIFICATION_DIAGNOSTIC_SW 0x0007
74 #define PLDM_CLASSIFICATION_OS 0x0008
75 #define PLDM_CLASSIFICATION_MIDDLEWARE 0x0009
76 #define PLDM_CLASSIFICATION_FIRMWARE 0x000A
77 #define PLDM_CLASSIFICATION_CODE 0x000B
78 #define PLDM_CLASSIFICATION_SERVICE_PACK 0x000C
79 #define PLDM_CLASSIFICATION_SOFTWARE_BUNDLE 0x000D
80
81 #define PLDM_ACTIVATION_METHOD_AUTO BIT(0)
82 #define PLDM_ACTIVATION_METHOD_SELF_CONTAINED BIT(1)
83 #define PLDM_ACTIVATION_METHOD_MEDIUM_SPECIFIC BIT(2)
84 #define PLDM_ACTIVATION_METHOD_REBOOT BIT(3)
85 #define PLDM_ACTIVATION_METHOD_DC_CYCLE BIT(4)
86 #define PLDM_ACTIVATION_METHOD_AC_CYCLE BIT(5)
87
88 #define PLDMFW_COMPONENT_OPTION_FORCE_UPDATE BIT(0)
89 #define PLDMFW_COMPONENT_OPTION_USE_COMPARISON_STAMP BIT(1)
90
91 struct pldmfw_component {
92 struct list_head entry;
93
94 /* component identifier */
95 u16 classification;
96 u16 identifier;
97
98 u16 options;
99 u16 activation_method;
100
101 u32 comparison_stamp;
102
103 u32 component_size;
104 const u8 *component_data;
105
106 /* Component version string */
107 const u8 *version_string;
108 u8 version_type;
109 u8 version_len;
110
111 /* component index */
112 u8 index;
113
114 };
115
116 /* Transfer flag used for sending components to the firmware */
117 #define PLDM_TRANSFER_FLAG_START BIT(0)
118 #define PLDM_TRANSFER_FLAG_MIDDLE BIT(1)
119 #define PLDM_TRANSFER_FLAG_END BIT(2)
120
121 struct pldmfw_ops;
122
123 /* Main entry point to the PLDM firmware update engine. Device drivers
124 * should embed this in a private structure and use container_of to obtain
125 * a pointer to their own data, used to implement the device specific
126 * operations.
127 */
128 struct pldmfw {
129 const struct pldmfw_ops *ops;
130 struct device *dev;
131 };
132
133 bool pldmfw_op_pci_match_record(struct pldmfw *context, struct pldmfw_record *record);
134
135 /* Operations invoked by the generic PLDM firmware update engine. Used to
136 * implement device specific logic.
137 *
138 * @match_record: check if the device matches the given record. For
139 * convenience, a standard implementation is provided for PCI devices.
140 *
141 * @send_package_data: send the package data associated with the matching
142 * record to firmware.
143 *
144 * @send_component_table: send the component data associated with a given
145 * component to firmware. Called once for each applicable component.
146 *
147 * @flash_component: Flash the data for a given component to the device.
148 * Called once for each applicable component, after all component tables have
149 * been sent.
150 *
151 * @finalize_update: (optional) Finish the update. Called after all components
152 * have been flashed.
153 */
154 struct pldmfw_ops {
155 bool (*match_record)(struct pldmfw *context, struct pldmfw_record *record);
156 int (*send_package_data)(struct pldmfw *context, const u8 *data, u16 length);
157 int (*send_component_table)(struct pldmfw *context, struct pldmfw_component *component,
158 u8 transfer_flag);
159 int (*flash_component)(struct pldmfw *context, struct pldmfw_component *component);
160 int (*finalize_update)(struct pldmfw *context);
161 };
162
163 int pldmfw_flash_image(struct pldmfw *context, const struct firmware *fw);
164
165 #endif
166
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