1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 #ifndef __SOC_TI_OMAP1_MUX_H
3 #define __SOC_TI_OMAP1_MUX_H
4 /*
5 * This should not really be a global header, it reflects the
6 * traditional way that omap1 does pin muxing without the
7 * pinctrl subsystem.
8 */
9
10 enum omap7xx_index {
11 /* OMAP 730 keyboard */
12 E2_7XX_KBR0,
13 J7_7XX_KBR1,
14 E1_7XX_KBR2,
15 F3_7XX_KBR3,
16 D2_7XX_KBR4,
17 C2_7XX_KBC0,
18 D3_7XX_KBC1,
19 E4_7XX_KBC2,
20 F4_7XX_KBC3,
21 E3_7XX_KBC4,
22
23 /* USB */
24 AA17_7XX_USB_DM,
25 W16_7XX_USB_PU_EN,
26 W17_7XX_USB_VBUSI,
27 W18_7XX_USB_DMCK_OUT,
28 W19_7XX_USB_DCRST,
29
30 /* MMC */
31 MMC_7XX_CMD,
32 MMC_7XX_CLK,
33 MMC_7XX_DAT0,
34
35 /* I2C */
36 I2C_7XX_SCL,
37 I2C_7XX_SDA,
38
39 /* SPI */
40 SPI_7XX_1,
41 SPI_7XX_2,
42 SPI_7XX_3,
43 SPI_7XX_4,
44 SPI_7XX_5,
45 SPI_7XX_6,
46
47 /* UART */
48 UART_7XX_1,
49 UART_7XX_2,
50 };
51
52 enum omap1xxx_index {
53 /* UART1 (BT_UART_GATING)*/
54 UART1_TX = 0,
55 UART1_RTS,
56
57 /* UART2 (COM_UART_GATING)*/
58 UART2_TX,
59 UART2_RX,
60 UART2_CTS,
61 UART2_RTS,
62
63 /* UART3 (GIGA_UART_GATING) */
64 UART3_TX,
65 UART3_RX,
66 UART3_CTS,
67 UART3_RTS,
68 UART3_CLKREQ,
69 UART3_BCLK, /* 12MHz clock out */
70 Y15_1610_UART3_RTS,
71
72 /* PWT & PWL */
73 PWT,
74 PWL,
75
76 /* USB master generic */
77 R18_USB_VBUS,
78 R18_1510_USB_GPIO0,
79 W4_USB_PUEN,
80 W4_USB_CLKO,
81 W4_USB_HIGHZ,
82 W4_GPIO58,
83
84 /* USB1 master */
85 USB1_SUSP,
86 USB1_SEO,
87 W13_1610_USB1_SE0,
88 USB1_TXEN,
89 USB1_TXD,
90 USB1_VP,
91 USB1_VM,
92 USB1_RCV,
93 USB1_SPEED,
94 R13_1610_USB1_SPEED,
95 R13_1710_USB1_SE0,
96
97 /* USB2 master */
98 USB2_SUSP,
99 USB2_VP,
100 USB2_TXEN,
101 USB2_VM,
102 USB2_RCV,
103 USB2_SEO,
104 USB2_TXD,
105
106 /* OMAP-1510 GPIO */
107 R18_1510_GPIO0,
108 R19_1510_GPIO1,
109 M14_1510_GPIO2,
110
111 /* OMAP1610 GPIO */
112 P18_1610_GPIO3,
113 Y15_1610_GPIO17,
114
115 /* OMAP-1710 GPIO */
116 R18_1710_GPIO0,
117 V2_1710_GPIO10,
118 N21_1710_GPIO14,
119 W15_1710_GPIO40,
120
121 /* MPUIO */
122 MPUIO2,
123 N15_1610_MPUIO2,
124 MPUIO4,
125 MPUIO5,
126 T20_1610_MPUIO5,
127 W11_1610_MPUIO6,
128 V10_1610_MPUIO7,
129 W11_1610_MPUIO9,
130 V10_1610_MPUIO10,
131 W10_1610_MPUIO11,
132 E20_1610_MPUIO13,
133 U20_1610_MPUIO14,
134 E19_1610_MPUIO15,
135
136 /* MCBSP2 */
137 MCBSP2_CLKR,
138 MCBSP2_CLKX,
139 MCBSP2_DR,
140 MCBSP2_DX,
141 MCBSP2_FSR,
142 MCBSP2_FSX,
143
144 /* MCBSP3 */
145 MCBSP3_CLKX,
146
147 /* Misc ballouts */
148 BALLOUT_V8_ARMIO3,
149 N20_HDQ,
150
151 /* OMAP-1610 MMC2 */
152 W8_1610_MMC2_DAT0,
153 V8_1610_MMC2_DAT1,
154 W15_1610_MMC2_DAT2,
155 R10_1610_MMC2_DAT3,
156 Y10_1610_MMC2_CLK,
157 Y8_1610_MMC2_CMD,
158 V9_1610_MMC2_CMDDIR,
159 V5_1610_MMC2_DATDIR0,
160 W19_1610_MMC2_DATDIR1,
161 R18_1610_MMC2_CLKIN,
162
163 /* OMAP-1610 External Trace Interface */
164 M19_1610_ETM_PSTAT0,
165 L15_1610_ETM_PSTAT1,
166 L18_1610_ETM_PSTAT2,
167 L19_1610_ETM_D0,
168 J19_1610_ETM_D6,
169 J18_1610_ETM_D7,
170
171 /* OMAP16XX GPIO */
172 P20_1610_GPIO4,
173 V9_1610_GPIO7,
174 W8_1610_GPIO9,
175 N20_1610_GPIO11,
176 N19_1610_GPIO13,
177 P10_1610_GPIO22,
178 V5_1610_GPIO24,
179 AA20_1610_GPIO_41,
180 W19_1610_GPIO48,
181 M7_1610_GPIO62,
182 V14_16XX_GPIO37,
183 R9_16XX_GPIO18,
184 L14_16XX_GPIO49,
185
186 /* OMAP-1610 uWire */
187 V19_1610_UWIRE_SCLK,
188 U18_1610_UWIRE_SDI,
189 W21_1610_UWIRE_SDO,
190 N14_1610_UWIRE_CS0,
191 P15_1610_UWIRE_CS3,
192 N15_1610_UWIRE_CS1,
193
194 /* OMAP-1610 SPI */
195 U19_1610_SPIF_SCK,
196 U18_1610_SPIF_DIN,
197 P20_1610_SPIF_DIN,
198 W21_1610_SPIF_DOUT,
199 R18_1610_SPIF_DOUT,
200 N14_1610_SPIF_CS0,
201 N15_1610_SPIF_CS1,
202 T19_1610_SPIF_CS2,
203 P15_1610_SPIF_CS3,
204
205 /* OMAP-1610 Flash */
206 L3_1610_FLASH_CS2B_OE,
207 M8_1610_FLASH_CS2B_WE,
208
209 /* First MMC */
210 MMC_CMD,
211 MMC_DAT1,
212 MMC_DAT2,
213 MMC_DAT0,
214 MMC_CLK,
215 MMC_DAT3,
216
217 /* OMAP-1710 MMC CMDDIR and DATDIR0 */
218 M15_1710_MMC_CLKI,
219 P19_1710_MMC_CMDDIR,
220 P20_1710_MMC_DATDIR0,
221
222 /* OMAP-1610 USB0 alternate pin configuration */
223 W9_USB0_TXEN,
224 AA9_USB0_VP,
225 Y5_USB0_RCV,
226 R9_USB0_VM,
227 V6_USB0_TXD,
228 W5_USB0_SE0,
229 V9_USB0_SPEED,
230 V9_USB0_SUSP,
231
232 /* USB2 */
233 W9_USB2_TXEN,
234 AA9_USB2_VP,
235 Y5_USB2_RCV,
236 R9_USB2_VM,
237 V6_USB2_TXD,
238 W5_USB2_SE0,
239
240 /* 16XX UART */
241 R13_1610_UART1_TX,
242 V14_16XX_UART1_RX,
243 R14_1610_UART1_CTS,
244 AA15_1610_UART1_RTS,
245 R9_16XX_UART2_RX,
246 L14_16XX_UART3_RX,
247
248 /* I2C OMAP-1610 */
249 I2C_SCL,
250 I2C_SDA,
251
252 /* Keypad */
253 F18_1610_KBC0,
254 D20_1610_KBC1,
255 D19_1610_KBC2,
256 E18_1610_KBC3,
257 C21_1610_KBC4,
258 G18_1610_KBR0,
259 F19_1610_KBR1,
260 H14_1610_KBR2,
261 E20_1610_KBR3,
262 E19_1610_KBR4,
263 N19_1610_KBR5,
264
265 /* Power management */
266 T20_1610_LOW_PWR,
267
268 /* MCLK Settings */
269 V5_1710_MCLK_ON,
270 V5_1710_MCLK_OFF,
271 R10_1610_MCLK_ON,
272 R10_1610_MCLK_OFF,
273
274 /* CompactFlash controller */
275 P11_1610_CF_CD2,
276 R11_1610_CF_IOIS16,
277 V10_1610_CF_IREQ,
278 W10_1610_CF_RESET,
279 W11_1610_CF_CD1,
280
281 /* parallel camera */
282 J15_1610_CAM_LCLK,
283 J18_1610_CAM_D7,
284 J19_1610_CAM_D6,
285 J14_1610_CAM_D5,
286 K18_1610_CAM_D4,
287 K19_1610_CAM_D3,
288 K15_1610_CAM_D2,
289 K14_1610_CAM_D1,
290 L19_1610_CAM_D0,
291 L18_1610_CAM_VS,
292 L15_1610_CAM_HS,
293 M19_1610_CAM_RSTZ,
294 Y15_1610_CAM_OUTCLK,
295
296 /* serial camera */
297 H19_1610_CAM_EXCLK,
298 Y12_1610_CCP_CLKP,
299 W13_1610_CCP_CLKM,
300 W14_1610_CCP_DATAP,
301 Y14_1610_CCP_DATAM,
302
303 };
304
305 #ifdef CONFIG_OMAP_MUX
306 extern int omap_cfg_reg(unsigned long reg_cfg);
307 #else
308 static inline int omap_cfg_reg(unsigned long reg_cfg) { return 0; }
309 #endif
310
311 #endif
312
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.