1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright 2017 Thomas Gleixner <tglx@linutronix.de>
3
4 #include <linux/irqdomain.h>
5 #include <linux/irq.h>
6 #include <linux/uaccess.h>
7
8 #include "internals.h"
9
10 static struct dentry *irq_dir;
11
12 void irq_debug_show_bits(struct seq_file *m, int ind, unsigned int state,
13 const struct irq_bit_descr *sd, int size)
14 {
15 int i;
16
17 for (i = 0; i < size; i++, sd++) {
18 if (state & sd->mask)
19 seq_printf(m, "%*s%s\n", ind + 12, "", sd->name);
20 }
21 }
22
23 #ifdef CONFIG_SMP
24 static void irq_debug_show_masks(struct seq_file *m, struct irq_desc *desc)
25 {
26 struct irq_data *data = irq_desc_get_irq_data(desc);
27 const struct cpumask *msk;
28
29 msk = irq_data_get_affinity_mask(data);
30 seq_printf(m, "affinity: %*pbl\n", cpumask_pr_args(msk));
31 #ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
32 msk = irq_data_get_effective_affinity_mask(data);
33 seq_printf(m, "effectiv: %*pbl\n", cpumask_pr_args(msk));
34 #endif
35 #ifdef CONFIG_GENERIC_PENDING_IRQ
36 msk = desc->pending_mask;
37 seq_printf(m, "pending: %*pbl\n", cpumask_pr_args(msk));
38 #endif
39 }
40 #else
41 static void irq_debug_show_masks(struct seq_file *m, struct irq_desc *desc) { }
42 #endif
43
44 static const struct irq_bit_descr irqchip_flags[] = {
45 BIT_MASK_DESCR(IRQCHIP_SET_TYPE_MASKED),
46 BIT_MASK_DESCR(IRQCHIP_EOI_IF_HANDLED),
47 BIT_MASK_DESCR(IRQCHIP_MASK_ON_SUSPEND),
48 BIT_MASK_DESCR(IRQCHIP_ONOFFLINE_ENABLED),
49 BIT_MASK_DESCR(IRQCHIP_SKIP_SET_WAKE),
50 BIT_MASK_DESCR(IRQCHIP_ONESHOT_SAFE),
51 BIT_MASK_DESCR(IRQCHIP_EOI_THREADED),
52 BIT_MASK_DESCR(IRQCHIP_SUPPORTS_LEVEL_MSI),
53 BIT_MASK_DESCR(IRQCHIP_SUPPORTS_NMI),
54 BIT_MASK_DESCR(IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND),
55 BIT_MASK_DESCR(IRQCHIP_IMMUTABLE),
56 };
57
58 static void
59 irq_debug_show_chip(struct seq_file *m, struct irq_data *data, int ind)
60 {
61 struct irq_chip *chip = data->chip;
62
63 if (!chip) {
64 seq_printf(m, "chip: None\n");
65 return;
66 }
67 seq_printf(m, "%*schip: ", ind, "");
68 if (chip->irq_print_chip)
69 chip->irq_print_chip(data, m);
70 else
71 seq_printf(m, "%s", chip->name);
72 seq_printf(m, "\n%*sflags: 0x%lx\n", ind + 1, "", chip->flags);
73 irq_debug_show_bits(m, ind, chip->flags, irqchip_flags,
74 ARRAY_SIZE(irqchip_flags));
75 }
76
77 static void
78 irq_debug_show_data(struct seq_file *m, struct irq_data *data, int ind)
79 {
80 seq_printf(m, "%*sdomain: %s\n", ind, "",
81 data->domain ? data->domain->name : "");
82 seq_printf(m, "%*shwirq: 0x%lx\n", ind + 1, "", data->hwirq);
83 irq_debug_show_chip(m, data, ind + 1);
84 if (data->domain && data->domain->ops && data->domain->ops->debug_show)
85 data->domain->ops->debug_show(m, NULL, data, ind + 1);
86 #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
87 if (!data->parent_data)
88 return;
89 seq_printf(m, "%*sparent:\n", ind + 1, "");
90 irq_debug_show_data(m, data->parent_data, ind + 4);
91 #endif
92 }
93
94 static const struct irq_bit_descr irqdata_states[] = {
95 BIT_MASK_DESCR(IRQ_TYPE_EDGE_RISING),
96 BIT_MASK_DESCR(IRQ_TYPE_EDGE_FALLING),
97 BIT_MASK_DESCR(IRQ_TYPE_LEVEL_HIGH),
98 BIT_MASK_DESCR(IRQ_TYPE_LEVEL_LOW),
99 BIT_MASK_DESCR(IRQD_LEVEL),
100
101 BIT_MASK_DESCR(IRQD_ACTIVATED),
102 BIT_MASK_DESCR(IRQD_IRQ_STARTED),
103 BIT_MASK_DESCR(IRQD_IRQ_DISABLED),
104 BIT_MASK_DESCR(IRQD_IRQ_MASKED),
105 BIT_MASK_DESCR(IRQD_IRQ_INPROGRESS),
106
107 BIT_MASK_DESCR(IRQD_PER_CPU),
108 BIT_MASK_DESCR(IRQD_NO_BALANCING),
109
110 BIT_MASK_DESCR(IRQD_SINGLE_TARGET),
111 BIT_MASK_DESCR(IRQD_MOVE_PCNTXT),
112 BIT_MASK_DESCR(IRQD_AFFINITY_SET),
113 BIT_MASK_DESCR(IRQD_SETAFFINITY_PENDING),
114 BIT_MASK_DESCR(IRQD_AFFINITY_MANAGED),
115 BIT_MASK_DESCR(IRQD_AFFINITY_ON_ACTIVATE),
116 BIT_MASK_DESCR(IRQD_MANAGED_SHUTDOWN),
117 BIT_MASK_DESCR(IRQD_CAN_RESERVE),
118
119 BIT_MASK_DESCR(IRQD_FORWARDED_TO_VCPU),
120
121 BIT_MASK_DESCR(IRQD_WAKEUP_STATE),
122 BIT_MASK_DESCR(IRQD_WAKEUP_ARMED),
123
124 BIT_MASK_DESCR(IRQD_DEFAULT_TRIGGER_SET),
125
126 BIT_MASK_DESCR(IRQD_HANDLE_ENFORCE_IRQCTX),
127
128 BIT_MASK_DESCR(IRQD_IRQ_ENABLED_ON_SUSPEND),
129
130 BIT_MASK_DESCR(IRQD_RESEND_WHEN_IN_PROGRESS),
131 };
132
133 static const struct irq_bit_descr irqdesc_states[] = {
134 BIT_MASK_DESCR(_IRQ_NOPROBE),
135 BIT_MASK_DESCR(_IRQ_NOREQUEST),
136 BIT_MASK_DESCR(_IRQ_NOTHREAD),
137 BIT_MASK_DESCR(_IRQ_NOAUTOEN),
138 BIT_MASK_DESCR(_IRQ_NESTED_THREAD),
139 BIT_MASK_DESCR(_IRQ_PER_CPU_DEVID),
140 BIT_MASK_DESCR(_IRQ_IS_POLLED),
141 BIT_MASK_DESCR(_IRQ_DISABLE_UNLAZY),
142 BIT_MASK_DESCR(_IRQ_HIDDEN),
143 };
144
145 static const struct irq_bit_descr irqdesc_istates[] = {
146 BIT_MASK_DESCR(IRQS_AUTODETECT),
147 BIT_MASK_DESCR(IRQS_SPURIOUS_DISABLED),
148 BIT_MASK_DESCR(IRQS_POLL_INPROGRESS),
149 BIT_MASK_DESCR(IRQS_ONESHOT),
150 BIT_MASK_DESCR(IRQS_REPLAY),
151 BIT_MASK_DESCR(IRQS_WAITING),
152 BIT_MASK_DESCR(IRQS_PENDING),
153 BIT_MASK_DESCR(IRQS_SUSPENDED),
154 BIT_MASK_DESCR(IRQS_NMI),
155 };
156
157
158 static int irq_debug_show(struct seq_file *m, void *p)
159 {
160 struct irq_desc *desc = m->private;
161 struct irq_data *data;
162
163 raw_spin_lock_irq(&desc->lock);
164 data = irq_desc_get_irq_data(desc);
165 seq_printf(m, "handler: %ps\n", desc->handle_irq);
166 seq_printf(m, "device: %s\n", desc->dev_name);
167 seq_printf(m, "status: 0x%08x\n", desc->status_use_accessors);
168 irq_debug_show_bits(m, 0, desc->status_use_accessors, irqdesc_states,
169 ARRAY_SIZE(irqdesc_states));
170 seq_printf(m, "istate: 0x%08x\n", desc->istate);
171 irq_debug_show_bits(m, 0, desc->istate, irqdesc_istates,
172 ARRAY_SIZE(irqdesc_istates));
173 seq_printf(m, "ddepth: %u\n", desc->depth);
174 seq_printf(m, "wdepth: %u\n", desc->wake_depth);
175 seq_printf(m, "dstate: 0x%08x\n", irqd_get(data));
176 irq_debug_show_bits(m, 0, irqd_get(data), irqdata_states,
177 ARRAY_SIZE(irqdata_states));
178 seq_printf(m, "node: %d\n", irq_data_get_node(data));
179 irq_debug_show_masks(m, desc);
180 irq_debug_show_data(m, data, 0);
181 raw_spin_unlock_irq(&desc->lock);
182 return 0;
183 }
184
185 static int irq_debug_open(struct inode *inode, struct file *file)
186 {
187 return single_open(file, irq_debug_show, inode->i_private);
188 }
189
190 static ssize_t irq_debug_write(struct file *file, const char __user *user_buf,
191 size_t count, loff_t *ppos)
192 {
193 struct irq_desc *desc = file_inode(file)->i_private;
194 char buf[8] = { 0, };
195 size_t size;
196
197 size = min(sizeof(buf) - 1, count);
198 if (copy_from_user(buf, user_buf, size))
199 return -EFAULT;
200
201 if (!strncmp(buf, "trigger", size)) {
202 int err = irq_inject_interrupt(irq_desc_get_irq(desc));
203
204 return err ? err : count;
205 }
206
207 return count;
208 }
209
210 static const struct file_operations dfs_irq_ops = {
211 .open = irq_debug_open,
212 .write = irq_debug_write,
213 .read = seq_read,
214 .llseek = seq_lseek,
215 .release = single_release,
216 };
217
218 void irq_debugfs_copy_devname(int irq, struct device *dev)
219 {
220 struct irq_desc *desc = irq_to_desc(irq);
221 const char *name = dev_name(dev);
222
223 if (name)
224 desc->dev_name = kstrdup(name, GFP_KERNEL);
225 }
226
227 void irq_add_debugfs_entry(unsigned int irq, struct irq_desc *desc)
228 {
229 char name [10];
230
231 if (!irq_dir || !desc || desc->debugfs_file)
232 return;
233
234 sprintf(name, "%d", irq);
235 desc->debugfs_file = debugfs_create_file(name, 0644, irq_dir, desc,
236 &dfs_irq_ops);
237 }
238
239 static int __init irq_debugfs_init(void)
240 {
241 struct dentry *root_dir;
242 int irq;
243
244 root_dir = debugfs_create_dir("irq", NULL);
245
246 irq_domain_debugfs_init(root_dir);
247
248 irq_dir = debugfs_create_dir("irqs", root_dir);
249
250 irq_lock_sparse();
251 for_each_active_irq(irq)
252 irq_add_debugfs_entry(irq, irq_to_desc(irq));
253 irq_unlock_sparse();
254
255 return 0;
256 }
257 __initcall(irq_debugfs_init);
258
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