1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Device Tree file for D-Link DNS-327L
4 *
5 * Copyright (C) 2015, Andrew Andrianov <andrew@ncrmnt.org>
6 */
7
8 /* Remaining unsolved:
9 * There's still some unknown device on i2c address 0x13
10 */
11
12 /dts-v1/;
13
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include "armada-370.dtsi"
17
18 / {
19 model = "D-Link DNS-327L";
20 compatible = "dlink,dns327l",
21 "marvell,armada370",
22 "marvell,armada-370-xp";
23
24 chosen {
25 stdout-path = &uart0;
26 };
27
28 memory@0 {
29 device_type = "memory";
30 reg = <0x00000000 0x20000000>; /* 512 MiB */
31 };
32
33 soc {
34 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
35 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
36 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
37
38 internal-regs {
39 sata@a0000 {
40 nr-ports = <2>;
41 status = "okay";
42 };
43
44 usb@50000 {
45 status = "okay";
46 };
47 };
48 };
49
50 gpio-keys {
51 compatible = "gpio-keys";
52 pinctrl-0 = <
53 &backup_button_pin
54 &power_button_pin
55 &reset_button_pin>;
56 pinctrl-names = "default";
57
58 power-button {
59 label = "Power Button";
60 linux,code = <KEY_POWER>;
61 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
62 };
63
64 backup-button {
65 label = "Backup Button";
66 linux,code = <KEY_COPY>;
67 gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
68 };
69
70 reset-button {
71 label = "Reset Button";
72 linux,code = <KEY_RESTART>;
73 gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
74 };
75 };
76
77 gpio-leds {
78 compatible = "gpio-leds";
79 pinctrl-0 = <
80 &sata_l_amber_pin
81 &sata_r_amber_pin
82 &backup_led_pin
83 /* Ensure these are managed by hardware */
84 &sata_l_white_pin
85 &sata_r_white_pin>;
86
87 pinctrl-names = "default";
88
89 led-sata-r-amber {
90 label = "dns327l:amber:sata-r";
91 gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
92 default-state = "keep";
93 };
94
95 led-sata-l-amber {
96 label = "dns327l:amber:sata-l";
97 gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
98 default-state = "keep";
99 };
100
101 led-backup {
102 label = "dns327l:white:usb";
103 gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
104 default-state = "keep";
105 };
106 };
107
108 usb_power: regulator-1 {
109 compatible = "regulator-fixed";
110 pinctrl-0 = <&xhci_pwr_pin>;
111 pinctrl-names = "default";
112 regulator-name = "USB3.0 Port Power";
113 regulator-min-microvolt = <5000000>;
114 regulator-max-microvolt = <5000000>;
115 enable-active-high;
116 regulator-boot-on;
117 regulator-always-on;
118 gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
119 };
120
121 sata_r_power: regulator-2 {
122 compatible = "regulator-fixed";
123 pinctrl-0 = <&sata_r_pwr_pin>;
124 pinctrl-names = "default";
125 regulator-name = "SATA-R Power";
126 regulator-min-microvolt = <5000000>;
127 regulator-max-microvolt = <5000000>;
128 startup-delay-us = <2000000>;
129 enable-active-high;
130 regulator-always-on;
131 regulator-boot-on;
132 gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
133 };
134
135 sata_l_power: regulator-3 {
136 compatible = "regulator-fixed";
137 pinctrl-0 = <&sata_l_pwr_pin>;
138 pinctrl-names = "default";
139 regulator-name = "SATA-L Power";
140 regulator-min-microvolt = <5000000>;
141 regulator-max-microvolt = <5000000>;
142 startup-delay-us = <4000000>;
143 enable-active-high;
144 regulator-always-on;
145 regulator-boot-on;
146 gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
147 };
148 };
149
150 &pciec {
151 status = "okay";
152
153 pcie@1,0 {
154 /* Port 0, Lane 0 */
155 status = "okay";
156 };
157
158 pcie@2,0 {
159 /* Port 1, Lane 0 */
160 status = "okay";
161 };
162 };
163
164 &pinctrl {
165 sata_l_white_pin: sata-l-white-pin {
166 marvell,pins = "mpp57";
167 marvell,function = "sata0";
168 };
169
170 sata_r_white_pin: sata-r-white-pin {
171 marvell,pins = "mpp55";
172 marvell,function = "sata1";
173 };
174
175 sata_r_amber_pin: sata-r-amber-pin {
176 marvell,pins = "mpp52";
177 marvell,function = "gpio";
178 };
179
180 sata_l_amber_pin: sata-l-amber-pin {
181 marvell,pins = "mpp53";
182 marvell,function = "gpio";
183 };
184
185 backup_led_pin: backup-led-pin {
186 marvell,pins = "mpp61";
187 marvell,function = "gpo";
188 };
189
190 xhci_pwr_pin: xhci-pwr-pin {
191 marvell,pins = "mpp13";
192 marvell,function = "gpio";
193 };
194
195 sata_r_pwr_pin: sata-r-pwr-pin {
196 marvell,pins = "mpp54";
197 marvell,function = "gpio";
198 };
199
200 sata_l_pwr_pin: sata-l-pwr-pin {
201 marvell,pins = "mpp56";
202 marvell,function = "gpio";
203 };
204
205 uart1_pins: uart1-pins {
206 marvell,pins = "mpp60", "mpp61";
207 marvell,function = "uart1";
208 };
209
210 power_button_pin: power-button-pin {
211 marvell,pins = "mpp65";
212 marvell,function = "gpio";
213 };
214
215 backup_button_pin: backup-button-pin {
216 marvell,pins = "mpp63";
217 marvell,function = "gpio";
218 };
219
220 reset_button_pin: reset-button-pin {
221 marvell,pins = "mpp64";
222 marvell,function = "gpio";
223 };
224 };
225
226 /* Serial console */
227 &uart0 {
228 status = "okay";
229 };
230
231 /* Connected to Weltrend MCU */
232 &uart1 {
233 pinctrl-0 = <&uart1_pins>;
234 pinctrl-names = "default";
235 status = "okay";
236 };
237
238 &mdio {
239 phy0: ethernet-phy@0 { /* Marvell 88E1318 */
240 reg = <0>;
241 marvell,reg-init = <0x2 0x19 0x0 0x0077>,
242 <0x2 0x18 0x0 0x5747>;
243 };
244 };
245
246 ð1 {
247 phy = <&phy0>;
248 phy-mode = "rgmii-id";
249 status = "okay";
250 };
251
252 &i2c0 {
253 compatible = "marvell,mv64xxx-i2c";
254 clock-frequency = <100000>;
255 status = "okay";
256 };
257
258 &nand_controller {
259 status = "okay";
260
261 nand@0 {
262 reg = <0>;
263 label = "pxa3xx_nand-0";
264 nand-rb = <0>;
265 marvell,nand-keep-config;
266 nand-on-flash-bbt;
267 nand-ecc-strength = <4>;
268 nand-ecc-step-size = <512>;
269
270 partitions {
271 compatible = "fixed-partitions";
272 #address-cells = <1>;
273 #size-cells = <1>;
274
275 partition@0 {
276 label = "u-boot";
277 /* 1.0 MiB */
278 reg = <0x0000000 0x100000>;
279 read-only;
280 };
281
282 partition@100000 {
283 label = "u-boot-env";
284 /* 128 KiB */
285 reg = <0x100000 0x20000>;
286 read-only;
287 };
288
289 partition@120000 {
290 label = "uImage";
291 /* 7 MiB */
292 reg = <0x120000 0x700000>;
293 };
294
295 partition@820000 {
296 label = "ubifs";
297 /* ~ 84 MiB */
298 reg = <0x820000 0x54e0000>;
299 };
300
301 /* Hardcoded into stock bootloader */
302 partition@5d00000 {
303 label = "failsafe-uImage";
304 /* 5 MiB */
305 reg = <0x5d00000 0x500000>;
306 };
307
308 partition@6200000 {
309 label = "failsafe-fs";
310 /* 29 MiB */
311 reg = <0x6200000 0x1d00000>;
312 };
313
314 partition@7f00000 {
315 label = "bbt";
316 /* 1 MiB for BBT */
317 reg = <0x7f00000 0x100000>;
318 };
319 };
320 };
321 };
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