1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3 * Device Tree file for Armada 385 Allied Telesis x530/GS980MX Board.
4 (x530/AT-GS980MX)
5 *
6 Copyright (C) 2020 Allied Telesis Labs
7 */
8
9 /dts-v1/;
10 #include "armada-385.dtsi"
11
12 #include <dt-bindings/gpio/gpio.h>
13
14 / {
15 model = "x530/AT-GS980MX";
16 compatible = "alliedtelesis,gs980mx", "alliedtelesis,x530", "marvell,armada385", "marvell,armada380";
17
18 chosen {
19 stdout-path = "serial1:115200n8";
20 };
21
22 memory {
23 device_type = "memory";
24 reg = <0x00000000 0x40000000>; /* 1GB */
25 };
26
27 soc {
28 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
29 MBUS_ID(0x01, 0x3d) 0 0xf4800000 0x80000
30 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
31
32 internal-regs {
33 i2c0: i2c@11000 {
34 pinctrl-names = "default";
35 pinctrl-0 = <&i2c0_pins>;
36 status = "okay";
37 };
38
39 uart0: serial@12000 {
40 pinctrl-names = "default";
41 pinctrl-0 = <&uart0_pins>;
42 status = "okay";
43 };
44 };
45 };
46
47 led-7seg {
48 compatible = "gpio-7-segment";
49 segment-gpios = <&led_7seg_gpio 0 GPIO_ACTIVE_LOW>,
50 <&led_7seg_gpio 1 GPIO_ACTIVE_LOW>,
51 <&led_7seg_gpio 2 GPIO_ACTIVE_LOW>,
52 <&led_7seg_gpio 3 GPIO_ACTIVE_LOW>,
53 <&led_7seg_gpio 4 GPIO_ACTIVE_LOW>,
54 <&led_7seg_gpio 5 GPIO_ACTIVE_LOW>,
55 <&led_7seg_gpio 6 GPIO_ACTIVE_LOW>;
56 };
57 };
58
59 &pciec {
60 status = "okay";
61 };
62
63 &pcie1 {
64 status = "okay";
65 reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
66 reset-delay-us = <400000>;
67 };
68
69 &pcie2 {
70 status = "okay";
71 };
72
73 &devbus_cs1 {
74 compatible = "marvell,mvebu-devbus";
75 status = "okay";
76
77 devbus,bus-width = <8>;
78 devbus,turn-off-ps = <60000>;
79 devbus,badr-skew-ps = <0>;
80 devbus,acc-first-ps = <124000>;
81 devbus,acc-next-ps = <248000>;
82 devbus,rd-setup-ps = <0>;
83 devbus,rd-hold-ps = <0>;
84
85 /* Write parameters */
86 devbus,sync-enable = <0>;
87 devbus,wr-high-ps = <60000>;
88 devbus,wr-low-ps = <60000>;
89 devbus,ale-wr-ps = <60000>;
90
91 nvs@0 {
92 status = "okay";
93
94 compatible = "mtd-ram";
95 reg = <0 0x00080000>;
96 bank-width = <1>;
97 label = "nvs";
98 };
99 };
100
101 &pinctrl {
102 i2c0_gpio_pins: i2c-gpio-pins-0 {
103 marvell,pins = "mpp2", "mpp3";
104 marvell,function = "gpio";
105 };
106 };
107
108 &i2c0 {
109 clock-frequency = <100000>;
110 status = "okay";
111
112 pinctrl-names = "default", "gpio";
113 pinctrl-0 = <&i2c0_pins>;
114 pinctrl-1 = <&i2c0_gpio_pins>;
115 scl-gpio = <&gpio0 2 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
116 sda-gpio = <&gpio0 3 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
117
118 i2c0mux: mux@71 {
119 #address-cells = <1>;
120 #size-cells = <0>;
121 compatible = "nxp,pca9544";
122 reg = <0x71>;
123 i2c-mux-idle-disconnect;
124
125 i2c@0 { /* POE devices MUX */
126 #address-cells = <1>;
127 #size-cells = <0>;
128 reg = <0>;
129 };
130
131 i2c@1 {
132 #address-cells = <1>;
133 #size-cells = <0>;
134 reg = <1>;
135
136 adt7476_2e: hwmon@2e {
137 compatible = "adi,adt7476";
138 reg = <0x2e>;
139 };
140
141 adt7476_2d: hwmon@2d {
142 compatible = "adi,adt7476";
143 reg = <0x2d>;
144 };
145 };
146
147 i2c@2 {
148 #address-cells = <1>;
149 #size-cells = <0>;
150 reg = <2>;
151
152 rtc@68 {
153 compatible = "dallas,ds1340";
154 reg = <0x68>;
155 };
156 };
157
158 i2c@3 {
159 #address-cells = <1>;
160 #size-cells = <0>;
161 reg = <3>;
162
163 led_7seg_gpio: gpio@20 {
164 compatible = "nxp,pca9554";
165 gpio-controller;
166 #gpio-cells = <2>;
167 reg = <0x20>;
168 };
169 };
170 };
171 };
172
173 &usb0 {
174 status = "okay";
175 };
176
177 &spi1 {
178 pinctrl-names = "default";
179 pinctrl-0 = <&spi1_pins>;
180 status = "okay";
181
182 flash@1 {
183 #address-cells = <1>;
184 #size-cells = <1>;
185 compatible = "jedec,spi-nor";
186 reg = <1>; /* Chip select 1 */
187 spi-max-frequency = <54000000>;
188
189 partitions {
190 compatible = "fixed-partitions";
191 #address-cells = <1>;
192 #size-cells = <1>;
193 partition@0 {
194 reg = <0x00000000 0x00100000>;
195 label = "u-boot";
196 };
197 partition@100000 {
198 reg = <0x00100000 0x00040000>;
199 label = "u-boot-env";
200 };
201 partition@140000 {
202 reg = <0x00140000 0x00e80000>;
203 label = "unused";
204 };
205 partition@fc0000 {
206 reg = <0x00fc0000 0x00040000>;
207 label = "idprom";
208 };
209 };
210 };
211 };
212
213 &nand_controller {
214 status = "okay";
215
216 nand@0 {
217 reg = <0>;
218 label = "pxa3xx_nand-0";
219 nand-rb = <0>;
220 nand-on-flash-bbt;
221 nand-ecc-strength = <4>;
222 nand-ecc-step-size = <512>;
223
224 marvell,nand-enable-arbiter;
225
226 partitions {
227 compatible = "fixed-partitions";
228 #address-cells = <1>;
229 #size-cells = <1>;
230 partition@0 {
231 reg = <0x00000000 0x0f000000>;
232 label = "user";
233 };
234 partition@f000000 {
235 /* Maximum mtdoops size is 8MB, so set to that. */
236 reg = <0x0f000000 0x00800000>;
237 label = "errlog";
238 };
239 partition@f800000 {
240 reg = <0x0f800000 0x00800000>;
241 label = "nand-bbt";
242 };
243 };
244 };
245 };
246
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