1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3 * Device Tree file for the Linksys WRT1900AC (Mamba).
4 *
5 * Note: this board is shipped with a new generation boot loader that
6 * remaps internal registers at 0xf1000000. Therefore, if earlyprintk
7 * is used, the CONFIG_DEBUG_MVEBU_UART0_ALTERNATE option should be
8 * used.
9 *
10 * Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org>
11 *
12 * Based on armada-xp-axpwifiap.dts:
13 *
14 * Copyright (C) 2013 Marvell
15 *
16 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
17 */
18
19 /dts-v1/;
20 #include <dt-bindings/gpio/gpio.h>
21 #include <dt-bindings/input/input.h>
22 #include "armada-xp-mv78230.dtsi"
23
24 / {
25 model = "Linksys WRT1900AC";
26 compatible = "linksys,mamba", "marvell,armadaxp-mv78230",
27 "marvell,armadaxp", "marvell,armada-370-xp";
28
29 chosen {
30 bootargs = "console=ttyS0,115200";
31 stdout-path = &uart0;
32 };
33
34 memory@0 {
35 device_type = "memory";
36 reg = <0x00000000 0x00000000 0x00000000 0x10000000>; /* 256MB */
37 };
38
39 soc {
40 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
41 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
42 MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
43 MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000
44 MBUS_ID(0x0c, 0x04) 0 0 0xf1200000 0x100000>;
45
46 internal-regs {
47
48 rtc@10300 {
49 /* No crystal connected to the internal RTC */
50 status = "disabled";
51 };
52
53 /* J10: VCC, NC, RX, NC, TX, GND */
54 serial@12000 {
55 status = "okay";
56 };
57
58 sata@a0000 {
59 nr-ports = <1>;
60 status = "okay";
61 };
62
63 ethernet@70000 {
64 pinctrl-0 = <&ge0_rgmii_pins>;
65 pinctrl-names = "default";
66 status = "okay";
67 phy-mode = "rgmii-id";
68 buffer-manager = <&bm>;
69 bm,pool-long = <0>;
70 bm,pool-short = <1>;
71 fixed-link {
72 speed = <1000>;
73 full-duplex;
74 };
75 };
76
77 ethernet@74000 {
78 pinctrl-0 = <&ge1_rgmii_pins>;
79 pinctrl-names = "default";
80 status = "okay";
81 phy-mode = "rgmii-id";
82 buffer-manager = <&bm>;
83 bm,pool-long = <2>;
84 bm,pool-short = <3>;
85 fixed-link {
86 speed = <1000>;
87 full-duplex;
88 };
89 };
90
91 /* USB part of the eSATA/USB 2.0 port */
92 usb@50000 {
93 status = "okay";
94 };
95
96 i2c@11000 {
97 status = "okay";
98 clock-frequency = <100000>;
99
100 tmp421@4c {
101 compatible = "ti,tmp421";
102 reg = <0x4c>;
103 };
104
105 tlc59116@68 {
106 #address-cells = <1>;
107 #size-cells = <0>;
108 #gpio-cells = <2>;
109 compatible = "ti,tlc59116";
110 reg = <0x68>;
111
112 wan_amber@0 {
113 label = "mamba:amber:wan";
114 reg = <0x0>;
115 };
116
117 wan_white@1 {
118 label = "mamba:white:wan";
119 reg = <0x1>;
120 };
121
122 wlan_2g@2 {
123 label = "mamba:white:wlan_2g";
124 reg = <0x2>;
125 };
126
127 wlan_5g@3 {
128 label = "mamba:white:wlan_5g";
129 reg = <0x3>;
130 };
131
132 esata@4 {
133 label = "mamba:white:esata";
134 reg = <0x4>;
135 linux,default-trigger = "disk-activity";
136 };
137
138 usb2@5 {
139 label = "mamba:white:usb2";
140 reg = <0x5>;
141 };
142
143 usb3_1@6 {
144 label = "mamba:white:usb3_1";
145 reg = <0x6>;
146 };
147
148 usb3_2@7 {
149 label = "mamba:white:usb3_2";
150 reg = <0x7>;
151 };
152
153 wps_white@8 {
154 label = "mamba:white:wps";
155 reg = <0x8>;
156 };
157
158 wps_amber@9 {
159 label = "mamba:amber:wps";
160 reg = <0x9>;
161 };
162 };
163 };
164
165 bm@c8000 {
166 status = "okay";
167 };
168 };
169
170 bm-bppi {
171 status = "okay";
172 };
173 };
174
175 gpio-keys {
176 compatible = "gpio-keys";
177 pinctrl-0 = <&keys_pin>;
178 pinctrl-names = "default";
179
180 button-wps {
181 label = "WPS";
182 linux,code = <KEY_WPS_BUTTON>;
183 gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
184 };
185
186 button-reset {
187 label = "Factory Reset Button";
188 linux,code = <KEY_RESTART>;
189 gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
190 };
191 };
192
193 gpio-leds {
194 compatible = "gpio-leds";
195 pinctrl-0 = <&power_led_pin>;
196 pinctrl-names = "default";
197
198 led-power {
199 label = "mamba:white:power";
200 gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
201 default-state = "on";
202 };
203 };
204
205 pwm_fan {
206 /* SUNON HA4010V4-0000-C99 */
207
208 compatible = "pwm-fan";
209 pwms = <&gpio0 24 4000>;
210 };
211 };
212
213 &pciec {
214 status = "okay";
215
216 /* Etron EJ168 USB 3.0 controller */
217 pcie@1,0 {
218 /* Port 0, Lane 0 */
219 status = "okay";
220 };
221
222 /* First mini-PCIe port */
223 pcie@2,0 {
224 /* Port 0, Lane 1 */
225 status = "okay";
226 };
227
228 /* Second mini-PCIe port */
229 pcie@3,0 {
230 /* Port 0, Lane 3 */
231 status = "okay";
232 };
233 };
234
235 &pinctrl {
236
237 keys_pin: keys-pin {
238 marvell,pins = "mpp32", "mpp33";
239 marvell,function = "gpio";
240 };
241
242 power_led_pin: power-led-pin {
243 marvell,pins = "mpp40";
244 marvell,function = "gpio";
245 };
246
247 gpio_fan_pin: gpio-fan-pin {
248 marvell,pins = "mpp24";
249 marvell,function = "gpio";
250 };
251 };
252
253 &spi0 {
254 status = "okay";
255
256 flash@0 {
257 #address-cells = <1>;
258 #size-cells = <1>;
259 compatible = "everspin,mr25h256";
260 reg = <0>; /* Chip select 0 */
261 spi-max-frequency = <40000000>;
262 };
263 };
264
265 &mdio {
266 status = "okay";
267
268 ethernet-switch@0 {
269 compatible = "marvell,mv88e6085";
270 reg = <0>;
271
272 ethernet-ports {
273 #address-cells = <1>;
274 #size-cells = <0>;
275
276 ethernet-port@0 {
277 reg = <0>;
278 label = "lan4";
279 };
280
281 ethernet-port@1 {
282 reg = <1>;
283 label = "lan3";
284 };
285
286 ethernet-port@2 {
287 reg = <2>;
288 label = "lan2";
289 };
290
291 ethernet-port@3 {
292 reg = <3>;
293 label = "lan1";
294 };
295
296 ethernet-port@4 {
297 reg = <4>;
298 label = "internet";
299 };
300
301 ethernet-port@5 {
302 reg = <5>;
303 phy-mode = "rgmii-id";
304 ethernet = <ð0>;
305 fixed-link {
306 speed = <1000>;
307 full-duplex;
308 };
309 };
310 };
311 };
312 };
313
314 &nand_controller {
315 status = "okay";
316
317 nand@0 {
318 reg = <0>;
319 label = "pxa3xx_nand-0";
320 nand-rb = <0>;
321 marvell,nand-keep-config;
322 nand-on-flash-bbt;
323 nand-ecc-strength = <4>;
324 nand-ecc-step-size = <512>;
325
326 partitions {
327 compatible = "fixed-partitions";
328 #address-cells = <1>;
329 #size-cells = <1>;
330
331 partition@0 {
332 label = "u-boot";
333 reg = <0x0000000 0x100000>; /* 1MB */
334 read-only;
335 };
336
337 partition@100000 {
338 label = "u_env";
339 reg = <0x100000 0x40000>; /* 256KB */
340 };
341
342 partition@140000 {
343 label = "s_env";
344 reg = <0x140000 0x40000>; /* 256KB */
345 };
346
347 partition@900000 {
348 label = "devinfo";
349 reg = <0x900000 0x100000>; /* 1MB */
350 read-only;
351 };
352
353 /* kernel1 overlaps with rootfs1 by design */
354 partition@a00000 {
355 label = "kernel1";
356 reg = <0xa00000 0x2800000>; /* 40MB */
357 };
358
359 partition@d00000 {
360 label = "rootfs1";
361 reg = <0xd00000 0x2500000>; /* 37MB */
362 };
363
364 /* kernel2 overlaps with rootfs2 by design */
365 partition@3200000 {
366 label = "kernel2";
367 reg = <0x3200000 0x2800000>; /* 40MB */
368 };
369
370 partition@3500000 {
371 label = "rootfs2";
372 reg = <0x3500000 0x2500000>; /* 37MB */
373 };
374
375 /*
376 * 38MB, last MB is for the BBT, not writable
377 */
378 partition@5a00000 {
379 label = "syscfg";
380 reg = <0x5a00000 0x2600000>;
381 };
382
383 /*
384 * Unused area between "s_env" and "devinfo".
385 * Moved here because otherwise the renumbered
386 * partitions would break the bootloader
387 * supplied bootargs
388 */
389 partition@180000 {
390 label = "unused_area";
391 reg = <0x180000 0x780000>; /* 7.5MB */
392 };
393 };
394 };
395 };
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